Skript file: /~heha/mb-iwp/Antriebe/Schrittmotorsteuerung/Firmware.zip/Bootloader/Makefile

# Projekt: Schrittmotor (PT_PIESA)
# Zum Programmieren des seriellen Bootloaders über die Lötstützpunkte
# zu einem PonyProg-kompatiblen Parallelport-Adapter

# AVR-GCC Makefile template, derived from the WinAVR template (which
# is public domain), believed to be neutral to any flavor of "make"
# (GNU make, BSD make, SysV make)


MCU = atmega8
FORMAT = ihex
TARGET = bootloader
SRC = main.c serial.c
ASRC = 
OPT = s
BASEADDR = 0x1C00
FUSEH = 0xD2
FUSEL = 0x84
# Fuse high byte:
# 0xc0 = 1 1 0 1   0 0 1 0 <-- BOOTRST (boot reset vector at 0x1C00)
#        ^ ^ ^ ^   ^ ^ ^------ BOOTSZ0
#        | | | |   | +-------- BOOTSZ1
#        | | | |   + --------- EESAVE (preserve EEPROM over chip erase)
#        | | | +-------------- CKOPT (unused)
#        | | +---------------- SPIEN (allow serial programming)
#        | +------------------ WDTON (WDT not always on)
#        +-------------------- RSTDISBL (reset pin is enabled)
# Fuse low byte:
# 0x84 = 1 0 0 0   0 1 0 0
#        ^ ^ \ /   \--+--/
#        | |  |       +------- CKSEL 3..0 (internal 8 MHz)
#        | |  +--------------- SUT 1..0 (0 ms start-up time)
#        | +------------------ BODEN (BrownOut Detector enabled)
#        +-------------------- BODLEVEL (2.7 V)
 
# Debugging format.
# Native formats for AVR-GCC's -g are stabs [default], or dwarf-2.
# AVR (extended) COFF requires stabs, plus an avr-objcopy run.
DEBUG = stabs

# Compiler flag to set the C Standard level.
# c89   - "ANSI" C
# gnu89 - c89 plus GCC extensions
# c99   - ISO C99 standard (not yet fully implemented)
# gnu99 - c99 plus GCC extensions
CSTANDARD = -std=gnu99

# Place -D or -U options here
CDEFS =
#CDEFS += -DREMOVE_FLASH_BYTE_SUPPORT
#CDEFS += -DREMOVE_EEPROM_BYTE_SUPPORT
#CDEFS += -DREMOVE_FUSE_AND_LOCK_BIT_SUPPORT
#CDEFS += -DREMOVE_AVRPROG_SUPPORT
#CDEFS += -DREMOVE_BLOCK_SUPPORT

# Place -I options here
CINCS =


CDEBUG = -g$(DEBUG)
CWARN = -Wall -Wstrict-prototypes
CTUNING = -fpack-struct -fshort-enums
#CEXTRA = -Wa,-adhlns=$(<:.c=.lst)
CFLAGS = $(CDEBUG) $(CDEFS) $(CINCS) -O$(OPT) $(CWARN) $(CSTANDARD) $(CTUNING) $(CEXTRA)


#LDMAP = $(LDFLAGS) -Wl,-Map=$(TARGET).map,--cref
//LDFLAGS = -Ttext=$(BASEADDR) $(LDMAP)
LDFLAGS = -nostartfiles


CC = avr-gcc
OBJCOPY = avr-objcopy
OBJDUMP = avr-objdump
SIZE = avr-size
NM = avr-nm
AVRDUDE = avrdude -p $(MCU) -c pony-stk200 -P lpt1 -E noreset
REMOVE = rm -f
MV = mv -f

# Define all object files.
OBJ = $(SRC:.c=.o) $(ASRC:.S=.o) 

# Define all listing files.
LST = $(ASRC:.S=.lst) $(SRC:.c=.lst)

# Combine all necessary flags and optional flags.
# Add target processor to flags.
ALL_CFLAGS = -mmcu=$(MCU) -I. $(CFLAGS)
ALL_ASFLAGS = -mmcu=$(MCU) -I. -x assembler-with-cpp $(ASFLAGS)


# Default target.
all: $(TARGET).hex size
disasm: $(TARGET).lst

# Program the device.  
program: $(TARGET).hex
	$(AVRDUDE) -U flash:w:$(TARGET).hex -U lock:w:0x2f:m

fuse:
	$(AVRDUDE) -U hfuse:w:$(FUSEH):m -U lfuse:w:$(FUSEL):m
	
lock:	
	$(AVRDUDE) -U lock:w:0x2f:m

size: $(TARGET).elf
	@echo
	@avr-size -C --mcu=$(DEVICE) $<

%.lst: $(TARGET).elf
	avr-objdump -d $< > $@

.SUFFIXES: .elf .hex .eep .lss .sym

.elf.hex:
	$(OBJCOPY) -O $(FORMAT) -R .eeprom $< $@

# Create extended listing file from ELF output file.
.elf.lss:
	$(OBJDUMP) -h -S $< > $@

# Create a symbol table from ELF output file.
.elf.sym:
	$(NM) -n $< > $@



# Link: create ELF output file from object files.
$(TARGET).elf: $(OBJ)
	$(CC) $(ALL_CFLAGS) $(OBJ) --output $@ $(LDFLAGS)


# Compile: create object files from C source files.
.c.o:
	$(CC) -c $(ALL_CFLAGS) $< -o $@ 


# Target: clean project.
clean:
	$(REMOVE) $(TARGET).hex $(TARGET).cof $(TARGET).elf \
	$(TARGET).map $(TARGET).sym $(TARGET).lss \
	$(OBJ) $(LST)

.PHONY:	all build elf hex eep lss sym program coff extcoff clean depend
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