/* GNU PIC processor definitions
Copyright 2001-2005 Craig Franklin
Copyright 2014-2016 Molnár Károly
*/
//#include <config.h>
#include <stdlib.h>
#ifdef HAVE_SYS_IOCTL_H
# include <sys/ioctl.h> /* ioctl(TIOCGWINSZ) with GNU and BSD */
#endif
#ifdef HAVE_TERMIOS_H
# include <termios.h> /* ioctl(TIOCGWINSZ) with Solaris */
#endif
#include "stdhdr.h"
#include "libgputils.h"
/* XXXPRO: Need to add a line here for any extra processors. Please
keep this list sorted primarily by number, secondarily sorting
alphabetically. */
/* pclass defined_as names[3] coff_type common_ram_addrs[2] maxrom config_addrs[2] script
| | | | num_pages | common_ram_max | prog_mem_size | eeprom_addrs[2] | cpu_flags
| | | | | num_banks | | linear_ram_addrs[2] | | badrom[MAX_BADROM] | | idlocs_mask | |
| | | | | | bank_bits| | | maxram | | | idlocs_addrs[2] | | | header | |
| | | | | | | | | | | | | | | | | | | | |
V V V V V V V V V V V V V V V V V V V V V */
static struct px pics[] = {
{ PROC_CLASS_PIC12 , "__10F200" , { "pic10f200" , "p10f200" , "10f200" }, 0xF200, 1, 1, 0x0000, { -1, -1 }, -1, { -1, -1 }, 0x001F, 0x0000FF, 0x000100, { -1, -1 }, { 0x000100, 0x000103 }, { 0x000FFF, 0x000FFF }, { -1, -1 }, 0x0FF0, "p10f200.inc" , "10f200_g.lkr" , 0 },
{ PROC_CLASS_PIC12 , "__10F202" , { "pic10f202" , "p10f202" , "10f202" }, 0xF202, 1, 1, 0x0000, { -1, -1 }, -1, { -1, -1 }, 0x001F, 0x0001FF, 0x000200, { -1, -1 }, { 0x000200, 0x000203 }, { 0x000FFF, 0x000FFF }, { -1, -1 }, 0x0FF0, "p10f202.inc" , "10f202_g.lkr" , 0 },
{ PROC_CLASS_PIC12 , "__10F204" , { "pic10f204" , "p10f204" , "10f204" }, 0xF204, 1, 1, 0x0000, { -1, -1 }, -1, { -1, -1 }, 0x001F, 0x0000FF, 0x000100, { -1, -1 }, { 0x000100, 0x000103 }, { 0x000FFF, 0x000FFF }, { -1, -1 }, 0x0FF0, "p10f204.inc" , "10f204_g.lkr" , 0 },
{ PROC_CLASS_PIC12 , "__10F206" , { "pic10f206" , "p10f206" , "10f206" }, 0xF206, 1, 1, 0x0000, { -1, -1 }, -1, { -1, -1 }, 0x001F, 0x0001FF, 0x000200, { -1, -1 }, { 0x000200, 0x000203 }, { 0x000FFF, 0x000FFF }, { -1, -1 }, 0x0FF0, "p10f206.inc" , "10f206_g.lkr" , 0 },
{ PROC_CLASS_PIC12 , "__10F220" , { "pic10f220" , "p10f220" , "10f220" }, 0xF220, 1, 1, 0x0000, { -1, -1 }, -1, { -1, -1 }, 0x001F, 0x0000FF, 0x000100, { -1, -1 }, { 0x000100, 0x000103 }, { 0x000FFF, 0x000FFF }, { -1, -1 }, 0x0FF0, "p10f220.inc" , "10f220_g.lkr" , 0 },
{ PROC_CLASS_PIC12 , "__10F222" , { "pic10f222" , "p10f222" , "10f222" }, 0xF222, 1, 1, 0x0000, { -1, -1 }, -1, { -1, -1 }, 0x001F, 0x0001FF, 0x000200, { -1, -1 }, { 0x000200, 0x000203 }, { 0x000FFF, 0x000FFF }, { -1, -1 }, 0x0FF0, "p10f222.inc" , "10f222_g.lkr" , 0 },
{ PROC_CLASS_PIC14 , "__10F320" , { "pic10f320" , "p10f320" , "10f320" }, 0xF320, 1, 1, 0x0000, { -1, -1 }, -1, { -1, -1 }, 0x007F, 0x0000FF, 0x000100, { -1, -1 }, { 0x002000, 0x002003 }, { 0x002007, 0x002007 }, { -1, -1 }, 0x3F80, "p10f320.inc" , "10f320_g.lkr" , 0 },
{ PROC_CLASS_PIC14 , "__10F322" , { "pic10f322" , "p10f322" , "10f322" }, 0xF322, 1, 1, 0x0000, { -1, -1 }, -1, { -1, -1 }, 0x007F, 0x0001FF, 0x000200, { -1, -1 }, { 0x002000, 0x002003 }, { 0x002007, 0x002007 }, { -1, -1 }, 0x3F80, "p10f322.inc" , "10f322_g.lkr" , 0 },
{ PROC_CLASS_PIC14 , "__10LF320" , { "pic10lf320" , "p10lf320" , "10lf320" }, 0xA320, 1, 1, 0x0000, { -1, -1 }, -1, { -1, -1 }, 0x007F, 0x0000FF, 0x000100, { -1, -1 }, { 0x002000, 0x002003 }, { 0x002007, 0x002007 }, { -1, -1 }, 0x3F80, "p10lf320.inc" , "10lf320_g.lkr" , 0 },
{ PROC_CLASS_PIC14 , "__10LF322" , { "pic10lf322" , "p10lf322" , "10lf322" }, 0xA322, 1, 1, 0x0000, { -1, -1 }, -1, { -1, -1 }, 0x007F, 0x0001FF, 0x000200, { -1, -1 }, { 0x002000, 0x002003 }, { 0x002007, 0x002007 }, { -1, -1 }, 0x3F80, "p10lf322.inc" , "10lf322_g.lkr" , 0 },
{ PROC_CLASS_PIC12 , "__12C508" , { "pic12c508" , "p12c508" , "12c508" }, 0x2508, 1, 1, 0x0000, { -1, -1 }, -1, { -1, -1 }, 0x001F, 0x0001FF, 0x000200, { -1, -1 }, { 0x000200, 0x000203 }, { 0x000FFF, 0x000FFF }, { -1, -1 }, 0x0FF0, "p12c508.inc" , "12c508_g.lkr" , 0 },
{ PROC_CLASS_PIC12 , "__12C508A" , { "pic12c508a" , "p12c508a" , "12c508a" }, 0x508A, 1, 1, 0x0000, { -1, -1 }, -1, { -1, -1 }, 0x001F, 0x0001FF, 0x000200, { -1, -1 }, { 0x000200, 0x000203 }, { 0x000FFF, 0x000FFF }, { -1, -1 }, 0x0FF0, "p12c508a.inc" , "12c508a_g.lkr" , 0 },
{ PROC_CLASS_PIC12 , "__12C509" , { "pic12c509" , "p12c509" , "12c509" }, 0x2509, 2, 2, 0x0020, { 0x07, 0x0F }, 0x00F, { -1, -1 }, 0x003F, 0x0003FF, 0x000400, { -1, -1 }, { 0x000400, 0x000403 }, { 0x000FFF, 0x000FFF }, { -1, -1 }, 0x0FF0, "p12c509.inc" , "12c509_g.lkr" , 0 },
{ PROC_CLASS_PIC12 , "__12C509A" , { "pic12c509a" , "p12c509a" , "12c509a" }, 0x509A, 2, 2, 0x0020, { 0x07, 0x0F }, 0x00F, { -1, -1 }, 0x003F, 0x0003FF, 0x000400, { -1, -1 }, { 0x000400, 0x000403 }, { 0x000FFF, 0x000FFF }, { -1, -1 }, 0x0FF0, "p12c509a.inc" , "12c509a_g.lkr" , 0 },
{ PROC_CLASS_PIC14 , "__12C671" , { "pic12c671" , "p12c671" , "12c671" }, 0x2671, 1, 2, 0x0080, { 0x70, 0x7F }, -1, { -1, -1 }, 0x00FF, 0x0003FF, 0x000400, { -1, -1 }, { 0x002000, 0x002003 }, { 0x002007, 0x002007 }, { -1, -1 }, 0x3F80, "p12c671.inc" , "12c671_g.lkr" , 0 },
{ PROC_CLASS_PIC14 , "__12C672" , { "pic12c672" , "p12c672" , "12c672" }, 0x2672, 1, 2, 0x0080, { 0x70, 0x7F }, -1, { -1, -1 }, 0x00FF, 0x0007FF, 0x000800, { -1, -1 }, { 0x002000, 0x002003 }, { 0x002007, 0x002007 }, { -1, -1 }, 0x3F80, "p12c672.inc" , "12c672_g.lkr" , 0 },
{ PROC_CLASS_PIC12 , "__12CE518" , { "pic12ce518" , "p12ce518" , "12ce518" }, 0x2518, 1, 1, 0x0000, { -1, -1 }, -1, { -1, -1 }, 0x001F, 0x0001FF, 0x000200, { -1, -1 }, { 0x000200, 0x000203 }, { 0x000FFF, 0x000FFF }, { -1, -1 }, 0x0FF0, "p12ce518.inc" , "12ce518_g.lkr" , 0 },
{ PROC_CLASS_PIC12 , "__12CE519" , { "pic12ce519" , "p12ce519" , "12ce519" }, 0x2519, 2, 2, 0x0020, { 0x07, 0x0F }, 0x00F, { -1, -1 }, 0x003F, 0x0003FF, 0x000400, { -1, -1 }, { 0x000400, 0x000403 }, { 0x000FFF, 0x000FFF }, { -1, -1 }, 0x0FF0, "p12ce519.inc" , "12ce519_g.lkr" , 0 },
{ PROC_CLASS_PIC14 , "__12CE673" , { "pic12ce673" , "p12ce673" , "12ce673" }, 0x2673, 1, 2, 0x0080, { 0x70, 0x7F }, -1, { -1, -1 }, 0x00FF, 0x0003FF, 0x000400, { -1, -1 }, { 0x002000, 0x002003 }, { 0x002007, 0x002007 }, { -1, -1 }, 0x3F80, "p12ce673.inc" , "12ce673_g.lkr" , 0 },
{ PROC_CLASS_PIC14 , "__12CE674" , { "pic12ce674" , "p12ce674" , "12ce674" }, 0x2674, 1, 2, 0x0080, { 0x70, 0x7F }, -1, { -1, -1 }, 0x00FF, 0x0007FF, 0x000800, { -1, -1 }, { 0x002000, 0x002003 }, { 0x002007, 0x002007 }, { -1, -1 }, 0x3F80, "p12ce674.inc" , "12ce674_g.lkr" , 0 },
{ PROC_CLASS_PIC12 , "__12CR509A" , { "pic12cr509a" , "p12cr509a" , "12cr509a" }, 0xD09A, 2, 2, 0x0020, { 0x07, 0x0F }, 0x00F, { -1, -1 }, 0x003F, 0x0003FF, 0x000400, { -1, -1 }, { 0x000400, 0x000403 }, { 0x000FFF, 0x000FFF }, { -1, -1 }, 0x0FF0, "p12cr509a.inc" , "12cr509a_g.lkr" , 0 },
{ PROC_CLASS_PIC12 , "__12F508" , { "pic12f508" , "p12f508" , "12f508" }, 0xF508, 1, 1, 0x0000, { -1, -1 }, -1, { -1, -1 }, 0x001F, 0x0001FF, 0x000200, { -1, -1 }, { 0x000200, 0x000203 }, { 0x000FFF, 0x000FFF }, { -1, -1 }, 0x0FF0, "p12f508.inc" , "12f508_g.lkr" , 0 },
{ PROC_CLASS_PIC12 , "__12F509" , { "pic12f509" , "p12f509" , "12f509" }, 0xF509, 2, 2, 0x0020, { 0x07, 0x0F }, 0x00F, { -1, -1 }, 0x003F, 0x0003FF, 0x000400, { -1, -1 }, { 0x000400, 0x000403 }, { 0x000FFF, 0x000FFF }, { -1, -1 }, 0x0FF0, "p12f509.inc" , "12f509_g.lkr" , 0 },
{ PROC_CLASS_PIC12 , "__12F510" , { "pic12f510" , "p12f510" , "12f510" }, 0xF510, 2, 2, 0x0020, { 0x0A, 0x0F }, 0x00F, { -1, -1 }, 0x003F, 0x0003FF, 0x000400, { -1, -1 }, { 0x000400, 0x000403 }, { 0x000FFF, 0x000FFF }, { -1, -1 }, 0x0FF0, "p12f510.inc" , "12f510_g.lkr" , 0 },
{ PROC_CLASS_PIC12 , "__12F519" , { "pic12f519" , "p12f519" , "12f519" }, 0xF519, 2, 2, 0x0020, { 0x07, 0x0F }, 0x00F, { -1, -1 }, 0x003F, 0x0003FF, 0x000400, { -1, -1 }, { 0x000440, 0x000443 }, { 0x000FFF, 0x000FFF }, { 0x000400, 0x00043F }, 0x0FF0, "p12f519.inc" , "12f519_g.lkr" , 0 },
{ PROC_CLASS_PIC12 , "__12F520" , { "pic12f520" , "p12f520" , "12f520" }, 0xF520, 3, 8, 0x00E0, { 0x07, 0x0F }, -1, { -1, -1 }, 0x00FF, 0x0005FF, 0x000600, { -1, -1 }, { 0x000640, 0x000643 }, { 0x000FFF, 0x000FFF }, { 0x000600, 0x00063F }, 0x0FF0, "p12f520.inc" , "12f520_g.lkr" , 0 },
{ PROC_CLASS_PIC12E , "__12F529T39A" , { "pic12f529t39a" , "p12f529t39a" , "12f529t39a" }, 0xE529, 3, 8, 0x00E0, { 0x07, 0x0F }, 0x00F, { -1, -1 }, 0x00FF, 0x0005FF, 0x000600, { -1, -1 }, { 0x000640, 0x000643 }, { 0x000FFF, 0x000FFF }, { 0x000600, 0x00063F }, 0x0FF0, "p12f529t39a.inc" , "12f529t39a_g.lkr" , 0 },
{ PROC_CLASS_PIC12E , "__12F529T48A" , { "pic12f529t48a" , "p12f529t48a" , "12f529t48a" }, 0xD529, 3, 8, 0x00E0, { 0x07, 0x0F }, 0x00F, { -1, -1 }, 0x00FF, 0x0005FF, 0x000600, { -1, -1 }, { 0x000640, 0x000643 }, { 0x000FFF, 0x000FFF }, { 0x000600, 0x00063F }, 0x0FF0, "p12f529t48a.inc" , "12f529t48a_g.lkr" , 0 },
{ PROC_CLASS_PIC14 , "__12F609" , { "pic12f609" , "p12f609" , "12f609" }, 0xF609, 1, 2, 0x0080, { 0x70, 0x7F }, -1, { -1, -1 }, 0x00FF, 0x0003FF, 0x000400, { -1, -1 }, { 0x002000, 0x002003 }, { 0x002007, 0x002007 }, { -1, -1 }, 0x3F80, "p12f609.inc" , "12f609_g.lkr" , 0 },
{ PROC_CLASS_PIC14 , "__12F615" , { "pic12f615" , "p12f615" , "12f615" }, 0xF615, 1, 2, 0x0080, { 0x70, 0x7F }, -1, { -1, -1 }, 0x00FF, 0x0003FF, 0x000400, { -1, -1 }, { 0x002000, 0x002003 }, { 0x002007, 0x002007 }, { -1, -1 }, 0x3F80, "p12f615.inc" , "12f615_g.lkr" , 0 },
{ PROC_CLASS_PIC14 , "__12F617" , { "pic12f617" , "p12f617" , "12f617" }, 0xF617, 1, 2, 0x0080, { 0x70, 0x7F }, -1, { -1, -1 }, 0x00FF, 0x0007FF, 0x000800, { -1, -1 }, { 0x002000, 0x002003 }, { 0x002007, 0x002007 }, { -1, -1 }, 0x3F80, "p12f617.inc" , "12f617_g.lkr" , 0 },
{ PROC_CLASS_PIC14 , "__12F629" , { "pic12f629" , "p12f629" , "12f629" }, 0x2629, 1, 2, 0x0080, { 0x20, 0x5F }, -1, { -1, -1 }, 0x00DF, 0x00217F, 0x000400, { 0x0003FF, 0x0020FF }, { 0x002000, 0x002003 }, { 0x002007, 0x002007 }, { 0x002100, 0x00217F }, 0x3F80, "p12f629.inc" , "12f629_g.lkr" , 0 },
{ PROC_CLASS_PIC14 , "__12F635" , { "pic12f635" , "p12f635" , "12f635" }, 0xF635, 1, 4, 0x0180, { 0x70, 0x7F }, -1, { -1, -1 }, 0x01FF, 0x00217F, 0x000400, { 0x000400, 0x0020FF }, { 0x002000, 0x002003 }, { 0x002007, 0x002007 }, { 0x002100, 0x00217F }, 0x3F80, "p12f635.inc" , "12f635_g.lkr" , 0 },
{ PROC_CLASS_PIC14 , "__12F675" , { "pic12f675" , "p12f675" , "12f675" }, 0x2675, 1, 2, 0x0080, { 0x20, 0x5F }, -1, { -1, -1 }, 0x00DF, 0x00217F, 0x000400, { 0x0003FF, 0x0020FF }, { 0x002000, 0x002003 }, { 0x002007, 0x002007 }, { 0x002100, 0x00217F }, 0x3F80, "p12f675.inc" , "12f675_g.lkr" , 0 },
{ PROC_CLASS_PIC14 , "__12F683" , { "pic12f683" , "p12f683" , "12f683" }, 0xF683, 1, 2, 0x0080, { 0x70, 0x7F }, -1, { -1, -1 }, 0x00FF, 0x0021FF, 0x000800, { 0x000800, 0x0020FF }, { 0x002000, 0x002003 }, { 0x002007, 0x002007 }, { 0x002100, 0x0021FF }, 0x3F80, "p12f683.inc" , "12f683_g.lkr" , 0 },
{ PROC_CLASS_PIC14 , "__12F752" , { "pic12f752" , "p12f752" , "12f752" }, 0xF752, 1, 4, 0x0180, { 0x70, 0x7F }, -1, { -1, -1 }, 0x01FF, 0x0003FF, 0x000400, { -1, -1 }, { 0x002000, 0x002003 }, { 0x002007, 0x002007 }, { -1, -1 }, 0x3F80, "p12f752.inc" , "12f752_g.lkr" , 0 },
{ PROC_CLASS_PIC14E , "__12F1501" , { "pic12f1501" , "p12f1501" , "12f1501" }, 0x1501, 1, 32, 0x0F80, { 0x70, 0x7F }, -1, { 0x2000, 0x202F }, 0x0FFF, 0x0003FF, 0x000400, { -1, -1 }, { 0x008000, 0x008003 }, { 0x008007, 0x008008 }, { -1, -1 }, 0x3F80, "p12f1501.inc" , "12f1501_g.lkr" , 0 },
{ PROC_CLASS_PIC14E , "__12F1571" , { "pic12f1571" , "p12f1571" , "12f1571" }, 0x1571, 1, 32, 0x0F80, { 0x70, 0x7F }, -1, { 0x2000, 0x206F }, 0x0FFF, 0x0003FF, 0x000400, { -1, -1 }, { 0x008000, 0x008003 }, { 0x008007, 0x008008 }, { -1, -1 }, 0x3F80, "p12f1571.inc" , "12f1571_g.lkr" , 0 },
{ PROC_CLASS_PIC14E , "__12F1572" , { "pic12f1572" , "p12f1572" , "12f1572" }, 0x1572, 1, 32, 0x0F80, { 0x70, 0x7F }, -1, { 0x2000, 0x20EF }, 0x0FFF, 0x0007FF, 0x000800, { -1, -1 }, { 0x008000, 0x008003 }, { 0x008007, 0x008008 }, { -1, -1 }, 0x3F80, "p12f1572.inc" , "12f1572_g.lkr" , 0 },
{ PROC_CLASS_PIC14E , "__12F1612" , { "pic12f1612" , "p12f1612" , "12f1612" }, 0x1612, 1, 32, 0x0F80, { 0x70, 0x7F }, -1, { 0x2000, 0x20EF }, 0x0FFF, 0x0007FF, 0x000800, { -1, -1 }, { 0x008000, 0x008003 }, { 0x008007, 0x008009 }, { -1, -1 }, 0x3F80, "p12f1612.inc" , "12f1612_g.lkr" , 0 },
{ PROC_CLASS_PIC14E , "__12F1822" , { "pic12f1822" , "p12f1822" , "12f1822" }, 0x1822, 1, 32, 0x0F80, { 0x70, 0x7F }, -1, { 0x2000, 0x206F }, 0x0FFF, 0x00F0FF, 0x000800, { 0x000800, 0x00EFFF }, { 0x008000, 0x008003 }, { 0x008007, 0x008008 }, { 0x00F000, 0x00F0FF }, 0x3F80, "p12f1822.inc" , "12f1822_g.lkr" , 0 },
{ PROC_CLASS_PIC14E , "__12F1840" , { "pic12f1840" , "p12f1840" , "12f1840" }, 0x1840, 2, 32, 0x0F80, { 0x70, 0x7F }, -1, { 0x2000, 0x20EF }, 0x0FFF, 0x00F0FF, 0x001000, { 0x001000, 0x00EFFF }, { 0x008000, 0x008003 }, { 0x008007, 0x008008 }, { 0x00F000, 0x00F0FF }, 0x3F80, "p12f1840.inc" , "12f1840_g.lkr" , 0 },
{ PROC_CLASS_PIC14 , "__12HV609" , { "pic12hv609" , "p12hv609" , "12hv609" }, 0x6609, 1, 2, 0x0080, { 0x70, 0x7F }, -1, { -1, -1 }, 0x00FF, 0x0003FF, 0x000400, { -1, -1 }, { 0x002000, 0x002003 }, { 0x002007, 0x002007 }, { -1, -1 }, 0x3F80, "p12hv609.inc" , "12hv609_g.lkr" , 0 },
{ PROC_CLASS_PIC14 , "__12HV615" , { "pic12hv615" , "p12hv615" , "12hv615" }, 0x6615, 1, 2, 0x0080, { 0x70, 0x7F }, -1, { -1, -1 }, 0x00FF, 0x0003FF, 0x000400, { -1, -1 }, { 0x002000, 0x002003 }, { 0x002007, 0x002007 }, { -1, -1 }, 0x3F80, "p12hv615.inc" , "12hv615_g.lkr" , 0 },
{ PROC_CLASS_PIC14 , "__12HV752" , { "pic12hv752" , "p12hv752" , "12hv752" }, 0x6652, 1, 4, 0x0180, { 0x70, 0x7F }, -1, { -1, -1 }, 0x01FF, 0x0003FF, 0x000400, { -1, -1 }, { 0x002000, 0x002003 }, { 0x002007, 0x002007 }, { -1, -1 }, 0x3F80, "p12hv752.inc" , "12hv752_g.lkr" , 0 },
{ PROC_CLASS_PIC14E , "__12LF1501" , { "pic12lf1501" , "p12lf1501" , "12lf1501" }, 0xA501, 1, 32, 0x0F80, { 0x70, 0x7F }, -1, { 0x2000, 0x202F }, 0x0FFF, 0x0003FF, 0x000400, { -1, -1 }, { 0x008000, 0x008003 }, { 0x008007, 0x008008 }, { -1, -1 }, 0x3F80, "p12lf1501.inc" , "12lf1501_g.lkr" , 0 },
{ PROC_CLASS_PIC14E , "__12LF1552" , { "pic12lf1552" , "p12lf1552" , "12lf1552" }, 0xA552, 1, 32, 0x0F80, { 0x70, 0x7F }, -1, { 0x2000, 0x20EF }, 0x0FFF, 0x0007FF, 0x000800, { -1, -1 }, { 0x008000, 0x008003 }, { 0x008007, 0x008008 }, { -1, -1 }, 0x3F80, "p12lf1552.inc" , "12lf1552_g.lkr" , 0 },
{ PROC_CLASS_PIC14E , "__12LF1571" , { "pic12lf1571" , "p12lf1571" , "12lf1571" }, 0xA571, 1, 32, 0x0F80, { 0x70, 0x7F }, -1, { 0x2000, 0x206F }, 0x0FFF, 0x0003FF, 0x000400, { -1, -1 }, { 0x008000, 0x008003 }, { 0x008007, 0x008008 }, { -1, -1 }, 0x3F80, "p12lf1571.inc" , "12lf1571_g.lkr" , 0 },
{ PROC_CLASS_PIC14E , "__12LF1572" , { "pic12lf1572" , "p12lf1572" , "12lf1572" }, 0xA572, 1, 32, 0x0F80, { 0x70, 0x7F }, -1, { 0x2000, 0x20EF }, 0x0FFF, 0x0007FF, 0x000800, { -1, -1 }, { 0x008000, 0x008003 }, { 0x008007, 0x008008 }, { -1, -1 }, 0x3F80, "p12lf1572.inc" , "12lf1572_g.lkr" , 0 },
{ PROC_CLASS_PIC14E , "__12LF1612" , { "pic12lf1612" , "p12lf1612" , "12lf1612" }, 0xA612, 1, 32, 0x0F80, { 0x70, 0x7F }, -1, { 0x2000, 0x20EF }, 0x0FFF, 0x0007FF, 0x000800, { -1, -1 }, { 0x008000, 0x008003 }, { 0x008007, 0x008009 }, { -1, -1 }, 0x3F80, "p12lf1612.inc" , "12lf1612_g.lkr" , 0 },
{ PROC_CLASS_PIC14E , "__12LF1822" , { "pic12lf1822" , "p12lf1822" , "12lf1822" }, 0xA822, 1, 32, 0x0F80, { 0x70, 0x7F }, -1, { 0x2000, 0x206F }, 0x0FFF, 0x00F0FF, 0x000800, { 0x000800, 0x00EFFF }, { 0x008000, 0x008003 }, { 0x008007, 0x008008 }, { 0x00F000, 0x00F0FF }, 0x3F80, "p12lf1822.inc" , "12lf1822_g.lkr" , 0 },
{ PROC_CLASS_PIC14E , "__12LF1840" , { "pic12lf1840" , "p12lf1840" , "12lf1840" }, 0xA840, 2, 32, 0x0F80, { 0x70, 0x7F }, -1, { 0x2000, 0x20EF }, 0x0FFF, 0x00F0FF, 0x001000, { 0x001000, 0x00EFFF }, { 0x008000, 0x008003 }, { 0x008007, 0x008008 }, { 0x00F000, 0x00F0FF }, 0x3F80, "p12lf1840.inc" , "12lf1840_g.lkr" , 0 },
{ PROC_CLASS_PIC14E , "__12LF1840T39A", { "pic12lf1840t39a", "p12lf1840t39a" , "12lf1840t39a" }, 0xC840, 2, 32, 0x0F80, { 0x70, 0x7F }, -1, { 0x2000, 0x20EF }, 0x0FFF, 0x00F0FF, 0x001000, { 0x001000, 0x00EFFF }, { 0x008000, 0x008003 }, { 0x008007, 0x008008 }, { 0x00F000, 0x00F0FF }, 0x3F80, "p12lf1840t39a.inc", "12lf1840t39a_g.lkr", 0 },
{ PROC_CLASS_PIC14E , "__12LF1840T48A", { "pic12lf1840t48a", "p12lf1840t48a" , "12lf1840t48a" }, 0xB840, 2, 32, 0x0F80, { 0x70, 0x7F }, -1, { 0x2000, 0x20EF }, 0x0FFF, 0x00F0FF, 0x001000, { 0x001000, 0x00EFFF }, { 0x008000, 0x008003 }, { 0x008007, 0x008008 }, { 0x00F000, 0x00F0FF }, 0x3F80, "p12lf1840t48a.inc", "12lf1840t48a_g.lkr", 0 },
{ PROC_CLASS_PIC12 , "__16C5X" , { "pic16c5x" , "p16c5x" , "16c5x" }, 0x658A, 4, 4, 0x0000, { -1, -1 }, -1, { -1, -1 }, -1, -1, -1, { -1, -1 }, { 0x000200, 0x000203 }, { -1, -1 }, { -1, -1 }, 0x0FF0, "p16c5x.inc" , NULL , 0 },
{ PROC_CLASS_PIC12 , "__16C52" , { "pic16c52" , "p16c52" , "16c52" }, 0x6C52, 1, 1, 0x0000, { -1, -1 }, -1, { -1, -1 }, 0x001F, 0x00017F, 0x000180, { -1, -1 }, { 0x000180, 0x000183 }, { 0x000FFF, 0x000FFF }, { -1, -1 }, 0x0FF0, "p16c5x.inc" , "16c52_g.lkr" , 0 },
{ PROC_CLASS_PIC12 , "__16C54" , { "pic16c54" , "p16c54" , "16c54" }, 0x6C54, 1, 1, 0x0000, { -1, -1 }, -1, { -1, -1 }, 0x001F, 0x0001FF, 0x000200, { -1, -1 }, { 0x000200, 0x000203 }, { 0x000FFF, 0x000FFF }, { -1, -1 }, 0x0FF0, "p16c54.inc" , "16c54_g.lkr" , 0 },
{ PROC_CLASS_PIC12 , "__16C54A" , { "pic16c54a" , "p16c54a" , "16c54a" }, 0x654A, 1, 1, 0x0000, { -1, -1 }, -1, { -1, -1 }, 0x001F, 0x0001FF, 0x000200, { -1, -1 }, { 0x000200, 0x000203 }, { 0x000FFF, 0x000FFF }, { -1, -1 }, 0x0FF0, "p16c54a.inc" , "16c54a_g.lkr" , 0 },
{ PROC_CLASS_PIC12 , "__16C54B" , { "pic16c54b" , "p16c54b" , "16c54b" }, 0x654B, 1, 1, 0x0000, { -1, -1 }, -1, { -1, -1 }, 0x001F, 0x0001FF, 0x000200, { -1, -1 }, { 0x000200, 0x000203 }, { 0x000FFF, 0x000FFF }, { -1, -1 }, 0x0FF0, "p16c54a.inc" , "16c54b_g.lkr" , 0 },
{ PROC_CLASS_PIC12 , "__16C54C" , { "pic16c54c" , "p16c54c" , "16c54c" }, 0x654C, 1, 1, 0x0000, { -1, -1 }, -1, { -1, -1 }, 0x001F, 0x0001FF, 0x000200, { -1, -1 }, { 0x000200, 0x000203 }, { 0x000FFF, 0x000FFF }, { -1, -1 }, 0x0FF0, "p16c54c.inc" , "16c54c_g.lkr" , 0 },
{ PROC_CLASS_PIC12 , "__16C55" , { "pic16c55" , "p16c55" , "16c55" }, 0x6C55, 1, 1, 0x0000, { -1, -1 }, -1, { -1, -1 }, 0x001F, 0x0001FF, 0x000200, { -1, -1 }, { 0x000200, 0x000203 }, { 0x000FFF, 0x000FFF }, { -1, -1 }, 0x0FF0, "p16c55.inc" , "16c55_g.lkr" , 0 },
{ PROC_CLASS_PIC12 , "__16C55A" , { "pic16c55a" , "p16c55a" , "16c55a" }, 0x655A, 1, 1, 0x0000, { -1, -1 }, -1, { -1, -1 }, 0x001F, 0x0001FF, 0x000200, { -1, -1 }, { 0x000200, 0x000203 }, { 0x000FFF, 0x000FFF }, { -1, -1 }, 0x0FF0, "p16c55a.inc" , "16c55a_g.lkr" , 0 },
{ PROC_CLASS_PIC12 , "__16C56" , { "pic16c56" , "p16c56" , "16c56" }, 0x6C56, 2, 1, 0x0000, { -1, -1 }, -1, { -1, -1 }, 0x001F, 0x0003FF, 0x000400, { -1, -1 }, { 0x000400, 0x000403 }, { 0x000FFF, 0x000FFF }, { -1, -1 }, 0x0FF0, "p16c56.inc" , "16c56_g.lkr" , 0 },
{ PROC_CLASS_PIC12 , "__16C56A" , { "pic16c56a" , "p16c56a" , "16c56a" }, 0x656A, 2, 1, 0x0000, { -1, -1 }, -1, { -1, -1 }, 0x001F, 0x0003FF, 0x000400, { -1, -1 }, { 0x000400, 0x000403 }, { 0x000FFF, 0x000FFF }, { -1, -1 }, 0x0FF0, "p16c56a.inc" , "16c56a_g.lkr" , 0 },
{ PROC_CLASS_PIC12 , "__16C57" , { "pic16c57" , "p16c57" , "16c57" }, 0x6C57, 4, 4, 0x0060, { 0x08, 0x0F }, 0x00F, { -1, -1 }, 0x007F, 0x0007FF, 0x000800, { -1, -1 }, { 0x000800, 0x000803 }, { 0x000FFF, 0x000FFF }, { -1, -1 }, 0x0FF0, "p16c57.inc" , "16c57_g.lkr" , 0 },
{ PROC_CLASS_PIC12 , "__16C57C" , { "pic16c57c" , "p16c57c" , "16c57c" }, 0x657C, 4, 4, 0x0060, { 0x08, 0x0F }, 0x00F, { -1, -1 }, 0x007F, 0x0007FF, 0x000800, { -1, -1 }, { 0x000800, 0x000803 }, { 0x000FFF, 0x000FFF }, { -1, -1 }, 0x0FF0, "p16c57c.inc" , "16c57c_g.lkr" , 0 },
{ PROC_CLASS_PIC12 , "__16C58A" , { "pic16c58a" , "p16c58a" , "16c58a" }, 0x658A, 4, 4, 0x0060, { 0x07, 0x0F }, 0x00F, { -1, -1 }, 0x007F, 0x0007FF, 0x000800, { -1, -1 }, { 0x000800, 0x000803 }, { 0x000FFF, 0x000FFF }, { -1, -1 }, 0x0FF0, "p16c58a.inc" , "16c58a_g.lkr" , 0 },
{ PROC_CLASS_PIC12 , "__16C58B" , { "pic16c58b" , "p16c58b" , "16c58b" }, 0x658B, 4, 4, 0x0060, { 0x07, 0x0F }, 0x00F, { -1, -1 }, 0x007F, 0x0007FF, 0x000800, { -1, -1 }, { 0x000800, 0x000803 }, { 0x000FFF, 0x000FFF }, { -1, -1 }, 0x0FF0, "p16c58b.inc" , "16c58b_g.lkr" , 0 },
{ PROC_CLASS_PIC14 , "__16C61" , { "pic16c61" , "p16c61" , "16c61" }, 0x6C61, 1, 2, 0x0080, { 0x0C, 0x2F }, -1, { -1, -1 }, 0x00AF, 0x0003FF, 0x000400, { -1, -1 }, { 0x002000, 0x002003 }, { 0x002007, 0x002007 }, { -1, -1 }, 0x3F80, "p16c61.inc" , "16c61_g.lkr" , 0 },
{ PROC_CLASS_PIC14 , "__16C62" , { "pic16c62" , "p16c62" , "16c62" }, 0x6C62, 1, 2, 0x0080, { -1, -1 }, -1, { -1, -1 }, 0x00BF, 0x0007FF, 0x000800, { -1, -1 }, { 0x002000, 0x002003 }, { 0x002007, 0x002007 }, { -1, -1 }, 0x3F80, "p16c62.inc" , "16c62_g.lkr" , 0 },
{ PROC_CLASS_PIC14 , "__16C62A" , { "pic16c62a" , "p16c62a" , "16c62a" }, 0x662A, 1, 2, 0x0080, { -1, -1 }, -1, { -1, -1 }, 0x00BF, 0x0007FF, 0x000800, { -1, -1 }, { 0x002000, 0x002003 }, { 0x002007, 0x002007 }, { -1, -1 }, 0x3F80, "p16c62a.inc" , "16c62a_g.lkr" , 0 },
{ PROC_CLASS_PIC14 , "__16C62B" , { "pic16c62b" , "p16c62b" , "16c62b" }, 0x662B, 1, 2, 0x0080, { -1, -1 }, -1, { -1, -1 }, 0x00BF, 0x0007FF, 0x000800, { -1, -1 }, { 0x002000, 0x002003 }, { 0x002007, 0x002007 }, { -1, -1 }, 0x3F80, "p16c62b.inc" , "16c62b_g.lkr" , 0 },
{ PROC_CLASS_PIC14 , "__16C63" , { "pic16c63" , "p16c63" , "16c63" }, 0x6C63, 2, 2, 0x0080, { -1, -1 }, -1, { -1, -1 }, 0x00FF, 0x000FFF, 0x001000, { -1, -1 }, { 0x002000, 0x002003 }, { 0x002007, 0x002007 }, { -1, -1 }, 0x3F80, "p16c63.inc" , "16c63_g.lkr" , 0 },
{ PROC_CLASS_PIC14 , "__16C63A" , { "pic16c63a" , "p16c63a" , "16c63a" }, 0x663A, 2, 2, 0x0080, { -1, -1 }, -1, { -1, -1 }, 0x00FF, 0x000FFF, 0x001000, { -1, -1 }, { 0x002000, 0x002003 }, { 0x002007, 0x002007 }, { -1, -1 }, 0x3F80, "p16c63a.inc" , "16c63a_g.lkr" , 0 },
{ PROC_CLASS_PIC14 , "__16C64" , { "pic16c64" , "p16c64" , "16c64" }, 0x6C64, 1, 2, 0x0080, { -1, -1 }, -1, { -1, -1 }, 0x00BF, 0x0007FF, 0x000800, { -1, -1 }, { 0x002000, 0x002003 }, { 0x002007, 0x002007 }, { -1, -1 }, 0x3F80, "p16c64.inc" , "16c64_g.lkr" , 0 },
{ PROC_CLASS_PIC14 , "__16C64A" , { "pic16c64a" , "p16c64a" , "16c64a" }, 0x664A, 1, 2, 0x0080, { -1, -1 }, -1, { -1, -1 }, 0x00BF, 0x0007FF, 0x000800, { -1, -1 }, { 0x002000, 0x002003 }, { 0x002007, 0x002007 }, { -1, -1 }, 0x3F80, "p16c64a.inc" , "16c64a_g.lkr" , 0 },
{ PROC_CLASS_PIC14 , "__16C65" , { "pic16c65" , "p16c65" , "16c65" }, 0x6C65, 2, 2, 0x0080, { -1, -1 }, -1, { -1, -1 }, 0x00FF, 0x000FFF, 0x001000, { -1, -1 }, { 0x002000, 0x002003 }, { 0x002007, 0x002007 }, { -1, -1 }, 0x3F80, "p16c65.inc" , "16c65_g.lkr" , 0 },
{ PROC_CLASS_PIC14 , "__16C65A" , { "pic16c65a" , "p16c65a" , "16c65a" }, 0x665A, 2, 2, 0x0080, { -1, -1 }, -1, { -1, -1 }, 0x00FF, 0x000FFF, 0x001000, { -1, -1 }, { 0x002000, 0x002003 }, { 0x002007, 0x002007 }, { -1, -1 }, 0x3F80, "p16c65a.inc" , "16c65a_g.lkr" , 0 },
{ PROC_CLASS_PIC14 , "__16C65B" , { "pic16c65b" , "p16c65b" , "16c65b" }, 0x665B, 2, 2, 0x0080, { -1, -1 }, -1, { -1, -1 }, 0x00FF, 0x000FFF, 0x001000, { -1, -1 }, { 0x002000, 0x002003 }, { 0x002007, 0x002007 }, { -1, -1 }, 0x3F80, "p16c65b.inc" , "16c65b_g.lkr" , 0 },
{ PROC_CLASS_PIC14 , "__16C66" , { "pic16c66" , "p16c66" , "16c66" }, 0x6C66, 4, 4, 0x0180, { 0x70, 0x7F }, -1, { -1, -1 }, 0x01FF, 0x001FFF, 0x002000, { -1, -1 }, { 0x002000, 0x002003 }, { 0x002007, 0x002007 }, { -1, -1 }, 0x3F80, "p16c66.inc" , "16c66_g.lkr" , 0 },
{ PROC_CLASS_PIC14 , "__16C67" , { "pic16c67" , "p16c67" , "16c67" }, 0x6C67, 4, 4, 0x0180, { 0x70, 0x7F }, -1, { -1, -1 }, 0x01FF, 0x001FFF, 0x002000, { -1, -1 }, { 0x002000, 0x002003 }, { 0x002007, 0x002007 }, { -1, -1 }, 0x3F80, "p16c67.inc" , "16c67_g.lkr" , 0 },
{ PROC_CLASS_PIC14 , "__16C71" , { "pic16c71" , "p16c71" , "16c71" }, 0x6C71, 1, 2, 0x0080, { 0x0C, 0x2F }, -1, { -1, -1 }, 0x00AF, 0x0003FF, 0x000400, { -1, -1 }, { 0x002000, 0x002003 }, { 0x002007, 0x002007 }, { -1, -1 }, 0x3F80, "p16c71.inc" , "16c71_g.lkr" , 0 },
{ PROC_CLASS_PIC14 , "__16C72" , { "pic16c72" , "p16c72" , "16c72" }, 0x6C72, 1, 2, 0x0080, { -1, -1 }, -1, { -1, -1 }, 0x00BF, 0x0007FF, 0x000800, { -1, -1 }, { 0x002000, 0x002003 }, { 0x002007, 0x002007 }, { -1, -1 }, 0x3F80, "p16c72.inc" , "16c72_g.lkr" , 0 },
{ PROC_CLASS_PIC14 , "__16C72A" , { "pic16c72a" , "p16c72a" , "16c72a" }, 0x672A, 1, 2, 0x0080, { -1, -1 }, -1, { -1, -1 }, 0x00BF, 0x0007FF, 0x000800, { -1, -1 }, { 0x002000, 0x002003 }, { 0x002007, 0x002007 }, { -1, -1 }, 0x3F80, "p16c72a.inc" , "16c72a_g.lkr" , 0 },
{ PROC_CLASS_PIC14 , "__16C73" , { "pic16c73" , "p16c73" , "16c73" }, 0x6C73, 2, 2, 0x0080, { -1, -1 }, -1, { -1, -1 }, 0x00FF, 0x000FFF, 0x001000, { -1, -1 }, { 0x002000, 0x002003 }, { 0x002007, 0x002007 }, { -1, -1 }, 0x3F80, "p16c73.inc" , "16c73_g.lkr" , 0 },
{ PROC_CLASS_PIC14 , "__16C73A" , { "pic16c73a" , "p16c73a" , "16c73a" }, 0x673A, 2, 2, 0x0080, { -1, -1 }, -1, { -1, -1 }, 0x00FF, 0x000FFF, 0x001000, { -1, -1 }, { 0x002000, 0x002003 }, { 0x002007, 0x002007 }, { -1, -1 }, 0x3F80, "p16c73a.inc" , "16c73a_g.lkr" , 0 },
{ PROC_CLASS_PIC14 , "__16C73B" , { "pic16c73b" , "p16c73b" , "16c73b" }, 0x673B, 2, 2, 0x0080, { -1, -1 }, -1, { -1, -1 }, 0x00FF, 0x000FFF, 0x001000, { -1, -1 }, { 0x002000, 0x002003 }, { 0x002007, 0x002007 }, { -1, -1 }, 0x3F80, "p16c73b.inc" , "16c73b_g.lkr" , 0 },
{ PROC_CLASS_PIC14 , "__16C74" , { "pic16c74" , "p16c74" , "16c74" }, 0x6C74, 2, 2, 0x0080, { -1, -1 }, -1, { -1, -1 }, 0x00FF, 0x000FFF, 0x001000, { -1, -1 }, { 0x002000, 0x002003 }, { 0x002007, 0x002007 }, { -1, -1 }, 0x3F80, "p16c74.inc" , "16c74_g.lkr" , 0 },
{ PROC_CLASS_PIC14 , "__16C74A" , { "pic16c74a" , "p16c74a" , "16c74a" }, 0x674A, 2, 2, 0x0080, { -1, -1 }, -1, { -1, -1 }, 0x00FF, 0x000FFF, 0x001000, { -1, -1 }, { 0x002000, 0x002003 }, { 0x002007, 0x002007 }, { -1, -1 }, 0x3F80, "p16c74a.inc" , "16c74a_g.lkr" , 0 },
{ PROC_CLASS_PIC14 , "__16C74B" , { "pic16c74b" , "p16c74b" , "16c74b" }, 0x674B, 2, 2, 0x0080, { -1, -1 }, -1, { -1, -1 }, 0x00FF, 0x000FFF, 0x001000, { -1, -1 }, { 0x002000, 0x002003 }, { 0x002007, 0x002007 }, { -1, -1 }, 0x3F80, "p16c74b.inc" , "16c74b_g.lkr" , 0 },
{ PROC_CLASS_PIC14 , "__16C76" , { "pic16c76" , "p16c76" , "16c76" }, 0x6C76, 4, 4, 0x0180, { 0x70, 0x7F }, -1, { -1, -1 }, 0x01FF, 0x001FFF, 0x002000, { -1, -1 }, { 0x002000, 0x002003 }, { 0x002007, 0x002007 }, { -1, -1 }, 0x3F80, "p16c76.inc" , "16c76_g.lkr" , 0 },
{ PROC_CLASS_PIC14 , "__16C77" , { "pic16c77" , "p16c77" , "16c77" }, 0x6C77, 4, 4, 0x0180, { 0x70, 0x7F }, -1, { -1, -1 }, 0x01FF, 0x001FFF, 0x002000, { -1, -1 }, { 0x002000, 0x002003 }, { 0x002007, 0x002007 }, { -1, -1 }, 0x3F80, "p16c77.inc" , "16c77_g.lkr" , 0 },
{ PROC_CLASS_PIC14 , "__16C84" , { "pic16c84" , "p16c84" , "16c84" }, 0x6C84, 1, 2, 0x0080, { -1, -1 }, -1, { -1, -1 }, 0x008B, 0x00213F, 0x000400, { 0x000400, 0x0020FF }, { 0x002000, 0x002003 }, { 0x002007, 0x002007 }, { 0x002100, 0x00213F }, 0x3F80, "p16c84.inc" , "16c84_g.lkr" , 0 },
{ PROC_CLASS_PIC14 , "__16C432" , { "pic16c432" , "p16c432" , "16c432" }, 0x6432, 1, 2, 0x0080, { 0x70, 0x7F }, -1, { -1, -1 }, 0x00FF, 0x0007FF, 0x000800, { -1, -1 }, { 0x002000, 0x002003 }, { 0x002007, 0x002007 }, { -1, -1 }, 0x3F80, "p16c432.inc" , "16c432_g.lkr" , 0 },
{ PROC_CLASS_PIC14 , "__16C433" , { "pic16c433" , "p16c433" , "16c433" }, 0x6433, 1, 2, 0x0080, { 0x70, 0x7F }, -1, { -1, -1 }, 0x00FF, 0x0007FF, 0x000800, { -1, -1 }, { 0x002000, 0x002003 }, { 0x002007, 0x002007 }, { -1, -1 }, 0x3F80, "p16c433.inc" , "16c433_g.lkr" , 0 },
{ PROC_CLASS_PIC12 , "__16C505" , { "pic16c505" , "p16c505" , "16c505" }, 0x2505, 2, 4, 0x0060, { 0x08, 0x0F }, 0x00F, { -1, -1 }, 0x007F, 0x0003FF, 0x000400, { -1, -1 }, { 0x000400, 0x000403 }, { 0x000FFF, 0x000FFF }, { -1, -1 }, 0x0FF0, "p16c505.inc" , "16c505_g.lkr" , 0 },
{ PROC_CLASS_PIC14 , "__16C554" , { "pic16c554" , "p16c554" , "16c554" }, 0x6554, 1, 2, 0x0080, { -1, -1 }, -1, { -1, -1 }, 0x009F, 0x0001FF, 0x000200, { -1, -1 }, { 0x002000, 0x002003 }, { 0x002007, 0x002007 }, { -1, -1 }, 0x3F80, "p16c554.inc" , "16c554_g.lkr" , 0 },
{ PROC_CLASS_PIC14 , "__16C557" , { "pic16c557" , "p16c557" , "16c557" }, 0x6557, 1, 2, 0x0080, { 0x70, 0x7F }, -1, { -1, -1 }, 0x00FF, 0x0007FF, 0x000800, { -1, -1 }, { 0x002000, 0x002003 }, { 0x002007, 0x002007 }, { -1, -1 }, 0x3F80, "p16c557.inc" , "16c557_g.lkr" , 0 },
{ PROC_CLASS_PIC14 , "__16C558" , { "pic16c558" , "p16c558" , "16c558" }, 0x6558, 1, 2, 0x0080, { -1, -1 }, -1, { -1, -1 }, 0x00BF, 0x0007FF, 0x000800, { -1, -1 }, { 0x002000, 0x002003 }, { 0x002007, 0x002007 }, { -1, -1 }, 0x3F80, "p16c558.inc" , "16c558_g.lkr" , 0 },
{ PROC_CLASS_PIC14 , "__16C620" , { "pic16c620" , "p16c620" , "16c620" }, 0x6620, 1, 2, 0x0080, { -1, -1 }, -1, { -1, -1 }, 0x009F, 0x0001FF, 0x000200, { -1, -1 }, { 0x002000, 0x002003 }, { 0x002007, 0x002007 }, { -1, -1 }, 0x3F80, "p16c620.inc" , "16c620_g.lkr" , 0 },
{ PROC_CLASS_PIC14 , "__16C620A" , { "pic16c620a" , "p16c620a" , "16c620a" }, 0x620A, 1, 2, 0x0080, { 0x70, 0x7F }, -1, { -1, -1 }, 0x00FF, 0x0001FF, 0x000200, { -1, -1 }, { 0x002000, 0x002003 }, { 0x002007, 0x002007 }, { -1, -1 }, 0x3F80, "p16c620a.inc" , "16c620a_g.lkr" , 0 },
{ PROC_CLASS_PIC14 , "__16C621" , { "pic16c621" , "p16c621" , "16c621" }, 0x6621, 1, 2, 0x0080, { -1, -1 }, -1, { -1, -1 }, 0x009F, 0x0003FF, 0x000400, { -1, -1 }, { 0x002000, 0x002003 }, { 0x002007, 0x002007 }, { -1, -1 }, 0x3F80, "p16c621.inc" , "16c621_g.lkr" , 0 },
{ PROC_CLASS_PIC14 , "__16C621A" , { "pic16c621a" , "p16c621a" , "16c621a" }, 0x621A, 1, 2, 0x0080, { 0x70, 0x7F }, -1, { -1, -1 }, 0x00FF, 0x0003FF, 0x000400, { -1, -1 }, { 0x002000, 0x002003 }, { 0x002007, 0x002007 }, { -1, -1 }, 0x3F80, "p16c621a.inc" , "16c621a_g.lkr" , 0 },
{ PROC_CLASS_PIC14 , "__16C622" , { "pic16c622" , "p16c622" , "16c622" }, 0x6622, 1, 2, 0x0080, { -1, -1 }, -1, { -1, -1 }, 0x00BF, 0x0007FF, 0x000800, { -1, -1 }, { 0x002000, 0x002003 }, { 0x002007, 0x002007 }, { -1, -1 }, 0x3F80, "p16c622.inc" , "16c622_g.lkr" , 0 },
{ PROC_CLASS_PIC14 , "__16C622A" , { "pic16c622a" , "p16c622a" , "16c622a" }, 0x622A, 1, 2, 0x0080, { 0x70, 0x7F }, -1, { -1, -1 }, 0x00FF, 0x0007FF, 0x000800, { -1, -1 }, { 0x002000, 0x002003 }, { 0x002007, 0x002007 }, { -1, -1 }, 0x3F80, "p16c622a.inc" , "16c622a_g.lkr" , 0 },
{ PROC_CLASS_PIC14 , "__16C642" , { "pic16c642" , "p16c642" , "16c642" }, 0x6642, 2, 2, 0x0080, { 0x70, 0x7F }, -1, { -1, -1 }, 0x00FF, 0x000FFF, 0x001000, { -1, -1 }, { 0x002000, 0x002003 }, { 0x002007, 0x002007 }, { -1, -1 }, 0x3F80, "p16c642.inc" , "16c642_g.lkr" , 0 },
{ PROC_CLASS_PIC14 , "__16C662" , { "pic16c662" , "p16c662" , "16c662" }, 0x6662, 2, 2, 0x0080, { 0x70, 0x7F }, -1, { -1, -1 }, 0x00FF, 0x000FFF, 0x001000, { -1, -1 }, { 0x002000, 0x002003 }, { 0x002007, 0x002007 }, { -1, -1 }, 0x3F80, "p16c662.inc" , "16c662_g.lkr" , 0 },
{ PROC_CLASS_PIC14 , "__16C710" , { "pic16c710" , "p16c710" , "16c710" }, 0x6710, 1, 2, 0x0080, { 0x0C, 0x2F }, -1, { -1, -1 }, 0x00AF, 0x0001FF, 0x000200, { -1, -1 }, { 0x002000, 0x002003 }, { 0x002007, 0x002007 }, { -1, -1 }, 0x3F80, "p16c710.inc" , "16c710_g.lkr" , 0 },
{ PROC_CLASS_PIC14 , "__16C711" , { "pic16c711" , "p16c711" , "16c711" }, 0x6711, 1, 2, 0x0080, { 0x0C, 0x4F }, -1, { -1, -1 }, 0x00CF, 0x0003FF, 0x000400, { -1, -1 }, { 0x002000, 0x002003 }, { 0x002007, 0x002007 }, { -1, -1 }, 0x3F80, "p16c711.inc" , "16c711_g.lkr" , 0 },
{ PROC_CLASS_PIC14 , "__16C712" , { "pic16c712" , "p16c712" , "16c712" }, 0x6712, 1, 2, 0x0080, { -1, -1 }, -1, { -1, -1 }, 0x00BF, 0x0003FF, 0x000400, { -1, -1 }, { 0x002000, 0x002003 }, { 0x002007, 0x002007 }, { -1, -1 }, 0x3F80, "p16c712.inc" , "16c712_g.lkr" , 0 },
{ PROC_CLASS_PIC14 , "__16C715" , { "pic16c715" , "p16c715" , "16c715" }, 0x6715, 1, 2, 0x0080, { -1, -1 }, -1, { -1, -1 }, 0x00BF, 0x0007FF, 0x000800, { -1, -1 }, { 0x002000, 0x002003 }, { 0x002007, 0x002007 }, { -1, -1 }, 0x3F80, "p16c715.inc" , "16c715_g.lkr" , 0 },
{ PROC_CLASS_PIC14 , "__16C716" , { "pic16c716" , "p16c716" , "16c716" }, 0x6716, 1, 2, 0x0080, { -1, -1 }, -1, { -1, -1 }, 0x00BF, 0x0007FF, 0x000800, { -1, -1 }, { 0x002000, 0x002003 }, { 0x002007, 0x002007 }, { -1, -1 }, 0x3F80, "p16c716.inc" , "16c716_g.lkr" , 0 },
{ PROC_CLASS_PIC14 , "__16C717" , { "pic16c717" , "p16c717" , "16c717" }, 0x6717, 1, 4, 0x0180, { 0x70, 0x7F }, -1, { -1, -1 }, 0x01FF, 0x0007FF, 0x000800, { -1, -1 }, { 0x002000, 0x002003 }, { 0x002007, 0x002007 }, { -1, -1 }, 0x3F80, "p16c717.inc" , "16c717_g.lkr" , 0 },
{ PROC_CLASS_PIC14 , "__16C745" , { "pic16c745" , "p16c745" , "16c745" }, 0x6745, 4, 4, 0x0180, { 0x70, 0x7F }, -1, { -1, -1 }, 0x01FF, 0x001FFF, 0x002000, { -1, -1 }, { 0x002000, 0x002003 }, { 0x002007, 0x002007 }, { -1, -1 }, 0x3F80, "p16c745.inc" , "16c745_g.lkr" , 0 },
{ PROC_CLASS_PIC14 , "__16C765" , { "pic16c765" , "p16c765" , "16c765" }, 0x6765, 4, 4, 0x0180, { 0x70, 0x7F }, -1, { -1, -1 }, 0x01FF, 0x001FFF, 0x002000, { -1, -1 }, { 0x002000, 0x002003 }, { 0x002007, 0x002007 }, { -1, -1 }, 0x3F80, "p16c765.inc" , "16c765_g.lkr" , 0 },
{ PROC_CLASS_PIC14 , "__16C770" , { "pic16c770" , "p16c770" , "16c770" }, 0x6770, 1, 4, 0x0180, { 0x70, 0x7F }, -1, { -1, -1 }, 0x01FF, 0x0007FF, 0x000800, { -1, -1 }, { 0x002000, 0x002003 }, { 0x002007, 0x002007 }, { -1, -1 }, 0x3F80, "p16c770.inc" , "16c770_g.lkr" , 0 },
{ PROC_CLASS_PIC14 , "__16C771" , { "pic16c771" , "p16c771" , "16c771" }, 0x6771, 2, 4, 0x0180, { 0x70, 0x7F }, -1, { -1, -1 }, 0x01FF, 0x000FFF, 0x001000, { -1, -1 }, { 0x002000, 0x002003 }, { 0x002007, 0x002007 }, { -1, -1 }, 0x3F80, "p16c771.inc" , "16c771_g.lkr" , 0 },
{ PROC_CLASS_PIC14 , "__16C773" , { "pic16c773" , "p16c773" , "16c773" }, 0x6773, 2, 4, 0x0180, { 0x70, 0x7F }, -1, { -1, -1 }, 0x01FF, 0x000FFF, 0x001000, { -1, -1 }, { 0x002000, 0x002003 }, { 0x002007, 0x002007 }, { -1, -1 }, 0x3F80, "p16c773.inc" , "16c773_g.lkr" , 0 },
{ PROC_CLASS_PIC14 , "__16C774" , { "pic16c774" , "p16c774" , "16c774" }, 0x6774, 2, 4, 0x0180, { 0x70, 0x7F }, -1, { -1, -1 }, 0x01FF, 0x000FFF, 0x001000, { -1, -1 }, { 0x002000, 0x002003 }, { 0x002007, 0x002007 }, { -1, -1 }, 0x3F80, "p16c774.inc" , "16c774_g.lkr" , 0 },
{ PROC_CLASS_PIC14 , "__16C781" , { "pic16c781" , "p16c781" , "16c781" }, 0x6781, 1, 4, 0x0180, { 0x70, 0x7F }, -1, { -1, -1 }, 0x01FF, 0x0003FF, 0x000400, { -1, -1 }, { 0x002000, 0x002003 }, { 0x002007, 0x002007 }, { -1, -1 }, 0x3F80, "p16c781.inc" , "16c781_g.lkr" , 0 },
{ PROC_CLASS_PIC14 , "__16C782" , { "pic16c782" , "p16c782" , "16c782" }, 0x6782, 1, 4, 0x0180, { 0x70, 0x7F }, -1, { -1, -1 }, 0x01FF, 0x0007FF, 0x000800, { -1, -1 }, { 0x002000, 0x002003 }, { 0x002007, 0x002007 }, { -1, -1 }, 0x3F80, "p16c782.inc" , "16c782_g.lkr" , 0 },
{ PROC_CLASS_PIC14 , "__16C923" , { "pic16c923" , "p16c923" , "16c923" }, 0x6923, 2, 4, 0x0180, { 0x70, 0x7F }, -1, { -1, -1 }, 0x01FF, 0x000FFF, 0x001000, { -1, -1 }, { 0x002000, 0x002003 }, { 0x002007, 0x002007 }, { -1, -1 }, 0x3F80, "p16c923.inc" , "16c923_g.lkr" , 0 },
{ PROC_CLASS_PIC14 , "__16C924" , { "pic16c924" , "p16c924" , "16c924" }, 0x6924, 2, 4, 0x0180, { 0x70, 0x7F }, -1, { -1, -1 }, 0x01FF, 0x000FFF, 0x001000, { -1, -1 }, { 0x002000, 0x002003 }, { 0x002007, 0x002007 }, { -1, -1 }, 0x3F80, "p16c924.inc" , "16c924_g.lkr" , 0 },
{ PROC_CLASS_PIC14 , "__16C925" , { "pic16c925" , "p16c925" , "16c925" }, 0x6925, 2, 4, 0x0180, { 0x70, 0x7F }, -1, { -1, -1 }, 0x01FF, 0x000FFF, 0x001000, { -1, -1 }, { 0x002000, 0x002003 }, { 0x002007, 0x002007 }, { -1, -1 }, 0x3F80, "p16c925.inc" , "16c925_g.lkr" , 0 },
{ PROC_CLASS_PIC14 , "__16C926" , { "pic16c926" , "p16c926" , "16c926" }, 0x6926, 4, 4, 0x0180, { 0x70, 0x7F }, -1, { -1, -1 }, 0x01FF, 0x001FFF, 0x002000, { -1, -1 }, { 0x002000, 0x002003 }, { 0x002007, 0x002007 }, { -1, -1 }, 0x3F80, "p16c926.inc" , "16c926_g.lkr" , 0 },
{ PROC_CLASS_PIC14 , "__16CE623" , { "pic16ce623" , "p16ce623" , "16ce623" }, 0x6623, 1, 2, 0x0080, { 0x70, 0x7F }, -1, { -1, -1 }, 0x00FF, 0x0001FF, 0x000200, { -1, -1 }, { 0x002000, 0x002003 }, { 0x002007, 0x002007 }, { -1, -1 }, 0x3F80, "p16ce623.inc" , "16ce623_g.lkr" , 0 },
{ PROC_CLASS_PIC14 , "__16CE624" , { "pic16ce624" , "p16ce624" , "16ce624" }, 0x6624, 1, 2, 0x0080, { 0x70, 0x7F }, -1, { -1, -1 }, 0x00FF, 0x0003FF, 0x000400, { -1, -1 }, { 0x002000, 0x002003 }, { 0x002007, 0x002007 }, { -1, -1 }, 0x3F80, "p16ce624.inc" , "16ce624_g.lkr" , 0 },
{ PROC_CLASS_PIC14 , "__16CE625" , { "pic16ce625" , "p16ce625" , "16ce625" }, 0x6625, 1, 2, 0x0080, { 0x70, 0x7F }, -1, { -1, -1 }, 0x00FF, 0x0007FF, 0x000800, { -1, -1 }, { 0x002000, 0x002003 }, { 0x002007, 0x002007 }, { -1, -1 }, 0x3F80, "p16ce625.inc" , "16ce625_g.lkr" , 0 },
{ PROC_CLASS_PIC12 , "__16CR54" , { "pic16cr54" , "p16cr54" , "16cr54" }, 0xDC54, 1, 1, 0x0000, { -1, -1 }, -1, { -1, -1 }, 0x001F, 0x0001FF, 0x000200, { -1, -1 }, { 0x000200, 0x000203 }, { 0x000FFF, 0x000FFF }, { -1, -1 }, 0x0FF0, "p16cr54.inc" , "16cr54_g.lkr" , 0 },
{ PROC_CLASS_PIC12 , "__16CR54A" , { "pic16cr54a" , "p16cr54a" , "16cr54a" }, 0xD54A, 1, 1, 0x0000, { -1, -1 }, -1, { -1, -1 }, 0x001F, 0x0001FF, 0x000200, { -1, -1 }, { 0x000200, 0x000203 }, { 0x000FFF, 0x000FFF }, { -1, -1 }, 0x0FF0, "p16cr54a.inc" , "16cr54a_g.lkr" , 0 },
{ PROC_CLASS_PIC12 , "__16CR54B" , { "pic16cr54b" , "p16cr54b" , "16cr54b" }, 0xD54B, 1, 1, 0x0000, { -1, -1 }, -1, { -1, -1 }, 0x001F, 0x0001FF, 0x000200, { -1, -1 }, { 0x000200, 0x000203 }, { 0x000FFF, 0x000FFF }, { -1, -1 }, 0x0FF0, "p16cr54a.inc" , "16cr54b_g.lkr" , 0 },
{ PROC_CLASS_PIC12 , "__16CR54C" , { "pic16cr54c" , "p16cr54c" , "16cr54c" }, 0xD54C, 1, 1, 0x0000, { -1, -1 }, -1, { -1, -1 }, 0x001F, 0x0001FF, 0x000200, { -1, -1 }, { 0x000200, 0x000203 }, { 0x000FFF, 0x000FFF }, { -1, -1 }, 0x0FF0, "p16cr54c.inc" , "16cr54c_g.lkr" , 0 },
{ PROC_CLASS_PIC12 , "__16CR56A" , { "pic16cr56a" , "p16cr56a" , "16cr56a" }, 0xD56A, 2, 1, 0x0000, { -1, -1 }, -1, { -1, -1 }, 0x001F, 0x0003FF, 0x000400, { -1, -1 }, { 0x000400, 0x000403 }, { 0x000FFF, 0x000FFF }, { -1, -1 }, 0x0FF0, "p16cr56a.inc" , "16cr56a_g.lkr" , 0 },
{ PROC_CLASS_PIC12 , "__16CR57A" , { "pic16cr57a" , "p16cr57a" , "16cr57a" }, 0xD57A, 4, 4, 0x0060, { 0x08, 0x0F }, 0x00F, { -1, -1 }, 0x007F, 0x0007FF, 0x000800, { -1, -1 }, { 0x000800, 0x000803 }, { 0x000FFF, 0x000FFF }, { -1, -1 }, 0x0FF0, "p16cr57a.inc" , "16cr57a_g.lkr" , 0 },
{ PROC_CLASS_PIC12 , "__16CR57B" , { "pic16cr57b" , "p16cr57b" , "16cr57b" }, 0xD57B, 4, 4, 0x0060, { 0x08, 0x0F }, 0x00F, { -1, -1 }, 0x007F, 0x0007FF, 0x000800, { -1, -1 }, { 0x000800, 0x000803 }, { 0x000FFF, 0x000FFF }, { -1, -1 }, 0x0FF0, "p16cr57b.inc" , "16cr57b_g.lkr" , 0 },
{ PROC_CLASS_PIC12 , "__16CR57C" , { "pic16cr57c" , "p16cr57c" , "16cr57c" }, 0xD57C, 4, 4, 0x0060, { 0x08, 0x0F }, 0x00F, { -1, -1 }, 0x007F, 0x0007FF, 0x000800, { -1, -1 }, { 0x000800, 0x000803 }, { 0x000FFF, 0x000FFF }, { -1, -1 }, 0x0FF0, "p16cr57c.inc" , "16cr57c_g.lkr" , 0 },
{ PROC_CLASS_PIC12 , "__16CR58A" , { "pic16cr58a" , "p16cr58a" , "16cr58a" }, 0xD58A, 4, 4, 0x0060, { 0x07, 0x0F }, 0x00F, { -1, -1 }, 0x007F, 0x0007FF, 0x000800, { -1, -1 }, { 0x000800, 0x000803 }, { 0x000FFF, 0x000FFF }, { -1, -1 }, 0x0FF0, "p16cr58a.inc" , "16cr58a_g.lkr" , 0 },
{ PROC_CLASS_PIC12 , "__16CR58B" , { "pic16cr58b" , "p16cr58b" , "16cr58b" }, 0xD58B, 4, 4, 0x0060, { 0x07, 0x0F }, 0x00F, { -1, -1 }, 0x007F, 0x0007FF, 0x000800, { -1, -1 }, { 0x000800, 0x000803 }, { 0x000FFF, 0x000FFF }, { -1, -1 }, 0x0FF0, "p16cr58b.inc" , "16cr58b_g.lkr" , 0 },
{ PROC_CLASS_PIC14 , "__16CR62" , { "pic16cr62" , "p16cr62" , "16cr62" }, 0xDC62, 1, 2, 0x0080, { -1, -1 }, -1, { -1, -1 }, 0x00BF, 0x0007FF, 0x000800, { -1, -1 }, { 0x002000, 0x002003 }, { 0x002007, 0x002007 }, { -1, -1 }, 0x3F80, "p16cr62.inc" , "16cr62_g.lkr" , 0 },
{ PROC_CLASS_PIC14 , "__16CR63" , { "pic16cr63" , "p16cr63" , "16cr63" }, 0x6D63, 2, 2, 0x0080, { -1, -1 }, -1, { -1, -1 }, 0x00FF, 0x000FFF, 0x001000, { -1, -1 }, { 0x002000, 0x002003 }, { 0x002007, 0x002007 }, { -1, -1 }, 0x3F80, "p16cr63.inc" , "16cr63_g.lkr" , 0 },
{ PROC_CLASS_PIC14 , "__16CR64" , { "pic16cr64" , "p16cr64" , "16cr64" }, 0xDC64, 1, 2, 0x0080, { -1, -1 }, -1, { -1, -1 }, 0x00BF, 0x0007FF, 0x000800, { -1, -1 }, { 0x002000, 0x002003 }, { 0x002007, 0x002007 }, { -1, -1 }, 0x3F80, "p16cr64.inc" , "16cr64_g.lkr" , 0 },
{ PROC_CLASS_PIC14 , "__16CR65" , { "pic16cr65" , "p16cr65" , "16cr65" }, 0x6D65, 2, 2, 0x0080, { -1, -1 }, -1, { -1, -1 }, 0x00FF, 0x000FFF, 0x001000, { -1, -1 }, { 0x002000, 0x002003 }, { 0x002007, 0x002007 }, { -1, -1 }, 0x3F80, "p16cr65.inc" , "16cr65_g.lkr" , 0 },
{ PROC_CLASS_PIC14 , "__16CR72" , { "pic16cr72" , "p16cr72" , "16cr72" }, 0x6D72, 1, 2, 0x0080, { -1, -1 }, -1, { -1, -1 }, 0x00BF, 0x0007FF, 0x000800, { -1, -1 }, { 0x002000, 0x002003 }, { 0x002007, 0x002007 }, { -1, -1 }, 0x3F80, "p16cr72.inc" , "16cr72_g.lkr" , 0 },
{ PROC_CLASS_PIC14 , "__16CR83" , { "pic16cr83" , "p16cr83" , "16cr83" }, 0xDC83, 1, 2, 0x0080, { -1, -1 }, -1, { -1, -1 }, 0x008B, 0x00213F, 0x000200, { 0x000200, 0x0020FF }, { 0x002000, 0x002003 }, { 0x002007, 0x002007 }, { 0x002100, 0x00213F }, 0x3F80, "p16cr83.inc" , "16cr83_g.lkr" , 0 },
{ PROC_CLASS_PIC14 , "__16CR84" , { "pic16cr84" , "p16cr84" , "16cr84" }, 0xDC84, 1, 2, 0x0080, { -1, -1 }, -1, { -1, -1 }, 0x008B, 0x00213F, 0x000400, { 0x000400, 0x0020FF }, { 0x002000, 0x002003 }, { 0x002007, 0x002007 }, { 0x002100, 0x00213F }, 0x3F80, "p16cr84.inc" , "16cr84_g.lkr" , 0 },
{ PROC_CLASS_PIC14 , "__16CR620A" , { "pic16cr620a" , "p16cr620a" , "16cr620a" }, 0xD20A, 1, 2, 0x0080, { 0x70, 0x7F }, -1, { -1, -1 }, 0x00FF, 0x0001FF, 0x000200, { -1, -1 }, { 0x002000, 0x002003 }, { 0x002007, 0x002007 }, { -1, -1 }, 0x3F80, "p16cr620a.inc" , "16cr620a_g.lkr" , 0 },
{ PROC_CLASS_PIC14 , "__16CXX" , { "pic16cxx" , "p16cxx" , "16cxx" }, 0x6C77, 4, 4, 0x0000, { -1, -1 }, -1, { -1, -1 }, -1, -1, -1, { -1, -1 }, { 0x002000, 0x002003 }, { -1, -1 }, { -1, -1 }, 0x3F80, NULL , NULL , 0 },
{ PROC_CLASS_PIC12 , "__16F54" , { "pic16f54" , "p16f54" , "16f54" }, 0x6F54, 1, 1, 0x0000, { -1, -1 }, -1, { -1, -1 }, 0x001F, 0x0001FF, 0x000200, { -1, -1 }, { 0x000200, 0x000203 }, { 0x000FFF, 0x000FFF }, { -1, -1 }, 0x0FF0, "p16f54.inc" , "16f54_g.lkr" , 0 },
{ PROC_CLASS_PIC12 , "__16F57" , { "pic16f57" , "p16f57" , "16f57" }, 0x6F57, 4, 4, 0x0060, { 0x08, 0x0F }, 0x00F, { -1, -1 }, 0x007F, 0x0007FF, 0x000800, { -1, -1 }, { 0x000800, 0x000803 }, { 0x000FFF, 0x000FFF }, { -1, -1 }, 0x0FF0, "p16f57.inc" , "16f57_g.lkr" , 0 },
{ PROC_CLASS_PIC12 , "__16F59" , { "pic16f59" , "p16f59" , "16f59" }, 0x6F59, 4, 8, 0x00E0, { 0x0A, 0x0F }, 0x00F, { -1, -1 }, 0x00FF, 0x0007FF, 0x000800, { -1, -1 }, { 0x000800, 0x000803 }, { 0x000FFF, 0x000FFF }, { -1, -1 }, 0x0FF0, "p16f59.inc" , "16f59_g.lkr" , 0 },
{ PROC_CLASS_PIC14 , "__16F72" , { "pic16f72" , "p16f72" , "16f72" }, 0x672F, 1, 4, 0x0180, { 0x40, 0x7F }, -1, { -1, -1 }, 0x01FF, 0x0007FF, 0x000800, { -1, -1 }, { 0x002000, 0x002003 }, { 0x002007, 0x002007 }, { -1, -1 }, 0x3F80, "p16f72.inc" , "16f72_g.lkr" , 0 },
{ PROC_CLASS_PIC14 , "__16F73" , { "pic16f73" , "p16f73" , "16f73" }, 0x673F, 2, 4, 0x0180, { -1, -1 }, -1, { -1, -1 }, 0x01FF, 0x000FFF, 0x001000, { -1, -1 }, { 0x002000, 0x002003 }, { 0x002007, 0x002007 }, { -1, -1 }, 0x3F80, "p16f73.inc" , "16f73_g.lkr" , 0 },
{ PROC_CLASS_PIC14 , "__16F74" , { "pic16f74" , "p16f74" , "16f74" }, 0x674F, 2, 4, 0x0180, { -1, -1 }, -1, { -1, -1 }, 0x01FF, 0x000FFF, 0x001000, { -1, -1 }, { 0x002000, 0x002003 }, { 0x002007, 0x002007 }, { -1, -1 }, 0x3F80, "p16f74.inc" , "16f74_g.lkr" , 0 },
{ PROC_CLASS_PIC14 , "__16F76" , { "pic16f76" , "p16f76" , "16f76" }, 0x676F, 4, 4, 0x0180, { 0x70, 0x7F }, -1, { -1, -1 }, 0x01FF, 0x001FFF, 0x002000, { -1, -1 }, { 0x002000, 0x002003 }, { 0x002007, 0x002007 }, { -1, -1 }, 0x3F80, "p16f76.inc" , "16f76_g.lkr" , 0 },
{ PROC_CLASS_PIC14 , "__16F77" , { "pic16f77" , "p16f77" , "16f77" }, 0x677F, 4, 4, 0x0180, { 0x70, 0x7F }, -1, { -1, -1 }, 0x01FF, 0x001FFF, 0x002000, { -1, -1 }, { 0x002000, 0x002003 }, { 0x002007, 0x002007 }, { -1, -1 }, 0x3F80, "p16f77.inc" , "16f77_g.lkr" , 0 },
{ PROC_CLASS_PIC14 , "__16F83" , { "pic16f83" , "p16f83" , "16f83" }, 0x6C83, 1, 2, 0x0080, { 0x0C, 0x2F }, -1, { -1, -1 }, 0x00AF, 0x00213F, 0x000200, { 0x000200, 0x0020FF }, { 0x002000, 0x002003 }, { 0x002007, 0x002007 }, { 0x002100, 0x00213F }, 0x3F80, "p16f83.inc" , "16f83_g.lkr" , 0 },
{ PROC_CLASS_PIC14 , "__16F84" , { "pic16f84" , "p16f84" , "16f84" }, 0x684A, 1, 2, 0x0080, { 0x0C, 0x4F }, -1, { -1, -1 }, 0x00CF, 0x00213F, 0x000400, { 0x000400, 0x0020FF }, { 0x002000, 0x002003 }, { 0x002007, 0x002007 }, { 0x002100, 0x00213F }, 0x3F80, "p16f84.inc" , "16f84_g.lkr" , 0 },
{ PROC_CLASS_PIC14 , "__16F84A" , { "pic16f84a" , "p16f84a" , "16f84a" }, 0x6F84, 1, 2, 0x0080, { 0x0C, 0x4F }, -1, { -1, -1 }, 0x00CF, 0x00213F, 0x000400, { 0x000400, 0x0020FF }, { 0x002000, 0x002003 }, { 0x002007, 0x002007 }, { 0x002100, 0x00213F }, 0x3F80, "p16f84a.inc" , "16f84a_g.lkr" , 0 },
{ PROC_CLASS_PIC14 , "__16F87" , { "pic16f87" , "p16f87" , "16f87" }, 0x687F, 2, 4, 0x0180, { 0x70, 0x7F }, -1, { -1, -1 }, 0x01FF, 0x0021FF, 0x001000, { 0x001000, 0x0020FF }, { 0x002000, 0x002003 }, { 0x002007, 0x002008 }, { 0x002100, 0x0021FF }, 0x3F80, "p16f87.inc" , "16f87_g.lkr" , 0 },
{ PROC_CLASS_PIC14 , "__16F88" , { "pic16f88" , "p16f88" , "16f88" }, 0x688F, 2, 4, 0x0180, { 0x70, 0x7F }, -1, { -1, -1 }, 0x01FF, 0x0021FF, 0x001000, { 0x001000, 0x0020FF }, { 0x002000, 0x002003 }, { 0x002007, 0x002008 }, { 0x002100, 0x0021FF }, 0x3F80, "p16f88.inc" , "16f88_g.lkr" , 0 },
{ PROC_CLASS_PIC12 , "__16F505" , { "pic16f505" , "p16f505" , "16f505" }, 0xF505, 2, 4, 0x0060, { 0x08, 0x0F }, 0x00F, { -1, -1 }, 0x007F, 0x0003FF, 0x000400, { -1, -1 }, { 0x000400, 0x000403 }, { 0x000FFF, 0x000FFF }, { -1, -1 }, 0x0FF0, "p16f505.inc" , "16f505_g.lkr" , 0 },
{ PROC_CLASS_PIC12 , "__16F506" , { "pic16f506" , "p16f506" , "16f506" }, 0xF506, 2, 4, 0x0060, { 0x0D, 0x0F }, 0x00F, { -1, -1 }, 0x007F, 0x0003FF, 0x000400, { -1, -1 }, { 0x000400, 0x000403 }, { 0x000FFF, 0x000FFF }, { -1, -1 }, 0x0FF0, "p16f506.inc" , "16f506_g.lkr" , 0 },
{ PROC_CLASS_PIC12 , "__16F526" , { "pic16f526" , "p16f526" , "16f526" }, 0xF526, 2, 4, 0x0060, { 0x0D, 0x0F }, -1, { -1, -1 }, 0x007F, 0x0003FF, 0x000400, { -1, -1 }, { 0x000440, 0x000443 }, { 0x000FFF, 0x000FFF }, { 0x000400, 0x00043F }, 0x0FF0, "p16f526.inc" , "16f526_g.lkr" , 0 },
{ PROC_CLASS_PIC12I , "__16F527" , { "pic16f527" , "p16f527" , "16f527" }, 0xF527, 2, 4, 0x0060, { 0x0C, 0x0F }, -1, { -1, -1 }, 0x007F, 0x0003FF, 0x000400, { -1, -1 }, { 0x000440, 0x000443 }, { 0x000FFF, 0x000FFF }, { 0x000400, 0x00043F }, 0x0FF0, "p16f527.inc" , "16f527_g.lkr" , 0 },
{ PROC_CLASS_PIC12I , "__16F570" , { "pic16f570" , "p16f570" , "16f570" }, 0xF570, 4, 8, 0x00E0, { 0x0C, 0x0F }, -1, { -1, -1 }, 0x00FF, 0x0007FF, 0x000800, { -1, -1 }, { 0x000840, 0x000843 }, { 0x000FFF, 0x000FFF }, { 0x000800, 0x00083F }, 0x0FF0, "p16f570.inc" , "16f570_g.lkr" , 0 },
{ PROC_CLASS_PIC14 , "__16F610" , { "pic16f610" , "p16f610" , "16f610" }, 0xF610, 1, 2, 0x0080, { 0x70, 0x7F }, -1, { -1, -1 }, 0x00FF, 0x0003FF, 0x000400, { -1, -1 }, { 0x002000, 0x002003 }, { 0x002007, 0x002007 }, { -1, -1 }, 0x3F80, "p16f610.inc" , "16f610_g.lkr" , 0 },
{ PROC_CLASS_PIC14 , "__16F616" , { "pic16f616" , "p16f616" , "16f616" }, 0xF616, 1, 2, 0x0080, { 0x70, 0x7F }, -1, { -1, -1 }, 0x00FF, 0x0007FF, 0x000800, { -1, -1 }, { 0x002000, 0x002003 }, { 0x002007, 0x002007 }, { -1, -1 }, 0x3F80, "p16f616.inc" , "16f616_g.lkr" , 0 },
{ PROC_CLASS_PIC14 , "__16F627" , { "pic16f627" , "p16f627" , "16f627" }, 0x6627, 1, 4, 0x0180, { 0x70, 0x7F }, -1, { -1, -1 }, 0x01FF, 0x00217F, 0x000400, { 0x000400, 0x0020FF }, { 0x002000, 0x002003 }, { 0x002007, 0x002007 }, { 0x002100, 0x00217F }, 0x3F80, "p16f627.inc" , "16f627_g.lkr" , 0 },
{ PROC_CLASS_PIC14 , "__16F627A" , { "pic16f627a" , "p16f627a" , "16f627a" }, 0x627A, 1, 4, 0x0180, { 0x70, 0x7F }, -1, { -1, -1 }, 0x01FF, 0x00217F, 0x000400, { 0x000400, 0x0020FF }, { 0x002000, 0x002003 }, { 0x002007, 0x002007 }, { 0x002100, 0x00217F }, 0x3F80, "p16f627a.inc" , "16f627a_g.lkr" , 0 },
{ PROC_CLASS_PIC14 , "__16F628" , { "pic16f628" , "p16f628" , "16f628" }, 0x6628, 1, 4, 0x0180, { 0x70, 0x7F }, -1, { -1, -1 }, 0x01FF, 0x00217F, 0x000800, { 0x000800, 0x0020FF }, { 0x002000, 0x002003 }, { 0x002007, 0x002007 }, { 0x002100, 0x00217F }, 0x3F80, "p16f628.inc" , "16f628_g.lkr" , 0 },
{ PROC_CLASS_PIC14 , "__16F628A" , { "pic16f628a" , "p16f628a" , "16f628a" }, 0x628A, 1, 4, 0x0180, { 0x70, 0x7F }, -1, { -1, -1 }, 0x01FF, 0x00217F, 0x000800, { 0x000800, 0x0020FF }, { 0x002000, 0x002003 }, { 0x002007, 0x002007 }, { 0x002100, 0x00217F }, 0x3F80, "p16f628a.inc" , "16f628a_g.lkr" , 0 },
{ PROC_CLASS_PIC14 , "__16F630" , { "pic16f630" , "p16f630" , "16f630" }, 0x6630, 1, 2, 0x0080, { 0x20, 0x5F }, -1, { -1, -1 }, 0x00DF, 0x00217F, 0x000400, { 0x0003FF, 0x0020FF }, { 0x002000, 0x002003 }, { 0x002007, 0x002007 }, { 0x002100, 0x00217F }, 0x3F80, "p16f630.inc" , "16f630_g.lkr" , 0 },
{ PROC_CLASS_PIC14 , "__16F631" , { "pic16f631" , "p16f631" , "16f631" }, 0x6631, 1, 4, 0x0180, { 0x70, 0x7F }, -1, { -1, -1 }, 0x01FF, 0x00217F, 0x000400, { 0x000400, 0x0020FF }, { 0x002000, 0x002003 }, { 0x002007, 0x002007 }, { 0x002100, 0x00217F }, 0x3F80, "p16f631.inc" , "16f631_g.lkr" , 0 },
{ PROC_CLASS_PIC14 , "__16F636" , { "pic16f636" , "p16f636" , "16f636" }, 0xF636, 1, 4, 0x0180, { 0x70, 0x7F }, -1, { -1, -1 }, 0x01FF, 0x0021FF, 0x000800, { 0x000800, 0x0020FF }, { 0x002000, 0x002003 }, { 0x002007, 0x002007 }, { 0x002100, 0x0021FF }, 0x3F80, "p16f636.inc" , "16f636_g.lkr" , 0 },
{ PROC_CLASS_PIC14 , "__16F639" , { "pic16f639" , "p16f639" , "16f639" }, 0xF639, 1, 4, 0x0180, { 0x70, 0x7F }, -1, { -1, -1 }, 0x01FF, 0x0021FF, 0x000800, { 0x000800, 0x0020FF }, { 0x002000, 0x002003 }, { 0x002007, 0x002007 }, { 0x002100, 0x0021FF }, 0x3F80, "p16f639.inc" , "16f639_g.lkr" , 0 },
{ PROC_CLASS_PIC14 , "__16F648A" , { "pic16f648a" , "p16f648a" , "16f648a" }, 0x648A, 2, 4, 0x0180, { 0x70, 0x7F }, -1, { -1, -1 }, 0x01FF, 0x0021FF, 0x001000, { 0x001000, 0x0020FF }, { 0x002000, 0x002003 }, { 0x002007, 0x002007 }, { 0x002100, 0x0021FF }, 0x3F80, "p16f648a.inc" , "16f648a_g.lkr" , 0 },
{ PROC_CLASS_PIC14 , "__16F676" , { "pic16f676" , "p16f676" , "16f676" }, 0x6676, 1, 2, 0x0080, { 0x20, 0x5F }, -1, { -1, -1 }, 0x00DF, 0x00217F, 0x000400, { 0x0003FF, 0x0020FF }, { 0x002000, 0x002003 }, { 0x002007, 0x002007 }, { 0x002100, 0x00217F }, 0x3F80, "p16f676.inc" , "16f676_g.lkr" , 0 },
{ PROC_CLASS_PIC14 , "__16F677" , { "pic16f677" , "p16f677" , "16f677" }, 0x6677, 1, 4, 0x0180, { 0x70, 0x7F }, -1, { -1, -1 }, 0x01FF, 0x0021FF, 0x000800, { 0x000800, 0x0020FF }, { 0x002000, 0x002003 }, { 0x002007, 0x002007 }, { 0x002100, 0x0021FF }, 0x3F80, "p16f677.inc" , "16f677_g.lkr" , 0 },
{ PROC_CLASS_PIC14 , "__16F684" , { "pic16f684" , "p16f684" , "16f684" }, 0x6684, 1, 2, 0x0080, { 0x70, 0x7F }, -1, { -1, -1 }, 0x00FF, 0x0021FF, 0x000800, { 0x000800, 0x0020FF }, { 0x002000, 0x002003 }, { 0x002007, 0x002007 }, { 0x002100, 0x0021FF }, 0x3F80, "p16f684.inc" , "16f684_g.lkr" , 0 },
{ PROC_CLASS_PIC14 , "__16F685" , { "pic16f685" , "p16f685" , "16f685" }, 0x6685, 2, 4, 0x0180, { 0x70, 0x7F }, -1, { -1, -1 }, 0x01FF, 0x0021FF, 0x001000, { 0x001000, 0x0020FF }, { 0x002000, 0x002003 }, { 0x002007, 0x002007 }, { 0x002100, 0x0021FF }, 0x3F80, "p16f685.inc" , "16f685_g.lkr" , 0 },
{ PROC_CLASS_PIC14 , "__16F687" , { "pic16f687" , "p16f687" , "16f687" }, 0x6687, 1, 4, 0x0180, { 0x70, 0x7F }, -1, { -1, -1 }, 0x01FF, 0x0021FF, 0x000800, { 0x000800, 0x0020FF }, { 0x002000, 0x002003 }, { 0x002007, 0x002007 }, { 0x002100, 0x0021FF }, 0x3F80, "p16f687.inc" , "16f687_g.lkr" , 0 },
{ PROC_CLASS_PIC14 , "__16F688" , { "pic16f688" , "p16f688" , "16f688" }, 0x6688, 2, 4, 0x0180, { 0x70, 0x7F }, -1, { -1, -1 }, 0x01FF, 0x0021FF, 0x001000, { 0x001000, 0x0020FF }, { 0x002000, 0x002003 }, { 0x002007, 0x002007 }, { 0x002100, 0x0021FF }, 0x3F80, "p16f688.inc" , "16f688_g.lkr" , 0 },
{ PROC_CLASS_PIC14 , "__16F689" , { "pic16f689" , "p16f689" , "16f689" }, 0x6689, 2, 4, 0x0180, { 0x70, 0x7F }, -1, { -1, -1 }, 0x01FF, 0x0021FF, 0x001000, { 0x001000, 0x0020FF }, { 0x002000, 0x002003 }, { 0x002007, 0x002007 }, { 0x002100, 0x0021FF }, 0x3F80, "p16f689.inc" , "16f689_g.lkr" , 0 },
{ PROC_CLASS_PIC14 , "__16F690" , { "pic16f690" , "p16f690" , "16f690" }, 0x6690, 2, 4, 0x0180, { 0x70, 0x7F }, -1, { -1, -1 }, 0x01FF, 0x0021FF, 0x001000, { 0x001000, 0x0020FF }, { 0x002000, 0x002003 }, { 0x002007, 0x002007 }, { 0x002100, 0x0021FF }, 0x3F80, "p16f690.inc" , "16f690_g.lkr" , 0 },
{ PROC_CLASS_PIC14 , "__16F707" , { "pic16f707" , "p16f707" , "16f707" }, 0xF707, 4, 4, 0x0180, { 0x70, 0x7F }, -1, { -1, -1 }, 0x01FF, 0x001FFF, 0x002000, { -1, -1 }, { 0x002000, 0x002003 }, { 0x002007, 0x002008 }, { -1, -1 }, 0x3F80, "p16f707.inc" , "16f707_g.lkr" , 0 },
{ PROC_CLASS_PIC14 , "__16F716" , { "pic16f716" , "p16f716" , "16f716" }, 0xF716, 1, 2, 0x0080, { 0x70, 0x7F }, -1, { -1, -1 }, 0x00FF, 0x0007FF, 0x000800, { -1, -1 }, { 0x002000, 0x002003 }, { 0x002007, 0x002007 }, { -1, -1 }, 0x3F80, "p16f716.inc" , "16f716_g.lkr" , 0 },
{ PROC_CLASS_PIC14 , "__16F720" , { "pic16f720" , "p16f720" , "16f720" }, 0xF720, 1, 4, 0x0180, { 0x70, 0x7F }, -1, { -1, -1 }, 0x01FF, 0x0007FF, 0x000800, { -1, -1 }, { 0x002000, 0x002003 }, { 0x002007, 0x002008 }, { -1, -1 }, 0x3F80, "p16f720.inc" , "16f720_g.lkr" , 0 },
{ PROC_CLASS_PIC14 , "__16F721" , { "pic16f721" , "p16f721" , "16f721" }, 0xF721, 2, 4, 0x0180, { 0x70, 0x7F }, -1, { -1, -1 }, 0x01FF, 0x000FFF, 0x001000, { -1, -1 }, { 0x002000, 0x002003 }, { 0x002007, 0x002008 }, { -1, -1 }, 0x3F80, "p16f721.inc" , "16f721_g.lkr" , 0 },
{ PROC_CLASS_PIC14 , "__16F722" , { "pic16f722" , "p16f722" , "16f722" }, 0xF722, 1, 4, 0x0180, { 0x70, 0x7F }, -1, { -1, -1 }, 0x01FF, 0x0007FF, 0x000800, { -1, -1 }, { 0x002000, 0x002003 }, { 0x002007, 0x002008 }, { -1, -1 }, 0x3F80, "p16f722.inc" , "16f722_g.lkr" , 0 },
{ PROC_CLASS_PIC14 , "__16F722A" , { "pic16f722a" , "p16f722a" , "16f722a" }, 0xA722, 1, 4, 0x0180, { 0x70, 0x7F }, -1, { -1, -1 }, 0x01FF, 0x0007FF, 0x000800, { -1, -1 }, { 0x002000, 0x002003 }, { 0x002007, 0x002008 }, { -1, -1 }, 0x3F80, "p16f722a.inc" , "16f722a_g.lkr" , 0 },
{ PROC_CLASS_PIC14 , "__16F723" , { "pic16f723" , "p16f723" , "16f723" }, 0xF723, 2, 4, 0x0180, { 0x70, 0x7F }, -1, { -1, -1 }, 0x01FF, 0x000FFF, 0x001000, { -1, -1 }, { 0x002000, 0x002003 }, { 0x002007, 0x002008 }, { -1, -1 }, 0x3F80, "p16f723.inc" , "16f723_g.lkr" , 0 },
{ PROC_CLASS_PIC14 , "__16F723A" , { "pic16f723a" , "p16f723a" , "16f723a" }, 0xA723, 2, 4, 0x0180, { 0x70, 0x7F }, -1, { -1, -1 }, 0x01FF, 0x000FFF, 0x001000, { -1, -1 }, { 0x002000, 0x002003 }, { 0x002007, 0x002008 }, { -1, -1 }, 0x3F80, "p16f723a.inc" , "16f723a_g.lkr" , 0 },
{ PROC_CLASS_PIC14 , "__16F724" , { "pic16f724" , "p16f724" , "16f724" }, 0xF724, 2, 4, 0x0180, { 0x70, 0x7F }, -1, { -1, -1 }, 0x01FF, 0x000FFF, 0x001000, { -1, -1 }, { 0x002000, 0x002003 }, { 0x002007, 0x002008 }, { -1, -1 }, 0x3F80, "p16f724.inc" , "16f724_g.lkr" , 0 },
{ PROC_CLASS_PIC14 , "__16F726" , { "pic16f726" , "p16f726" , "16f726" }, 0xF726, 4, 4, 0x0180, { 0x70, 0x7F }, -1, { -1, -1 }, 0x01FF, 0x001FFF, 0x002000, { -1, -1 }, { 0x002000, 0x002003 }, { 0x002007, 0x002008 }, { -1, -1 }, 0x3F80, "p16f726.inc" , "16f726_g.lkr" , 0 },
{ PROC_CLASS_PIC14 , "__16F727" , { "pic16f727" , "p16f727" , "16f727" }, 0xF727, 4, 4, 0x0180, { 0x70, 0x7F }, -1, { -1, -1 }, 0x01FF, 0x001FFF, 0x002000, { -1, -1 }, { 0x002000, 0x002003 }, { 0x002007, 0x002008 }, { -1, -1 }, 0x3F80, "p16f727.inc" , "16f727_g.lkr" , 0 },
{ PROC_CLASS_PIC14 , "__16F737" , { "pic16f737" , "p16f737" , "16f737" }, 0x6737, 2, 4, 0x0180, { 0x70, 0x7F }, -1, { -1, -1 }, 0x01FF, 0x000FFF, 0x001000, { -1, -1 }, { 0x002000, 0x002003 }, { 0x002007, 0x002008 }, { -1, -1 }, 0x3F80, "p16f737.inc" , "16f737_g.lkr" , 0 },
{ PROC_CLASS_PIC14 , "__16F747" , { "pic16f747" , "p16f747" , "16f747" }, 0x6747, 2, 4, 0x0180, { 0x70, 0x7F }, -1, { -1, -1 }, 0x01FF, 0x000FFF, 0x001000, { -1, -1 }, { 0x002000, 0x002003 }, { 0x002007, 0x002008 }, { -1, -1 }, 0x3F80, "p16f747.inc" , "16f747_g.lkr" , 0 },
{ PROC_CLASS_PIC14 , "__16F753" , { "pic16f753" , "p16f753" , "16f753" }, 0xF753, 1, 4, 0x0180, { 0x70, 0x7F }, -1, { -1, -1 }, 0x01FF, 0x0007FF, 0x000800, { -1, -1 }, { 0x002000, 0x002003 }, { 0x002007, 0x002007 }, { -1, -1 }, 0x3F80, "p16f753.inc" , "16f753_g.lkr" , 0 },
{ PROC_CLASS_PIC14 , "__16F767" , { "pic16f767" , "p16f767" , "16f767" }, 0x6767, 4, 4, 0x0180, { 0x70, 0x7F }, -1, { -1, -1 }, 0x01FF, 0x001FFF, 0x002000, { -1, -1 }, { 0x002000, 0x002003 }, { 0x002007, 0x002008 }, { -1, -1 }, 0x3F80, "p16f767.inc" , "16f767_g.lkr" , 0 },
{ PROC_CLASS_PIC14 , "__16F777" , { "pic16f777" , "p16f777" , "16f777" }, 0x6777, 4, 4, 0x0180, { 0x70, 0x7F }, -1, { -1, -1 }, 0x01FF, 0x001FFF, 0x002000, { -1, -1 }, { 0x002000, 0x002003 }, { 0x002007, 0x002008 }, { -1, -1 }, 0x3F80, "p16f777.inc" , "16f777_g.lkr" , 0 },
{ PROC_CLASS_PIC14 , "__16F785" , { "pic16f785" , "p16f785" , "16f785" }, 0xF785, 1, 4, 0x0180, { 0x70, 0x7F }, -1, { -1, -1 }, 0x01FF, 0x0021FF, 0x000800, { 0x000800, 0x0020FF }, { 0x002000, 0x002003 }, { 0x002007, 0x002007 }, { 0x002100, 0x0021FF }, 0x3F80, "p16f785.inc" , "16f785_g.lkr" , 0 },
{ PROC_CLASS_PIC14 , "__16F818" , { "pic16f818" , "p16f818" , "16f818" }, 0x818F, 1, 4, 0x0180, { 0x40, 0x7F }, -1, { -1, -1 }, 0x01FF, 0x00217F, 0x000400, { 0x000400, 0x0020FF }, { 0x002000, 0x002003 }, { 0x002007, 0x002007 }, { 0x002100, 0x00217F }, 0x3F80, "p16f818.inc" , "16f818_g.lkr" , 0 },
{ PROC_CLASS_PIC14 , "__16F819" , { "pic16f819" , "p16f819" , "16f819" }, 0x819F, 1, 4, 0x0180, { 0x70, 0x7F }, -1, { -1, -1 }, 0x01FF, 0x0021FF, 0x000800, { 0x000800, 0x0020FF }, { 0x002000, 0x002003 }, { 0x002007, 0x002007 }, { 0x002100, 0x0021FF }, 0x3F80, "p16f819.inc" , "16f819_g.lkr" , 0 },
{ PROC_CLASS_PIC14 , "__16F870" , { "pic16f870" , "p16f870" , "16f870" }, 0x870F, 1, 4, 0x0180, { 0x70, 0x7F }, -1, { -1, -1 }, 0x01FF, 0x00213F, 0x000800, { 0x000800, 0x0020FF }, { 0x002000, 0x002003 }, { 0x002007, 0x002007 }, { 0x002100, 0x00213F }, 0x3F80, "p16f870.inc" , "16f870_g.lkr" , 0 },
{ PROC_CLASS_PIC14 , "__16F871" , { "pic16f871" , "p16f871" , "16f871" }, 0x871F, 1, 4, 0x0180, { 0x70, 0x7F }, -1, { -1, -1 }, 0x01FF, 0x00213F, 0x000800, { 0x000800, 0x0020FF }, { 0x002000, 0x002003 }, { 0x002007, 0x002007 }, { 0x002100, 0x00213F }, 0x3F80, "p16f871.inc" , "16f871_g.lkr" , 0 },
{ PROC_CLASS_PIC14 , "__16F872" , { "pic16f872" , "p16f872" , "16f872" }, 0x872F, 1, 4, 0x0180, { 0x70, 0x7F }, -1, { -1, -1 }, 0x01FF, 0x00213F, 0x000800, { 0x000800, 0x0020FF }, { 0x002000, 0x002003 }, { 0x002007, 0x002007 }, { 0x002100, 0x00213F }, 0x3F80, "p16f872.inc" , "16f872_g.lkr" , 0 },
{ PROC_CLASS_PIC14 , "__16F873" , { "pic16f873" , "p16f873" , "16f873" }, 0x873F, 2, 4, 0x0180, { 0x70, 0x7F }, -1, { -1, -1 }, 0x01FF, 0x00217F, 0x001000, { 0x001000, 0x0020FF }, { 0x002000, 0x002003 }, { 0x002007, 0x002007 }, { 0x002100, 0x00217F }, 0x3F80, "p16f873.inc" , "16f873_g.lkr" , 0 },
{ PROC_CLASS_PIC14 , "__16F873A" , { "pic16f873a" , "p16f873a" , "16f873a" }, 0x873A, 2, 4, 0x0180, { 0x70, 0x7F }, -1, { -1, -1 }, 0x01FF, 0x00217F, 0x001000, { 0x001000, 0x0020FF }, { 0x002000, 0x002003 }, { 0x002007, 0x002007 }, { 0x002100, 0x00217F }, 0x3F80, "p16f873a.inc" , "16f873a_g.lkr" , 0 },
{ PROC_CLASS_PIC14 , "__16F874" , { "pic16f874" , "p16f874" , "16f874" }, 0x874F, 2, 4, 0x0180, { 0x70, 0x7F }, -1, { -1, -1 }, 0x01FF, 0x00217F, 0x001000, { 0x001000, 0x0020FF }, { 0x002000, 0x002003 }, { 0x002007, 0x002007 }, { 0x002100, 0x00217F }, 0x3F80, "p16f874.inc" , "16f874_g.lkr" , 0 },
{ PROC_CLASS_PIC14 , "__16F874A" , { "pic16f874a" , "p16f874a" , "16f874a" }, 0x874A, 2, 4, 0x0180, { 0x70, 0x7F }, -1, { -1, -1 }, 0x01FF, 0x00217F, 0x001000, { 0x001000, 0x0020FF }, { 0x002000, 0x002003 }, { 0x002007, 0x002007 }, { 0x002100, 0x00217F }, 0x3F80, "p16f874a.inc" , "16f874a_g.lkr" , 0 },
{ PROC_CLASS_PIC14 , "__16F876" , { "pic16f876" , "p16f876" , "16f876" }, 0x876F, 4, 4, 0x0180, { 0x70, 0x7F }, -1, { -1, -1 }, 0x01FF, 0x0021FF, 0x002000, { 0x002000, 0x0020FF }, { 0x002000, 0x002003 }, { 0x002007, 0x002007 }, { 0x002100, 0x0021FF }, 0x3F80, "p16f876.inc" , "16f876_g.lkr" , 0 },
{ PROC_CLASS_PIC14 , "__16F876A" , { "pic16f876a" , "p16f876a" , "16f876a" }, 0x876A, 4, 4, 0x0180, { 0x70, 0x7F }, -1, { -1, -1 }, 0x01FF, 0x0021FF, 0x002000, { 0x002000, 0x0020FF }, { 0x002000, 0x002003 }, { 0x002007, 0x002007 }, { 0x002100, 0x0021FF }, 0x3F80, "p16f876a.inc" , "16f876a_g.lkr" , 0 },
{ PROC_CLASS_PIC14 , "__16F877" , { "pic16f877" , "p16f877" , "16f877" }, 0x877F, 4, 4, 0x0180, { 0x70, 0x7F }, -1, { -1, -1 }, 0x01FF, 0x0021FF, 0x002000, { 0x002000, 0x0020FF }, { 0x002000, 0x002003 }, { 0x002007, 0x002007 }, { 0x002100, 0x0021FF }, 0x3F80, "p16f877.inc" , "16f877_g.lkr" , 0 },
{ PROC_CLASS_PIC14 , "__16F877A" , { "pic16f877a" , "p16f877a" , "16f877a" }, 0x877A, 4, 4, 0x0180, { 0x70, 0x7F }, -1, { -1, -1 }, 0x01FF, 0x0021FF, 0x002000, { 0x002000, 0x0020FF }, { 0x002000, 0x002003 }, { 0x002007, 0x002007 }, { 0x002100, 0x0021FF }, 0x3F80, "p16f877a.inc" , "16f877a_g.lkr" , 0 },
{ PROC_CLASS_PIC14 , "__16F882" , { "pic16f882" , "p16f882" , "16f882" }, 0x882F, 1, 4, 0x0180, { 0x70, 0x7F }, -1, { -1, -1 }, 0x01FF, 0x00217F, 0x000800, { 0x000800, 0x0020FF }, { 0x002000, 0x002003 }, { 0x002007, 0x002008 }, { 0x002100, 0x00217F }, 0x3F80, "p16f882.inc" , "16f882_g.lkr" , 0 },
{ PROC_CLASS_PIC14 , "__16F883" , { "pic16f883" , "p16f883" , "16f883" }, 0x883F, 2, 4, 0x0180, { 0x70, 0x7F }, -1, { -1, -1 }, 0x01FF, 0x0021FF, 0x001000, { 0x001000, 0x0020FF }, { 0x002000, 0x002003 }, { 0x002007, 0x002008 }, { 0x002100, 0x0021FF }, 0x3F80, "p16f883.inc" , "16f883_g.lkr" , 0 },
{ PROC_CLASS_PIC14 , "__16F884" , { "pic16f884" , "p16f884" , "16f884" }, 0x884F, 2, 4, 0x0180, { 0x70, 0x7F }, -1, { -1, -1 }, 0x01FF, 0x0021FF, 0x001000, { 0x001000, 0x0020FF }, { 0x002000, 0x002003 }, { 0x002007, 0x002008 }, { 0x002100, 0x0021FF }, 0x3F80, "p16f884.inc" , "16f884_g.lkr" , 0 },
{ PROC_CLASS_PIC14 , "__16F886" , { "pic16f886" , "p16f886" , "16f886" }, 0x886F, 4, 4, 0x0180, { 0x70, 0x7F }, -1, { -1, -1 }, 0x01FF, 0x0021FF, 0x002000, { 0x002000, 0x0020FF }, { 0x002000, 0x002003 }, { 0x002007, 0x002008 }, { 0x002100, 0x0021FF }, 0x3F80, "p16f886.inc" , "16f886_g.lkr" , 0 },
{ PROC_CLASS_PIC14 , "__16F887" , { "pic16f887" , "p16f887" , "16f887" }, 0x887F, 4, 4, 0x0180, { 0x70, 0x7F }, -1, { -1, -1 }, 0x01FF, 0x0021FF, 0x002000, { 0x002000, 0x0020FF }, { 0x002000, 0x002003 }, { 0x002007, 0x002008 }, { 0x002100, 0x0021FF }, 0x3F80, "p16f887.inc" , "16f887_g.lkr" , 0 },
{ PROC_CLASS_PIC14 , "__16F913" , { "pic16f913" , "p16f913" , "16f913" }, 0xF913, 2, 4, 0x0180, { 0x70, 0x7F }, -1, { -1, -1 }, 0x01FF, 0x0021FF, 0x001000, { 0x001000, 0x0020FF }, { 0x002000, 0x002003 }, { 0x002007, 0x002007 }, { 0x002100, 0x0021FF }, 0x3F80, "p16f913.inc" , "16f913_g.lkr" , 0 },
{ PROC_CLASS_PIC14 , "__16F914" , { "pic16f914" , "p16f914" , "16f914" }, 0xF914, 2, 4, 0x0180, { 0x70, 0x7F }, -1, { -1, -1 }, 0x01FF, 0x0021FF, 0x001000, { 0x001000, 0x0020FF }, { 0x002000, 0x002003 }, { 0x002007, 0x002007 }, { 0x002100, 0x0021FF }, 0x3F80, "p16f914.inc" , "16f914_g.lkr" , 0 },
{ PROC_CLASS_PIC14 , "__16F916" , { "pic16f916" , "p16f916" , "16f916" }, 0xF916, 4, 4, 0x0180, { 0x70, 0x7F }, -1, { -1, -1 }, 0x01FF, 0x0021FF, 0x002000, { 0x002000, 0x0020FF }, { 0x002000, 0x002003 }, { 0x002007, 0x002007 }, { 0x002100, 0x0021FF }, 0x3F80, "p16f916.inc" , "16f916_g.lkr" , 0 },
{ PROC_CLASS_PIC14 , "__16F917" , { "pic16f917" , "p16f917" , "16f917" }, 0xF917, 4, 4, 0x0180, { 0x70, 0x7F }, -1, { -1, -1 }, 0x01FF, 0x0021FF, 0x002000, { 0x002000, 0x0020FF }, { 0x002000, 0x002003 }, { 0x002007, 0x002007 }, { 0x002100, 0x0021FF }, 0x3F80, "p16f917.inc" , "16f917_g.lkr" , 0 },
{ PROC_CLASS_PIC14 , "__16F946" , { "pic16f946" , "p16f946" , "16f946" }, 0xF946, 4, 4, 0x0180, { 0x70, 0x7F }, -1, { -1, -1 }, 0x01FF, 0x0021FF, 0x002000, { 0x002000, 0x0020FF }, { 0x002000, 0x002003 }, { 0x002007, 0x002007 }, { 0x002100, 0x0021FF }, 0x3F80, "p16f946.inc" , "16f946_g.lkr" , 0 },
{ PROC_CLASS_PIC14E , "__16F1454" , { "pic16f1454" , "p16f1454" , "16f1454" }, 0x1454, 4, 32, 0x0F80, { 0x70, 0x7F }, -1, { 0x2000, 0x23EF }, 0x0FFF, 0x001FFF, 0x002000, { -1, -1 }, { 0x008000, 0x008003 }, { 0x008007, 0x008008 }, { -1, -1 }, 0x3F80, "p16f1454.inc" , "16f1454_g.lkr" , 0 },
{ PROC_CLASS_PIC14E , "__16F1455" , { "pic16f1455" , "p16f1455" , "16f1455" }, 0x1455, 4, 32, 0x0F80, { 0x70, 0x7F }, -1, { 0x2000, 0x23EF }, 0x0FFF, 0x001FFF, 0x002000, { -1, -1 }, { 0x008000, 0x008003 }, { 0x008007, 0x008008 }, { -1, -1 }, 0x3F80, "p16f1455.inc" , "16f1455_g.lkr" , 0 },
{ PROC_CLASS_PIC14E , "__16F1458" , { "pic16f1458" , "p16f1458" , "16f1458" }, 0x1458, 2, 32, 0x0F80, { 0x70, 0x7F }, -1, { 0x2000, 0x21EF }, 0x0FFF, 0x000FFF, 0x001000, { -1, -1 }, { 0x008000, 0x008003 }, { 0x008007, 0x008008 }, { -1, -1 }, 0x3F80, "p16f1458.inc" , "16f1458_g.lkr" , 0 },
{ PROC_CLASS_PIC14E , "__16F1459" , { "pic16f1459" , "p16f1459" , "16f1459" }, 0x1459, 4, 32, 0x0F80, { 0x70, 0x7F }, -1, { 0x2000, 0x23EF }, 0x0FFF, 0x001FFF, 0x002000, { -1, -1 }, { 0x008000, 0x008003 }, { 0x008007, 0x008008 }, { -1, -1 }, 0x3F80, "p16f1459.inc" , "16f1459_g.lkr" , 0 },
{ PROC_CLASS_PIC14E , "__16F1503" , { "pic16f1503" , "p16f1503" , "16f1503" }, 0x1503, 1, 32, 0x0F80, { 0x70, 0x7F }, -1, { 0x2000, 0x206F }, 0x0FFF, 0x0007FF, 0x000800, { -1, -1 }, { 0x008000, 0x008003 }, { 0x008007, 0x008008 }, { -1, -1 }, 0x3F80, "p16f1503.inc" , "16f1503_g.lkr" , 0 },
{ PROC_CLASS_PIC14E , "__16F1507" , { "pic16f1507" , "p16f1507" , "16f1507" }, 0x1507, 1, 32, 0x0F80, { 0x70, 0x7F }, -1, { 0x2000, 0x206F }, 0x0FFF, 0x0007FF, 0x000800, { -1, -1 }, { 0x008000, 0x008003 }, { 0x008007, 0x008008 }, { -1, -1 }, 0x3F80, "p16f1507.inc" , "16f1507_g.lkr" , 0 },
{ PROC_CLASS_PIC14E , "__16F1508" , { "pic16f1508" , "p16f1508" , "16f1508" }, 0x1508, 2, 32, 0x0F80, { 0x70, 0x7F }, -1, { 0x2000, 0x20EF }, 0x0FFF, 0x000FFF, 0x001000, { -1, -1 }, { 0x008000, 0x008003 }, { 0x008007, 0x008008 }, { -1, -1 }, 0x3F80, "p16f1508.inc" , "16f1508_g.lkr" , 0 },
{ PROC_CLASS_PIC14E , "__16F1509" , { "pic16f1509" , "p16f1509" , "16f1509" }, 0x1509, 4, 32, 0x0F80, { 0x70, 0x7F }, -1, { 0x2000, 0x21EF }, 0x0FFF, 0x001FFF, 0x002000, { -1, -1 }, { 0x008000, 0x008003 }, { 0x008007, 0x008008 }, { -1, -1 }, 0x3F80, "p16f1509.inc" , "16f1509_g.lkr" , 0 },
{ PROC_CLASS_PIC14E , "__16F1512" , { "pic16f1512" , "p16f1512" , "16f1512" }, 0x1512, 1, 32, 0x0F80, { 0x70, 0x7F }, -1, { 0x2000, 0x206F }, 0x0FFF, 0x0007FF, 0x000800, { -1, -1 }, { 0x008000, 0x008003 }, { 0x008007, 0x008008 }, { -1, -1 }, 0x3F80, "p16f1512.inc" , "16f1512_g.lkr" , 0 },
{ PROC_CLASS_PIC14E , "__16F1513" , { "pic16f1513" , "p16f1513" , "16f1513" }, 0x1513, 2, 32, 0x0F80, { 0x70, 0x7F }, -1, { 0x2000, 0x20EF }, 0x0FFF, 0x000FFF, 0x001000, { -1, -1 }, { 0x008000, 0x008003 }, { 0x008007, 0x008008 }, { -1, -1 }, 0x3F80, "p16f1513.inc" , "16f1513_g.lkr" , 0 },
{ PROC_CLASS_PIC14E , "__16F1516" , { "pic16f1516" , "p16f1516" , "16f1516" }, 0x1516, 4, 32, 0x0F80, { 0x70, 0x7F }, -1, { 0x2000, 0x21EF }, 0x0FFF, 0x001FFF, 0x002000, { -1, -1 }, { 0x008000, 0x008003 }, { 0x008007, 0x008008 }, { -1, -1 }, 0x3F80, "p16f1516.inc" , "16f1516_g.lkr" , 0 },
{ PROC_CLASS_PIC14E , "__16F1517" , { "pic16f1517" , "p16f1517" , "16f1517" }, 0x1517, 4, 32, 0x0F80, { 0x70, 0x7F }, -1, { 0x2000, 0x21EF }, 0x0FFF, 0x001FFF, 0x002000, { -1, -1 }, { 0x008000, 0x008003 }, { 0x008007, 0x008008 }, { -1, -1 }, 0x3F80, "p16f1517.inc" , "16f1517_g.lkr" , 0 },
{ PROC_CLASS_PIC14E , "__16F1518" , { "pic16f1518" , "p16f1518" , "16f1518" }, 0x1518, 8, 32, 0x0F80, { 0x70, 0x7F }, -1, { 0x2000, 0x23EF }, 0x0FFF, 0x003FFF, 0x004000, { -1, -1 }, { 0x008000, 0x008003 }, { 0x008007, 0x008008 }, { -1, -1 }, 0x3F80, "p16f1518.inc" , "16f1518_g.lkr" , 0 },
{ PROC_CLASS_PIC14E , "__16F1519" , { "pic16f1519" , "p16f1519" , "16f1519" }, 0x1519, 8, 32, 0x0F80, { 0x70, 0x7F }, -1, { 0x2000, 0x23EF }, 0x0FFF, 0x003FFF, 0x004000, { -1, -1 }, { 0x008000, 0x008003 }, { 0x008007, 0x008008 }, { -1, -1 }, 0x3F80, "p16f1519.inc" , "16f1519_g.lkr" , 0 },
{ PROC_CLASS_PIC14E , "__16F1526" , { "pic16f1526" , "p16f1526" , "16f1526" }, 0x1526, 4, 32, 0x0F80, { 0x70, 0x7F }, -1, { 0x2000, 0x22EF }, 0x0FFF, 0x001FFF, 0x002000, { -1, -1 }, { 0x008000, 0x008003 }, { 0x008007, 0x008008 }, { -1, -1 }, 0x3F80, "p16f1526.inc" , "16f1526_g.lkr" , 0 },
{ PROC_CLASS_PIC14E , "__16F1527" , { "pic16f1527" , "p16f1527" , "16f1527" }, 0x1527, 8, 32, 0x0F80, { 0x70, 0x7F }, -1, { 0x2000, 0x25EF }, 0x0FFF, 0x003FFF, 0x004000, { -1, -1 }, { 0x008000, 0x008003 }, { 0x008007, 0x008008 }, { -1, -1 }, 0x3F80, "p16f1527.inc" , "16f1527_g.lkr" , 0 },
{ PROC_CLASS_PIC14E , "__16F1574" , { "pic16f1574" , "p16f1574" , "16f1574" }, 0x1574, 2, 32, 0x0F80, { 0x70, 0x7F }, -1, { 0x2000, 0x21EF }, 0x0FFF, 0x000FFF, 0x001000, { -1, -1 }, { 0x008000, 0x008003 }, { 0x008007, 0x008008 }, { -1, -1 }, 0x3F80, "p16f1574.inc" , "16f1574_g.lkr" , 0 },
{ PROC_CLASS_PIC14E , "__16F1575" , { "pic16f1575" , "p16f1575" , "16f1575" }, 0x1575, 4, 32, 0x0F80, { 0x70, 0x7F }, -1, { 0x2000, 0x23DF }, 0x0FFF, 0x001FFF, 0x002000, { -1, -1 }, { 0x008000, 0x008003 }, { 0x008007, 0x008008 }, { -1, -1 }, 0x3F80, "p16f1575.inc" , "16f1575_g.lkr" , 0 },
{ PROC_CLASS_PIC14E , "__16F1578" , { "pic16f1578" , "p16f1578" , "16f1578" }, 0x1578, 2, 32, 0x0F80, { 0x70, 0x7F }, -1, { 0x2000, 0x21EF }, 0x0FFF, 0x000FFF, 0x001000, { -1, -1 }, { 0x008000, 0x008003 }, { 0x008007, 0x008008 }, { -1, -1 }, 0x3F80, "p16f1578.inc" , "16f1578_g.lkr" , 0 },
{ PROC_CLASS_PIC14E , "__16F1579" , { "pic16f1579" , "p16f1579" , "16f1579" }, 0x1579, 4, 32, 0x0F80, { 0x70, 0x7F }, -1, { 0x2000, 0x23DF }, 0x0FFF, 0x001FFF, 0x002000, { -1, -1 }, { 0x008000, 0x008003 }, { 0x008007, 0x008008 }, { -1, -1 }, 0x3F80, "p16f1579.inc" , "16f1579_g.lkr" , 0 },
{ PROC_CLASS_PIC14E , "__16F1613" , { "pic16f1613" , "p16f1613" , "16f1613" }, 0x1613, 1, 32, 0x0F80, { 0x70, 0x7F }, -1, { 0x2000, 0x20EF }, 0x0FFF, 0x0007FF, 0x000800, { -1, -1 }, { 0x008000, 0x008003 }, { 0x008007, 0x008009 }, { -1, -1 }, 0x3F80, "p16f1613.inc" , "16f1613_g.lkr" , 0 },
{ PROC_CLASS_PIC14E , "__16F1614" , { "pic16f1614" , "p16f1614" , "16f1614" }, 0x1614, 2, 32, 0x0F80, { 0x70, 0x7F }, -1, { 0x2000, 0x21EF }, 0x0FFF, 0x000FFF, 0x001000, { -1, -1 }, { 0x008000, 0x008003 }, { 0x008007, 0x008009 }, { -1, -1 }, 0x3F80, "p16f1614.inc" , "16f1614_g.lkr" , 0 },
{ PROC_CLASS_PIC14E , "__16F1615" , { "pic16f1615" , "p16f1615" , "16f1615" }, 0x1615, 4, 32, 0x0F80, { 0x70, 0x7F }, -1, { 0x2000, 0x23DF }, 0x0FFF, 0x001FFF, 0x002000, { -1, -1 }, { 0x008000, 0x008003 }, { 0x008007, 0x008009 }, { -1, -1 }, 0x3F80, "p16f1615.inc" , "16f1615_g.lkr" , 0 },
{ PROC_CLASS_PIC14E , "__16F1618" , { "pic16f1618" , "p16f1618" , "16f1618" }, 0x1618, 2, 32, 0x0F80, { 0x70, 0x7F }, -1, { 0x2000, 0x21EF }, 0x0FFF, 0x000FFF, 0x001000, { -1, -1 }, { 0x008000, 0x008003 }, { 0x008007, 0x008009 }, { -1, -1 }, 0x3F80, "p16f1618.inc" , "16f1618_g.lkr" , 0 },
{ PROC_CLASS_PIC14E , "__16F1619" , { "pic16f1619" , "p16f1619" , "16f1619" }, 0x1619, 4, 32, 0x0F80, { 0x70, 0x7F }, -1, { 0x2000, 0x23DF }, 0x0FFF, 0x001FFF, 0x002000, { -1, -1 }, { 0x008000, 0x008003 }, { 0x008007, 0x008009 }, { -1, -1 }, 0x3F80, "p16f1619.inc" , "16f1619_g.lkr" , 0 },
{ PROC_CLASS_PIC14E , "__16F1703" , { "pic16f1703" , "p16f1703" , "16f1703" }, 0x1703, 1, 32, 0x0F80, { 0x70, 0x7F }, -1, { 0x2000, 0x20EF }, 0x0FFF, 0x0007FF, 0x000800, { -1, -1 }, { 0x008000, 0x008003 }, { 0x008007, 0x008008 }, { -1, -1 }, 0x3F80, "p16f1703.inc" , "16f1703_g.lkr" , 0 },
{ PROC_CLASS_PIC14E , "__16F1704" , { "pic16f1704" , "p16f1704" , "16f1704" }, 0x1704, 2, 32, 0x0F80, { 0x70, 0x7F }, -1, { 0x2000, 0x21EF }, 0x0FFF, 0x000FFF, 0x001000, { -1, -1 }, { 0x008000, 0x008003 }, { 0x008007, 0x008008 }, { -1, -1 }, 0x3F80, "p16f1704.inc" , "16f1704_g.lkr" , 0 },
{ PROC_CLASS_PIC14E , "__16F1705" , { "pic16f1705" , "p16f1705" , "16f1705" }, 0x1705, 4, 32, 0x0F80, { 0x70, 0x7F }, -1, { 0x2000, 0x23EF }, 0x0FFF, 0x001FFF, 0x002000, { -1, -1 }, { 0x008000, 0x008003 }, { 0x008007, 0x008008 }, { -1, -1 }, 0x3F80, "p16f1705.inc" , "16f1705_g.lkr" , 0 },
{ PROC_CLASS_PIC14E , "__16F1707" , { "pic16f1707" , "p16f1707" , "16f1707" }, 0x1707, 1, 32, 0x0F80, { 0x70, 0x7F }, -1, { 0x2000, 0x20EF }, 0x0FFF, 0x0007FF, 0x000800, { -1, -1 }, { 0x008000, 0x008003 }, { 0x008007, 0x008008 }, { -1, -1 }, 0x3F80, "p16f1707.inc" , "16f1707_g.lkr" , 0 },
{ PROC_CLASS_PIC14E , "__16F1708" , { "pic16f1708" , "p16f1708" , "16f1708" }, 0x1708, 2, 32, 0x0F80, { 0x70, 0x7F }, -1, { 0x2000, 0x21EF }, 0x0FFF, 0x000FFF, 0x001000, { -1, -1 }, { 0x008000, 0x008003 }, { 0x008007, 0x008008 }, { -1, -1 }, 0x3F80, "p16f1708.inc" , "16f1708_g.lkr" , 0 },
{ PROC_CLASS_PIC14E , "__16F1709" , { "pic16f1709" , "p16f1709" , "16f1709" }, 0x1709, 4, 32, 0x0F80, { 0x70, 0x7F }, -1, { 0x2000, 0x23EF }, 0x0FFF, 0x001FFF, 0x002000, { -1, -1 }, { 0x008000, 0x008003 }, { 0x008007, 0x008008 }, { -1, -1 }, 0x3F80, "p16f1709.inc" , "16f1709_g.lkr" , 0 },
{ PROC_CLASS_PIC14E , "__16F1713" , { "pic16f1713" , "p16f1713" , "16f1713" }, 0x1713, 2, 32, 0x0F80, { 0x70, 0x7F }, -1, { 0x2000, 0x21EF }, 0x0FFF, 0x000FFF, 0x001000, { -1, -1 }, { 0x008000, 0x008003 }, { 0x008007, 0x008008 }, { -1, -1 }, 0x3F80, "p16f1713.inc" , "16f1713_g.lkr" , 0 },
{ PROC_CLASS_PIC14E , "__16F1716" , { "pic16f1716" , "p16f1716" , "16f1716" }, 0x1716, 4, 32, 0x0F80, { 0x70, 0x7F }, -1, { 0x2000, 0x23EF }, 0x0FFF, 0x001FFF, 0x002000, { -1, -1 }, { 0x008000, 0x008003 }, { 0x008007, 0x008008 }, { -1, -1 }, 0x3F80, "p16f1716.inc" , "16f1716_g.lkr" , 0 },
{ PROC_CLASS_PIC14E , "__16F1717" , { "pic16f1717" , "p16f1717" , "16f1717" }, 0x1717, 4, 32, 0x0F80, { 0x70, 0x7F }, -1, { 0x2000, 0x23EF }, 0x0FFF, 0x001FFF, 0x002000, { -1, -1 }, { 0x008000, 0x008003 }, { 0x008007, 0x008008 }, { -1, -1 }, 0x3F80, "p16f1717.inc" , "16f1717_g.lkr" , 0 },
{ PROC_CLASS_PIC14E , "__16F1718" , { "pic16f1718" , "p16f1718" , "16f1718" }, 0x1718, 8, 32, 0x0F80, { 0x70, 0x7F }, -1, { 0x2000, 0x27EF }, 0x0FFF, 0x003FFF, 0x004000, { -1, -1 }, { 0x008000, 0x008003 }, { 0x008007, 0x008008 }, { -1, -1 }, 0x3F80, "p16f1718.inc" , "16f1718_g.lkr" , 0 },
{ PROC_CLASS_PIC14E , "__16F1719" , { "pic16f1719" , "p16f1719" , "16f1719" }, 0x1719, 8, 32, 0x0F80, { 0x70, 0x7F }, -1, { 0x2000, 0x27EF }, 0x0FFF, 0x003FFF, 0x004000, { -1, -1 }, { 0x008000, 0x008003 }, { 0x008007, 0x008008 }, { -1, -1 }, 0x3F80, "p16f1719.inc" , "16f1719_g.lkr" , 0 },
{ PROC_CLASS_PIC14E , "__16F1764" , { "pic16f1764" , "p16f1764" , "16f1764" }, 0x1764, 2, 32, 0x0F80, { 0x70, 0x7F }, -1, { 0x2000, 0x21EF }, 0x0FFF, 0x000FFF, 0x001000, { -1, -1 }, { 0x008000, 0x008003 }, { 0x008007, 0x008008 }, { -1, -1 }, 0x3F80, "p16f1764.inc" , "16f1764_g.lkr" , 0 },
{ PROC_CLASS_PIC14E , "__16F1765" , { "pic16f1765" , "p16f1765" , "16f1765" }, 0x1765, 4, 32, 0x0F80, { 0x70, 0x7F }, -1, { 0x2000, 0x23AF }, 0x0FFF, 0x001FFF, 0x002000, { -1, -1 }, { 0x008000, 0x008003 }, { 0x008007, 0x008008 }, { -1, -1 }, 0x3F80, "p16f1765.inc" , "16f1765_g.lkr" , 0 },
{ PROC_CLASS_PIC14E , "__16F1768" , { "pic16f1768" , "p16f1768" , "16f1768" }, 0x1768, 2, 32, 0x0F80, { 0x70, 0x7F }, -1, { 0x2000, 0x21EF }, 0x0FFF, 0x000FFF, 0x001000, { -1, -1 }, { 0x008000, 0x008003 }, { 0x008007, 0x008008 }, { -1, -1 }, 0x3F80, "p16f1768.inc" , "16f1768_g.lkr" , 0 },
{ PROC_CLASS_PIC14E , "__16F1769" , { "pic16f1769" , "p16f1769" , "16f1769" }, 0x1769, 4, 32, 0x0F80, { 0x70, 0x7F }, -1, { 0x2000, 0x23EF }, 0x0FFF, 0x001FFF, 0x002000, { -1, -1 }, { 0x008000, 0x008003 }, { 0x008007, 0x008008 }, { -1, -1 }, 0x3F80, "p16f1769.inc" , "16f1769_g.lkr" , 0 },
{ PROC_CLASS_PIC14E , "__16F1773" , { "pic16f1773" , "p16f1773" , "16f1773" }, 0x1773, 2, 32, 0x0F80, { 0x70, 0x7F }, -1, { 0x2000, 0x21EF }, 0x0FFF, 0x000FFF, 0x001000, { -1, -1 }, { 0x008000, 0x008003 }, { 0x008007, 0x008008 }, { -1, -1 }, 0x3F80, "p16f1773.inc" , "16f1773_g.lkr" , 0 },
{ PROC_CLASS_PIC14E , "__16F1776" , { "pic16f1776" , "p16f1776" , "16f1776" }, 0x1776, 4, 32, 0x0F80, { 0x70, 0x7F }, -1, { 0x2000, 0x23EF }, 0x0FFF, 0x001FFF, 0x002000, { -1, -1 }, { 0x008000, 0x008003 }, { 0x008007, 0x008008 }, { -1, -1 }, 0x3F80, "p16f1776.inc" , "16f1776_g.lkr" , 0 },
{ PROC_CLASS_PIC14E , "__16F1777" , { "pic16f1777" , "p16f1777" , "16f1777" }, 0x1777, 4, 32, 0x0F80, { 0x70, 0x7F }, -1, { 0x2000, 0x23EF }, 0x0FFF, 0x001FFF, 0x002000, { -1, -1 }, { 0x008000, 0x008003 }, { 0x008007, 0x008008 }, { -1, -1 }, 0x3F80, "p16f1777.inc" , "16f1777_g.lkr" , 0 },
{ PROC_CLASS_PIC14E , "__16F1778" , { "pic16f1778" , "p16f1778" , "16f1778" }, 0x1778, 8, 32, 0x0F80, { 0x70, 0x7F }, -1, { 0x2000, 0x27CF }, 0x0FFF, 0x003FFF, 0x004000, { -1, -1 }, { 0x008000, 0x008003 }, { 0x008007, 0x008008 }, { -1, -1 }, 0x3F80, "p16f1778.inc" , "16f1778_g.lkr" , 0 },
{ PROC_CLASS_PIC14E , "__16F1779" , { "pic16f1779" , "p16f1779" , "16f1779" }, 0x1779, 8, 32, 0x0F80, { 0x70, 0x7F }, -1, { 0x2000, 0x27EF }, 0x0FFF, 0x003FFF, 0x004000, { -1, -1 }, { 0x008000, 0x008003 }, { 0x008007, 0x008008 }, { -1, -1 }, 0x3F80, "p16f1779.inc" , "16f1779_g.lkr" , 0 },
{ PROC_CLASS_PIC14E , "__16F1782" , { "pic16f1782" , "p16f1782" , "16f1782" }, 0x1782, 1, 32, 0x0F80, { 0x70, 0x7F }, -1, { 0x2000, 0x20EF }, 0x0FFF, 0x00F0FF, 0x000800, { 0x000800, 0x00EFFF }, { 0x008000, 0x008003 }, { 0x008007, 0x008008 }, { 0x00F000, 0x00F0FF }, 0x3F80, "p16f1782.inc" , "16f1782_g.lkr" , 0 },
{ PROC_CLASS_PIC14E , "__16F1783" , { "pic16f1783" , "p16f1783" , "16f1783" }, 0x1783, 2, 32, 0x0F80, { 0x70, 0x7F }, -1, { 0x2000, 0x21EF }, 0x0FFF, 0x00F0FF, 0x001000, { 0x001000, 0x00EFFF }, { 0x008000, 0x008003 }, { 0x008007, 0x008008 }, { 0x00F000, 0x00F0FF }, 0x3F80, "p16f1783.inc" , "16f1783_g.lkr" , 0 },
{ PROC_CLASS_PIC14E , "__16F1784" , { "pic16f1784" , "p16f1784" , "16f1784" }, 0x1784, 2, 32, 0x0F80, { 0x70, 0x7F }, -1, { 0x2000, 0x21EF }, 0x0FFF, 0x00F0FF, 0x001000, { 0x001000, 0x00EFFF }, { 0x008000, 0x008003 }, { 0x008007, 0x008008 }, { 0x00F000, 0x00F0FF }, 0x3F80, "p16f1784.inc" , "16f1784_g.lkr" , 0 },
{ PROC_CLASS_PIC14E , "__16F1786" , { "pic16f1786" , "p16f1786" , "16f1786" }, 0x1786, 4, 32, 0x0F80, { 0x70, 0x7F }, -1, { 0x2000, 0x23EF }, 0x0FFF, 0x00F0FF, 0x002000, { 0x002000, 0x00EFFF }, { 0x008000, 0x008003 }, { 0x008007, 0x008008 }, { 0x00F000, 0x00F0FF }, 0x3F80, "p16f1786.inc" , "16f1786_g.lkr" , 0 },
{ PROC_CLASS_PIC14E , "__16F1787" , { "pic16f1787" , "p16f1787" , "16f1787" }, 0x1787, 4, 32, 0x0F80, { 0x70, 0x7F }, -1, { 0x2000, 0x23EF }, 0x0FFF, 0x00F0FF, 0x002000, { 0x002000, 0x00EFFF }, { 0x008000, 0x008003 }, { 0x008007, 0x008008 }, { 0x00F000, 0x00F0FF }, 0x3F80, "p16f1787.inc" , "16f1787_g.lkr" , 0 },
{ PROC_CLASS_PIC14E , "__16F1788" , { "pic16f1788" , "p16f1788" , "16f1788" }, 0x1788, 8, 32, 0x0F80, { 0x70, 0x7F }, -1, { 0x2000, 0x27EF }, 0x0FFF, 0x00F0FF, 0x004000, { 0x004000, 0x00EFFF }, { 0x008000, 0x008003 }, { 0x008007, 0x008008 }, { 0x00F000, 0x00F0FF }, 0x3F80, "p16f1788.inc" , "16f1788_g.lkr" , 0 },
{ PROC_CLASS_PIC14E , "__16F1789" , { "pic16f1789" , "p16f1789" , "16f1789" }, 0x1789, 8, 32, 0x0F80, { 0x70, 0x7F }, -1, { 0x2000, 0x27EF }, 0x0FFF, 0x00F0FF, 0x004000, { 0x004000, 0x00EFFF }, { 0x008000, 0x008003 }, { 0x008007, 0x008008 }, { 0x00F000, 0x00F0FF }, 0x3F80, "p16f1789.inc" , "16f1789_g.lkr" , 0 },
{ PROC_CLASS_PIC14E , "__16F1823" , { "pic16f1823" , "p16f1823" , "16f1823" }, 0x1823, 1, 32, 0x0F80, { 0x70, 0x7F }, -1, { 0x2000, 0x206F }, 0x0FFF, 0x00F0FF, 0x000800, { 0x000800, 0x00EFFF }, { 0x008000, 0x008003 }, { 0x008007, 0x008008 }, { 0x00F000, 0x00F0FF }, 0x3F80, "p16f1823.inc" , "16f1823_g.lkr" , 0 },
{ PROC_CLASS_PIC14E , "__16F1824" , { "pic16f1824" , "p16f1824" , "16f1824" }, 0x1824, 2, 32, 0x0F80, { 0x70, 0x7F }, -1, { 0x2000, 0x20EF }, 0x0FFF, 0x00F0FF, 0x001000, { 0x001000, 0x00EFFF }, { 0x008000, 0x008003 }, { 0x008007, 0x008008 }, { 0x00F000, 0x00F0FF }, 0x3F80, "p16f1824.inc" , "16f1824_g.lkr" , 0 },
{ PROC_CLASS_PIC14E , "__16F1825" , { "pic16f1825" , "p16f1825" , "16f1825" }, 0x1825, 4, 32, 0x0F80, { 0x70, 0x7F }, -1, { 0x2000, 0x23EF }, 0x0FFF, 0x00F0FF, 0x002000, { 0x002000, 0x00EFFF }, { 0x008000, 0x008003 }, { 0x008007, 0x008008 }, { 0x00F000, 0x00F0FF }, 0x3F80, "p16f1825.inc" , "16f1825_g.lkr" , 0 },
{ PROC_CLASS_PIC14E , "__16F1826" , { "pic16f1826" , "p16f1826" , "16f1826" }, 0x1826, 1, 32, 0x0F80, { 0x70, 0x7F }, -1, { 0x2000, 0x20EF }, 0x0FFF, 0x00F0FF, 0x000800, { 0x000800, 0x00EFFF }, { 0x008000, 0x008003 }, { 0x008007, 0x008008 }, { 0x00F000, 0x00F0FF }, 0x3F80, "p16f1826.inc" , "16f1826_g.lkr" , 0 },
{ PROC_CLASS_PIC14E , "__16F1827" , { "pic16f1827" , "p16f1827" , "16f1827" }, 0x1827, 2, 32, 0x0F80, { 0x70, 0x7F }, -1, { 0x2000, 0x216F }, 0x0FFF, 0x00F0FF, 0x001000, { 0x001000, 0x00EFFF }, { 0x008000, 0x008003 }, { 0x008007, 0x008008 }, { 0x00F000, 0x00F0FF }, 0x3F80, "p16f1827.inc" , "16f1827_g.lkr" , 0 },
{ PROC_CLASS_PIC14E , "__16F1828" , { "pic16f1828" , "p16f1828" , "16f1828" }, 0x1828, 2, 32, 0x0F80, { 0x70, 0x7F }, -1, { 0x2000, 0x20EF }, 0x0FFF, 0x00F0FF, 0x001000, { 0x001000, 0x00EFFF }, { 0x008000, 0x008003 }, { 0x008007, 0x008008 }, { 0x00F000, 0x00F0FF }, 0x3F80, "p16f1828.inc" , "16f1828_g.lkr" , 0 },
{ PROC_CLASS_PIC14E , "__16F1829" , { "pic16f1829" , "p16f1829" , "16f1829" }, 0x1829, 4, 32, 0x0F80, { 0x70, 0x7F }, -1, { 0x2000, 0x23EF }, 0x0FFF, 0x00F0FF, 0x002000, { 0x002000, 0x00EFFF }, { 0x008000, 0x008003 }, { 0x008007, 0x008008 }, { 0x00F000, 0x00F0FF }, 0x3F80, "p16f1829.inc" , "16f1829_g.lkr" , 0 },
{ PROC_CLASS_PIC14E , "__16F1829LIN" , { "pic16f1829lin" , "p16f1829lin" , "16f1829lin" }, 0xB829, 4, 32, 0x0F80, { 0x70, 0x7F }, -1, { 0x2000, 0x23EF }, 0x0FFF, 0x00F0FF, 0x002000, { 0x002000, 0x00EFFF }, { 0x008000, 0x008003 }, { 0x008007, 0x008008 }, { 0x00F000, 0x00F0FF }, 0x3F80, "p16f1829lin.inc" , "16f1829lin_g.lkr" , 0 },
{ PROC_CLASS_PIC14E , "__16F1847" , { "pic16f1847" , "p16f1847" , "16f1847" }, 0x1847, 4, 32, 0x0F80, { 0x70, 0x7F }, -1, { 0x2000, 0x23EF }, 0x0FFF, 0x00F0FF, 0x002000, { 0x002000, 0x00EFFF }, { 0x008000, 0x008003 }, { 0x008007, 0x008008 }, { 0x00F000, 0x00F0FF }, 0x3F80, "p16f1847.inc" , "16f1847_g.lkr" , 0 },
{ PROC_CLASS_PIC14E , "__16F1933" , { "pic16f1933" , "p16f1933" , "16f1933" }, 0x1933, 2, 32, 0x0F80, { 0x70, 0x7F }, -1, { 0x2000, 0x20EF }, 0x0FFF, 0x00F0FF, 0x001000, { 0x001000, 0x00EFFF }, { 0x008000, 0x008003 }, { 0x008007, 0x008008 }, { 0x00F000, 0x00F0FF }, 0x3F80, "p16f1933.inc" , "16f1933_g.lkr" , 0 },
{ PROC_CLASS_PIC14E , "__16F1934" , { "pic16f1934" , "p16f1934" , "16f1934" }, 0x1934, 2, 32, 0x0F80, { 0x70, 0x7F }, -1, { 0x2000, 0x20EF }, 0x0FFF, 0x00F0FF, 0x001000, { 0x001000, 0x00EFFF }, { 0x008000, 0x008003 }, { 0x008007, 0x008008 }, { 0x00F000, 0x00F0FF }, 0x3F80, "p16f1934.inc" , "16f1934_g.lkr" , 0 },
{ PROC_CLASS_PIC14E , "__16F1936" , { "pic16f1936" , "p16f1936" , "16f1936" }, 0x1936, 4, 32, 0x0F80, { 0x70, 0x7F }, -1, { 0x2000, 0x21EF }, 0x0FFF, 0x00F0FF, 0x002000, { 0x002000, 0x00EFFF }, { 0x008000, 0x008003 }, { 0x008007, 0x008008 }, { 0x00F000, 0x00F0FF }, 0x3F80, "p16f1936.inc" , "16f1936_g.lkr" , 0 },
{ PROC_CLASS_PIC14E , "__16F1937" , { "pic16f1937" , "p16f1937" , "16f1937" }, 0x1937, 4, 32, 0x0F80, { 0x70, 0x7F }, -1, { 0x2000, 0x21EF }, 0x0FFF, 0x00F0FF, 0x002000, { 0x002000, 0x00EFFF }, { 0x008000, 0x008003 }, { 0x008007, 0x008008 }, { 0x00F000, 0x00F0FF }, 0x3F80, "p16f1937.inc" , "16f1937_g.lkr" , 0 },
{ PROC_CLASS_PIC14E , "__16F1938" , { "pic16f1938" , "p16f1938" , "16f1938" }, 0x1938, 8, 32, 0x0F80, { 0x70, 0x7F }, -1, { 0x2000, 0x23EF }, 0x0FFF, 0x00F0FF, 0x004000, { 0x004000, 0x00EFFF }, { 0x008000, 0x008003 }, { 0x008007, 0x008008 }, { 0x00F000, 0x00F0FF }, 0x3F80, "p16f1938.inc" , "16f1938_g.lkr" , 0 },
{ PROC_CLASS_PIC14E , "__16F1939" , { "pic16f1939" , "p16f1939" , "16f1939" }, 0x1939, 8, 32, 0x0F80, { 0x70, 0x7F }, -1, { 0x2000, 0x23EF }, 0x0FFF, 0x00F0FF, 0x004000, { 0x004000, 0x00EFFF }, { 0x008000, 0x008003 }, { 0x008007, 0x008008 }, { 0x00F000, 0x00F0FF }, 0x3F80, "p16f1939.inc" , "16f1939_g.lkr" , 0 },
{ PROC_CLASS_PIC14E , "__16F1946" , { "pic16f1946" , "p16f1946" , "16f1946" }, 0x1946, 4, 32, 0x0F80, { 0x70, 0x7F }, -1, { 0x2000, 0x21EF }, 0x0FFF, 0x00F0FF, 0x002000, { 0x002000, 0x00EFFF }, { 0x008000, 0x008003 }, { 0x008007, 0x008008 }, { 0x00F000, 0x00F0FF }, 0x3F80, "p16f1946.inc" , "16f1946_g.lkr" , 0 },
{ PROC_CLASS_PIC14E , "__16F1947" , { "pic16f1947" , "p16f1947" , "16f1947" }, 0x1947, 8, 32, 0x0F80, { 0x70, 0x7F }, -1, { 0x2000, 0x23EF }, 0x0FFF, 0x00F0FF, 0x004000, { 0x004000, 0x00EFFF }, { 0x008000, 0x008003 }, { 0x008007, 0x008008 }, { 0x00F000, 0x00F0FF }, 0x3F80, "p16f1947.inc" , "16f1947_g.lkr" , 0 },
{ PROC_CLASS_PIC14EX , "__16F15324" , { "pic16f15324" , "p16f15324" , "16f15324" }, 0xA2AA, 2, 64, 0x1F80, { 0x70, 0x7F }, -1, { 0x2000, 0x21EF }, 0x1FFF, 0x000FFF, 0x001000, { -1, -1 }, { 0x008000, 0x008003 }, { 0x008007, 0x00800B }, { -1, -1 }, 0x3F80, "p16f15324.inc" , "16f15324_g.lkr" , CPU_NO_OPTION_INSN },
{ PROC_CLASS_PIC14EX , "__16F15325" , { "pic16f15325" , "p16f15325" , "16f15325" }, 0xA29E, 4, 64, 0x1F80, { 0x70, 0x7F }, -1, { 0x2000, 0x23EF }, 0x1FFF, 0x001FFF, 0x002000, { -1, -1 }, { 0x008000, 0x008003 }, { 0x008007, 0x00800B }, { -1, -1 }, 0x3F80, "p16f15325.inc" , "16f15325_g.lkr" , CPU_NO_OPTION_INSN },
{ PROC_CLASS_PIC14EX , "__16F15344" , { "pic16f15344" , "p16f15344" , "16f15344" }, 0xA2AB, 2, 64, 0x1F80, { 0x70, 0x7F }, -1, { 0x2000, 0x21EF }, 0x1FFF, 0x000FFF, 0x001000, { -1, -1 }, { 0x008000, 0x008003 }, { 0x008007, 0x00800B }, { -1, -1 }, 0x3F80, "p16f15344.inc" , "16f15344_g.lkr" , CPU_NO_OPTION_INSN },
{ PROC_CLASS_PIC14EX , "__16F15345" , { "pic16f15345" , "p16f15345" , "16f15345" }, 0xA29F, 4, 64, 0x1F80, { 0x70, 0x7F }, -1, { 0x2000, 0x23EF }, 0x1FFF, 0x001FFF, 0x002000, { -1, -1 }, { 0x008000, 0x008003 }, { 0x008007, 0x00800B }, { -1, -1 }, 0x3F80, "p16f15345.inc" , "16f15345_g.lkr" , CPU_NO_OPTION_INSN },
{ PROC_CLASS_PIC14EX , "__16F15354" , { "pic16f15354" , "p16f15354" , "16f15354" }, 0xA280, 2, 64, 0x1F80, { 0x70, 0x7F }, -1, { 0x2000, 0x23EF }, 0x1FFF, 0x000FFF, 0x001000, { -1, -1 }, { 0x008000, 0x008003 }, { 0x008007, 0x00800B }, { -1, -1 }, 0x3F80, "p16f15354.inc" , "16f15354_g.lkr" , CPU_NO_OPTION_INSN },
{ PROC_CLASS_PIC14EX , "__16F15355" , { "pic16f15355" , "p16f15355" , "16f15355" }, 0xA27F, 4, 64, 0x1F80, { 0x70, 0x7F }, -1, { 0x2000, 0x25EF }, 0x1FFF, 0x001FFF, 0x002000, { -1, -1 }, { 0x008000, 0x008003 }, { 0x008007, 0x00800B }, { -1, -1 }, 0x3F80, "p16f15355.inc" , "16f15355_g.lkr" , CPU_NO_OPTION_INSN },
{ PROC_CLASS_PIC14EX , "__16F15356" , { "pic16f15356" , "p16f15356" , "16f15356" }, 0xA290, 8, 64, 0x1F80, { 0x70, 0x7F }, -1, { 0x2000, 0x27EF }, 0x1FFF, 0x003FFF, 0x004000, { -1, -1 }, { 0x008000, 0x008003 }, { 0x008007, 0x00800B }, { -1, -1 }, 0x3F80, "p16f15356.inc" , "16f15356_g.lkr" , CPU_NO_OPTION_INSN },
{ PROC_CLASS_PIC14EX , "__16F15375" , { "pic16f15375" , "p16f15375" , "16f15375" }, 0xA292, 4, 64, 0x1F80, { 0x70, 0x7F }, -1, { 0x2000, 0x23EF }, 0x1FFF, 0x001FFF, 0x002000, { -1, -1 }, { 0x008000, 0x008003 }, { 0x008007, 0x00800B }, { -1, -1 }, 0x3F80, "p16f15375.inc" , "16f15375_g.lkr" , CPU_NO_OPTION_INSN },
{ PROC_CLASS_PIC14EX , "__16F15376" , { "pic16f15376" , "p16f15376" , "16f15376" }, 0xA294, 8, 64, 0x1F80, { 0x70, 0x7F }, -1, { 0x2000, 0x27EF }, 0x1FFF, 0x003FFF, 0x004000, { -1, -1 }, { 0x008000, 0x008003 }, { 0x008007, 0x00800B }, { -1, -1 }, 0x3F80, "p16f15376.inc" , "16f15376_g.lkr" , CPU_NO_OPTION_INSN },
{ PROC_CLASS_PIC14EX , "__16F15385" , { "pic16f15385" , "p16f15385" , "16f15385" }, 0xA296, 4, 64, 0x1F80, { 0x70, 0x7F }, -1, { 0x2000, 0x23EF }, 0x1FFF, 0x001FFF, 0x002000, { -1, -1 }, { 0x008000, 0x008003 }, { 0x008007, 0x00800B }, { -1, -1 }, 0x3F80, "p16f15385.inc" , "16f15385_g.lkr" , CPU_NO_OPTION_INSN },
{ PROC_CLASS_PIC14EX , "__16F15386" , { "pic16f15386" , "p16f15386" , "16f15386" }, 0xA298, 8, 64, 0x1F80, { 0x70, 0x7F }, -1, { 0x2000, 0x27EF }, 0x1FFF, 0x003FFF, 0x004000, { -1, -1 }, { 0x008000, 0x008003 }, { 0x008007, 0x00800B }, { -1, -1 }, 0x3F80, "p16f15386.inc" , "16f15386_g.lkr" , CPU_NO_OPTION_INSN },
{ PROC_CLASS_PIC14E , "__16F18313" , { "pic16f18313" , "p16f18313" , "16f18313" }, 0x1832, 1, 32, 0x0F80, { 0x70, 0x7F }, -1, { 0x2000, 0x20EF }, 0x0FFF, 0x00F0FF, 0x000800, { 0x000800, 0x00EFFF }, { 0x008000, 0x008003 }, { 0x008007, 0x00800A }, { 0x00F000, 0x00F0FF }, 0x3F80, "p16f18313.inc" , "16f18313_g.lkr" , CPU_NO_OPTION_INSN },
{ PROC_CLASS_PIC14E , "__16F18323" , { "pic16f18323" , "p16f18323" , "16f18323" }, 0x1833, 1, 32, 0x0F80, { 0x70, 0x7F }, -1, { 0x2000, 0x20EF }, 0x0FFF, 0x00F0FF, 0x000800, { 0x000800, 0x00EFFF }, { 0x008000, 0x008003 }, { 0x008007, 0x00800A }, { 0x00F000, 0x00F0FF }, 0x3F80, "p16f18323.inc" , "16f18323_g.lkr" , CPU_NO_OPTION_INSN },
{ PROC_CLASS_PIC14E , "__16F18324" , { "pic16f18324" , "p16f18324" , "16f18324" }, 0x8324, 2, 32, 0x0F80, { 0x70, 0x7F }, -1, { 0x2000, 0x21EF }, 0x0FFF, 0x00F0FF, 0x001000, { 0x001000, 0x00EFFF }, { 0x008000, 0x008003 }, { 0x008007, 0x00800A }, { 0x00F000, 0x00F0FF }, 0x3F80, "p16f18324.inc" , "16f18324_g.lkr" , CPU_NO_OPTION_INSN },
{ PROC_CLASS_PIC14E , "__16F18325" , { "pic16f18325" , "p16f18325" , "16f18325" }, 0x1835, 4, 32, 0x0F80, { 0x70, 0x7F }, -1, { 0x2000, 0x23EF }, 0x0FFF, 0x00F0FF, 0x002000, { 0x002000, 0x00EFFF }, { 0x008000, 0x008003 }, { 0x008007, 0x00800A }, { 0x00F000, 0x00F0FF }, 0x3F80, "p16f18325.inc" , "16f18325_g.lkr" , CPU_NO_OPTION_INSN },
{ PROC_CLASS_PIC14E , "__16F18326" , { "pic16f18326" , "p16f18326" , "16f18326" }, 0x8326, 8, 32, 0x0F80, { 0x70, 0x7F }, -1, { 0x2000, 0x23EF }, 0x0FFF, 0x00F0FF, 0x004000, { 0x004000, 0x00EFFF }, { 0x008000, 0x008003 }, { 0x008007, 0x00800A }, { 0x00F000, 0x00F0FF }, 0x3F80, "p16f18326.inc" , "16f18326_g.lkr" , 0 },
{ PROC_CLASS_PIC14E , "__16F18344" , { "pic16f18344" , "p16f18344" , "16f18344" }, 0x8344, 2, 32, 0x0F80, { 0x70, 0x7F }, -1, { 0x2000, 0x21EF }, 0x0FFF, 0x00F0FF, 0x001000, { 0x001000, 0x00EFFF }, { 0x008000, 0x008003 }, { 0x008007, 0x00800A }, { 0x00F000, 0x00F0FF }, 0x3F80, "p16f18344.inc" , "16f18344_g.lkr" , CPU_NO_OPTION_INSN },
{ PROC_CLASS_PIC14E , "__16F18345" , { "pic16f18345" , "p16f18345" , "16f18345" }, 0x1834, 4, 32, 0x0F80, { 0x70, 0x7F }, -1, { 0x2000, 0x23EF }, 0x0FFF, 0x00F0FF, 0x002000, { 0x002000, 0x00EFFF }, { 0x008000, 0x008003 }, { 0x008007, 0x00800A }, { 0x00F000, 0x00F0FF }, 0x3F80, "p16f18345.inc" , "16f18345_g.lkr" , CPU_NO_OPTION_INSN },
{ PROC_CLASS_PIC14E , "__16F18346" , { "pic16f18346" , "p16f18346" , "16f18346" }, 0x8346, 8, 32, 0x0F80, { 0x70, 0x7F }, -1, { 0x2000, 0x23EF }, 0x0FFF, 0x00F0FF, 0x004000, { 0x004000, 0x00EFFF }, { 0x008000, 0x008003 }, { 0x008007, 0x00800A }, { 0x00F000, 0x00F0FF }, 0x3F80, "p16f18346.inc" , "16f18346_g.lkr" , 0 },
{ PROC_CLASS_PIC14E , "__16F18854" , { "pic16f18854" , "p16f18854" , "16f18854" }, 0x8854, 2, 32, 0x0F80, { 0x70, 0x7F }, -1, { 0x2000, 0x21EF }, 0x0FFF, 0x00F0FF, 0x001000, { 0x001000, 0x00EFFF }, { 0x008000, 0x008003 }, { 0x008007, 0x00800B }, { 0x00F000, 0x00F0FF }, 0x3F80, "p16f18854.inc" , "16f18854_g.lkr" , 0 },
{ PROC_CLASS_PIC14E , "__16F18855" , { "pic16f18855" , "p16f18855" , "16f18855" }, 0x8855, 4, 32, 0x0F80, { 0x70, 0x7F }, -1, { 0x2000, 0x23EF }, 0x0FFF, 0x00F0FF, 0x002000, { 0x002000, 0x00EFFF }, { 0x008000, 0x008003 }, { 0x008007, 0x00800B }, { 0x00F000, 0x00F0FF }, 0x3F80, "p16f18855.inc" , "16f18855_g.lkr" , 0 },
{ PROC_CLASS_PIC14E , "__16F18856" , { "pic16f18856" , "p16f18856" , "16f18856" }, 0x8856, 8, 32, 0x0F80, { 0x70, 0x7F }, -1, { 0x2000, 0x27EF }, 0x0FFF, 0x00F0FF, 0x004000, { 0x004000, 0x00EFFF }, { 0x008000, 0x008003 }, { 0x008007, 0x00800B }, { 0x00F000, 0x00F0FF }, 0x3F80, "p16f18856.inc" , "16f18856_g.lkr" , 0 },
{ PROC_CLASS_PIC14EX , "__16F18857" , { "pic16f18857" , "p16f18857" , "16f18857" }, 0x8857, 16, 64, 0x1F80, { 0x70, 0x7F }, -1, { 0x2000, 0x30BF }, 0x1FFF, 0x00F0FF, 0x008000, { 0x008000, 0x00EFFF }, { 0x008000, 0x008003 }, { 0x008007, 0x00800B }, { 0x00F000, 0x00F0FF }, 0x3F80, "p16f18857.inc" , "16f18857_g.lkr" , 0 },
{ PROC_CLASS_PIC14E , "__16F18875" , { "pic16f18875" , "p16f18875" , "16f18875" }, 0x8875, 4, 32, 0x0F80, { 0x70, 0x7F }, -1, { 0x2000, 0x23EF }, 0x0FFF, 0x00F0FF, 0x002000, { 0x002000, 0x00EFFF }, { 0x008000, 0x008003 }, { 0x008007, 0x00800B }, { 0x00F000, 0x00F0FF }, 0x3F80, "p16f18875.inc" , "16f18875_g.lkr" , 0 },
{ PROC_CLASS_PIC14E , "__16F18876" , { "pic16f18876" , "p16f18876" , "16f18876" }, 0x8876, 8, 32, 0x0F80, { 0x70, 0x7F }, -1, { 0x2000, 0x27EF }, 0x0FFF, 0x00F0FF, 0x004000, { 0x004000, 0x00EFFF }, { 0x008000, 0x008003 }, { 0x008007, 0x00800B }, { 0x00F000, 0x00F0FF }, 0x3F80, "p16f18876.inc" , "16f18876_g.lkr" , 0 },
{ PROC_CLASS_PIC14EX , "__16F18877" , { "pic16f18877" , "p16f18877" , "16f18877" }, 0x8877, 16, 64, 0x1F80, { 0x70, 0x7F }, -1, { 0x2000, 0x31EF }, 0x1FFF, 0x00F0FF, 0x008000, { 0x008000, 0x00EFFF }, { 0x008000, 0x008003 }, { 0x008007, 0x00800B }, { 0x00F000, 0x00F0FF }, 0x3F80, "p16f18877.inc" , "16f18877_g.lkr" , 0 },
{ PROC_CLASS_PIC14EX , "__16F19195" , { "pic16f19195" , "p16f19195" , "16f19195" }, 0xA279, 4, 64, 0x1F80, { 0x70, 0x7F }, -1, { 0x2000, 0x23EF }, 0x1FFF, 0x00F0FF, 0x002000, { 0x002000, 0x00EFFF }, { 0x008000, 0x008003 }, { 0x008007, 0x00800B }, { 0x00F000, 0x00F0FF }, 0x3F80, "p16f19195.inc" , "16f19195_g.lkr" , CPU_NO_OPTION_INSN },
{ PROC_CLASS_PIC14EX , "__16F19196" , { "pic16f19196" , "p16f19196" , "16f19196" }, 0xA27A, 8, 64, 0x1F80, { 0x70, 0x7F }, -1, { 0x2000, 0x27EF }, 0x1FFF, 0x00F0FF, 0x004000, { 0x004000, 0x00EFFF }, { 0x008000, 0x008003 }, { 0x008007, 0x00800B }, { 0x00F000, 0x00F0FF }, 0x3F80, "p16f19196.inc" , "16f19196_g.lkr" , CPU_NO_OPTION_INSN },
{ PROC_CLASS_PIC14EX , "__16F19197" , { "pic16f19197" , "p16f19197" , "16f19197" }, 0xA27B, 16, 64, 0x1F80, { 0x70, 0x7F }, -1, { 0x2000, 0x31EF }, 0x1FFF, 0x00F0FF, 0x008000, { 0x008000, 0x00EFFF }, { 0x008000, 0x008003 }, { 0x008007, 0x00800B }, { 0x00F000, 0x00F0FF }, 0x3F80, "p16f19197.inc" , "16f19197_g.lkr" , CPU_NO_OPTION_INSN },
{ PROC_CLASS_PIC12 , "__16HV540" , { "pic16hv540" , "p16hv540" , "16hv540" }, 0x6540, 1, 1, 0x0000, { -1, -1 }, -1, { -1, -1 }, 0x001F, 0x0001FF, 0x000200, { -1, -1 }, { 0x000200, 0x000203 }, { 0x000FFF, 0x000FFF }, { -1, -1 }, 0x0FF0, "p16hv540.inc" , "16hv540_g.lkr" , 0 },
{ PROC_CLASS_PIC14 , "__16HV610" , { "pic16hv610" , "p16hv610" , "16hv610" }, 0x6610, 1, 2, 0x0080, { 0x70, 0x7F }, -1, { -1, -1 }, 0x00FF, 0x0003FF, 0x000400, { -1, -1 }, { 0x002000, 0x002003 }, { 0x002007, 0x002007 }, { -1, -1 }, 0x3F80, "p16hv610.inc" , "16hv610_g.lkr" , 0 },
{ PROC_CLASS_PIC14 , "__16HV616" , { "pic16hv616" , "p16hv616" , "16hv616" }, 0x6616, 1, 2, 0x0080, { 0x70, 0x7F }, -1, { -1, -1 }, 0x00FF, 0x0007FF, 0x000800, { -1, -1 }, { 0x002000, 0x002003 }, { 0x002007, 0x002007 }, { -1, -1 }, 0x3F80, "p16hv616.inc" , "16hv616_g.lkr" , 0 },
{ PROC_CLASS_PIC14 , "__16HV753" , { "pic16hv753" , "p16hv753" , "16hv753" }, 0x6753, 1, 4, 0x0180, { 0x70, 0x7F }, -1, { -1, -1 }, 0x01FF, 0x0007FF, 0x000800, { -1, -1 }, { 0x002000, 0x002003 }, { 0x002007, 0x002007 }, { -1, -1 }, 0x3F80, "p16hv753.inc" , "16hv753_g.lkr" , 0 },
{ PROC_CLASS_PIC14 , "__16HV785" , { "pic16hv785" , "p16hv785" , "16hv785" }, 0x6785, 1, 4, 0x0180, { 0x70, 0x7F }, -1, { -1, -1 }, 0x01FF, 0x0021FF, 0x000800, { 0x000800, 0x0020FF }, { 0x002000, 0x002003 }, { 0x002007, 0x002007 }, { 0x002100, 0x0021FF }, 0x3F80, "p16hv785.inc" , "16hv785_g.lkr" , 0 },
{ PROC_CLASS_PIC14 , "__16LF74" , { "pic16lf74" , "p16lf74" , "16lf74" }, 0xA674, 2, 4, 0x0180, { -1, -1 }, -1, { -1, -1 }, 0x01FF, 0x000FFF, 0x001000, { -1, -1 }, { 0x002000, 0x002003 }, { 0x002007, 0x002007 }, { -1, -1 }, 0x3F80, "p16lf74.inc" , "16lf74_g.lkr" , 0 },
{ PROC_CLASS_PIC14 , "__16LF76" , { "pic16lf76" , "p16lf76" , "16lf76" }, 0xA676, 4, 4, 0x0180, { 0x70, 0x7F }, -1, { -1, -1 }, 0x01FF, 0x001FFF, 0x002000, { -1, -1 }, { 0x002000, 0x002003 }, { 0x002007, 0x002007 }, { -1, -1 }, 0x3F80, "p16lf76.inc" , "16lf76_g.lkr" , 0 },
{ PROC_CLASS_PIC14 , "__16LF77" , { "pic16lf77" , "p16lf77" , "16lf77" }, 0xA677, 4, 4, 0x0180, { 0x70, 0x7F }, -1, { -1, -1 }, 0x01FF, 0x001FFF, 0x002000, { -1, -1 }, { 0x002000, 0x002003 }, { 0x002007, 0x002007 }, { -1, -1 }, 0x3F80, "p16lf77.inc" , "16lf77_g.lkr" , 0 },
{ PROC_CLASS_PIC14 , "__16LF83" , { "pic16lf83" , "p16lf83" , "16lf83" }, 0xA683, 1, 2, 0x0080, { 0x0C, 0x2F }, -1, { -1, -1 }, 0x00AF, 0x00213F, 0x000200, { 0x000200, 0x0020FF }, { 0x002000, 0x002003 }, { 0x002007, 0x002007 }, { 0x002100, 0x00213F }, 0x3F80, "p16lf83.inc" , "16lf83_g.lkr" , 0 },
{ PROC_CLASS_PIC14 , "__16LF84" , { "pic16lf84" , "p16lf84" , "16lf84" }, 0xA684, 1, 2, 0x0080, { 0x0C, 0x4F }, -1, { -1, -1 }, 0x00CF, 0x00213F, 0x000400, { 0x000400, 0x0020FF }, { 0x002000, 0x002003 }, { 0x002007, 0x002007 }, { 0x002100, 0x00213F }, 0x3F80, "p16lf84.inc" , "16lf84_g.lkr" , 0 },
{ PROC_CLASS_PIC14 , "__16LF84A" , { "pic16lf84a" , "p16lf84a" , "16lf84a" }, 0xA685, 1, 2, 0x0080, { 0x0C, 0x4F }, -1, { -1, -1 }, 0x00CF, 0x00213F, 0x000400, { 0x000400, 0x0020FF }, { 0x002000, 0x002003 }, { 0x002007, 0x002007 }, { 0x002100, 0x00213F }, 0x3F80, "p16lf84a.inc" , "16lf84a_g.lkr" , 0 },
{ PROC_CLASS_PIC14 , "__16LF87" , { "pic16lf87" , "p16lf87" , "16lf87" }, 0xA807, 2, 4, 0x0180, { 0x70, 0x7F }, -1, { -1, -1 }, 0x01FF, 0x0021FF, 0x001000, { 0x001000, 0x0020FF }, { 0x002000, 0x002003 }, { 0x002007, 0x002008 }, { 0x002100, 0x0021FF }, 0x3F80, "p16lf87.inc" , "16lf87_g.lkr" , 0 },
{ PROC_CLASS_PIC14 , "__16LF88" , { "pic16lf88" , "p16lf88" , "16lf88" }, 0xA808, 2, 4, 0x0180, { 0x70, 0x7F }, -1, { -1, -1 }, 0x01FF, 0x0021FF, 0x001000, { 0x001000, 0x0020FF }, { 0x002000, 0x002003 }, { 0x002007, 0x002008 }, { 0x002100, 0x0021FF }, 0x3F80, "p16lf88.inc" , "16lf88_g.lkr" , 0 },
{ PROC_CLASS_PIC14 , "__16LF627" , { "pic16lf627" , "p16lf627" , "16lf627" }, 0xA627, 1, 4, 0x0180, { 0x70, 0x7F }, -1, { -1, -1 }, 0x01FF, 0x00217F, 0x000400, { 0x000400, 0x0020FF }, { 0x002000, 0x002003 }, { 0x002007, 0x002007 }, { 0x002100, 0x00217F }, 0x3F80, "p16lf627.inc" , "16lf627_g.lkr" , 0 },
{ PROC_CLASS_PIC14 , "__16LF627A" , { "pic16lf627a" , "p16lf627a" , "16lf627a" }, 0xC627, 1, 4, 0x0180, { 0x70, 0x7F }, -1, { -1, -1 }, 0x01FF, 0x00217F, 0x000400, { 0x000400, 0x0020FF }, { 0x002000, 0x002003 }, { 0x002007, 0x002007 }, { 0x002100, 0x00217F }, 0x3F80, "p16lf627a.inc" , "16lf627a_g.lkr" , 0 },
{ PROC_CLASS_PIC14 , "__16LF628" , { "pic16lf628" , "p16lf628" , "16lf628" }, 0xB628, 1, 4, 0x0180, { 0x70, 0x7F }, -1, { -1, -1 }, 0x01FF, 0x00217F, 0x000800, { 0x000800, 0x0020FF }, { 0x002000, 0x002003 }, { 0x002007, 0x002007 }, { 0x002100, 0x00217F }, 0x3F80, "p16lf628.inc" , "16lf628_g.lkr" , 0 },
{ PROC_CLASS_PIC14 , "__16LF628A" , { "pic16lf628a" , "p16lf628a" , "16lf628a" }, 0xC628, 1, 4, 0x0180, { 0x70, 0x7F }, -1, { -1, -1 }, 0x01FF, 0x00217F, 0x000800, { 0x000800, 0x0020FF }, { 0x002000, 0x002003 }, { 0x002007, 0x002007 }, { 0x002100, 0x00217F }, 0x3F80, "p16lf628a.inc" , "16lf628a_g.lkr" , 0 },
{ PROC_CLASS_PIC14 , "__16LF648A" , { "pic16lf648a" , "p16lf648a" , "16lf648a" }, 0xC648, 2, 4, 0x0180, { 0x70, 0x7F }, -1, { -1, -1 }, 0x01FF, 0x0021FF, 0x001000, { 0x001000, 0x0020FF }, { 0x002000, 0x002003 }, { 0x002007, 0x002007 }, { 0x002100, 0x0021FF }, 0x3F80, "p16lf648a.inc" , "16lf648a_g.lkr" , 0 },
{ PROC_CLASS_PIC14 , "__16LF707" , { "pic16lf707" , "p16lf707" , "16lf707" }, 0xD707, 4, 4, 0x0180, { 0x70, 0x7F }, -1, { -1, -1 }, 0x01FF, 0x001FFF, 0x002000, { -1, -1 }, { 0x002000, 0x002003 }, { 0x002007, 0x002008 }, { -1, -1 }, 0x3F80, "p16lf707.inc" , "16lf707_g.lkr" , 0 },
{ PROC_CLASS_PIC14 , "__16LF720" , { "pic16lf720" , "p16lf720" , "16lf720" }, 0xD720, 1, 4, 0x0180, { 0x70, 0x7F }, -1, { -1, -1 }, 0x01FF, 0x0007FF, 0x000800, { -1, -1 }, { 0x002000, 0x002003 }, { 0x002007, 0x002008 }, { -1, -1 }, 0x3F80, "p16lf720.inc" , "16lf720_g.lkr" , 0 },
{ PROC_CLASS_PIC14 , "__16LF721" , { "pic16lf721" , "p16lf721" , "16lf721" }, 0xD721, 2, 4, 0x0180, { 0x70, 0x7F }, -1, { -1, -1 }, 0x01FF, 0x000FFF, 0x001000, { -1, -1 }, { 0x002000, 0x002003 }, { 0x002007, 0x002008 }, { -1, -1 }, 0x3F80, "p16lf721.inc" , "16lf721_g.lkr" , 0 },
{ PROC_CLASS_PIC14 , "__16LF722" , { "pic16lf722" , "p16lf722" , "16lf722" }, 0xD722, 1, 4, 0x0180, { 0x70, 0x7F }, -1, { -1, -1 }, 0x01FF, 0x0007FF, 0x000800, { -1, -1 }, { 0x002000, 0x002003 }, { 0x002007, 0x002008 }, { -1, -1 }, 0x3F80, "p16lf722.inc" , "16lf722_g.lkr" , 0 },
{ PROC_CLASS_PIC14 , "__16LF722A" , { "pic16lf722a" , "p16lf722a" , "16lf722a" }, 0xB722, 1, 4, 0x0180, { 0x70, 0x7F }, -1, { -1, -1 }, 0x01FF, 0x0007FF, 0x000800, { -1, -1 }, { 0x002000, 0x002003 }, { 0x002007, 0x002008 }, { -1, -1 }, 0x3F80, "p16lf722a.inc" , "16lf722a_g.lkr" , 0 },
{ PROC_CLASS_PIC14 , "__16LF723" , { "pic16lf723" , "p16lf723" , "16lf723" }, 0xD723, 2, 4, 0x0180, { 0x70, 0x7F }, -1, { -1, -1 }, 0x01FF, 0x000FFF, 0x001000, { -1, -1 }, { 0x002000, 0x002003 }, { 0x002007, 0x002008 }, { -1, -1 }, 0x3F80, "p16lf723.inc" , "16lf723_g.lkr" , 0 },
{ PROC_CLASS_PIC14 , "__16LF723A" , { "pic16lf723a" , "p16lf723a" , "16lf723a" }, 0xB723, 2, 4, 0x0180, { 0x70, 0x7F }, -1, { -1, -1 }, 0x01FF, 0x000FFF, 0x001000, { -1, -1 }, { 0x002000, 0x002003 }, { 0x002007, 0x002008 }, { -1, -1 }, 0x3F80, "p16lf723a.inc" , "16lf723a_g.lkr" , 0 },
{ PROC_CLASS_PIC14 , "__16LF724" , { "pic16lf724" , "p16lf724" , "16lf724" }, 0xD724, 2, 4, 0x0180, { 0x70, 0x7F }, -1, { -1, -1 }, 0x01FF, 0x000FFF, 0x001000, { -1, -1 }, { 0x002000, 0x002003 }, { 0x002007, 0x002008 }, { -1, -1 }, 0x3F80, "p16lf724.inc" , "16lf724_g.lkr" , 0 },
{ PROC_CLASS_PIC14 , "__16LF726" , { "pic16lf726" , "p16lf726" , "16lf726" }, 0xD726, 4, 4, 0x0180, { 0x70, 0x7F }, -1, { -1, -1 }, 0x01FF, 0x001FFF, 0x002000, { -1, -1 }, { 0x002000, 0x002003 }, { 0x002007, 0x002008 }, { -1, -1 }, 0x3F80, "p16lf726.inc" , "16lf726_g.lkr" , 0 },
{ PROC_CLASS_PIC14 , "__16LF727" , { "pic16lf727" , "p16lf727" , "16lf727" }, 0xD727, 4, 4, 0x0180, { 0x70, 0x7F }, -1, { -1, -1 }, 0x01FF, 0x001FFF, 0x002000, { -1, -1 }, { 0x002000, 0x002003 }, { 0x002007, 0x002008 }, { -1, -1 }, 0x3F80, "p16lf727.inc" , "16lf727_g.lkr" , 0 },
{ PROC_CLASS_PIC14 , "__16LF747" , { "pic16lf747" , "p16lf747" , "16lf747" }, 0xA747, 2, 4, 0x0180, { 0x70, 0x7F }, -1, { -1, -1 }, 0x01FF, 0x000FFF, 0x001000, { -1, -1 }, { 0x002000, 0x002003 }, { 0x002007, 0x002008 }, { -1, -1 }, 0x3F80, "p16lf747.inc" , "16lf747_g.lkr" , 0 },
{ PROC_CLASS_PIC14 , "__16LF767" , { "pic16lf767" , "p16lf767" , "16lf767" }, 0xA767, 4, 4, 0x0180, { 0x70, 0x7F }, -1, { -1, -1 }, 0x01FF, 0x001FFF, 0x002000, { -1, -1 }, { 0x002000, 0x002003 }, { 0x002007, 0x002008 }, { -1, -1 }, 0x3F80, "p16lf767.inc" , "16lf767_g.lkr" , 0 },
{ PROC_CLASS_PIC14 , "__16LF777" , { "pic16lf777" , "p16lf777" , "16lf777" }, 0xA777, 4, 4, 0x0180, { 0x70, 0x7F }, -1, { -1, -1 }, 0x01FF, 0x001FFF, 0x002000, { -1, -1 }, { 0x002000, 0x002003 }, { 0x002007, 0x002008 }, { -1, -1 }, 0x3F80, "p16lf777.inc" , "16lf777_g.lkr" , 0 },
{ PROC_CLASS_PIC14 , "__16LF818" , { "pic16lf818" , "p16lf818" , "16lf818" }, 0xA818, 1, 4, 0x0180, { 0x40, 0x7F }, -1, { -1, -1 }, 0x01FF, 0x00217F, 0x000400, { 0x000400, 0x0020FF }, { 0x002000, 0x002003 }, { 0x002007, 0x002007 }, { 0x002100, 0x00217F }, 0x3F80, "p16lf818.inc" , "16lf818_g.lkr" , 0 },
{ PROC_CLASS_PIC14 , "__16LF819" , { "pic16lf819" , "p16lf819" , "16lf819" }, 0xA819, 1, 4, 0x0180, { 0x70, 0x7F }, -1, { -1, -1 }, 0x01FF, 0x0021FF, 0x000800, { 0x000800, 0x0020FF }, { 0x002000, 0x002003 }, { 0x002007, 0x002007 }, { 0x002100, 0x0021FF }, 0x3F80, "p16lf819.inc" , "16lf819_g.lkr" , 0 },
{ PROC_CLASS_PIC14 , "__16LF870" , { "pic16lf870" , "p16lf870" , "16lf870" }, 0xA870, 1, 4, 0x0180, { 0x70, 0x7F }, -1, { -1, -1 }, 0x01FF, 0x00213F, 0x000800, { 0x000800, 0x0020FF }, { 0x002000, 0x002003 }, { 0x002007, 0x002007 }, { 0x002100, 0x00213F }, 0x3F80, "p16lf870.inc" , "16lf870_g.lkr" , 0 },
{ PROC_CLASS_PIC14 , "__16LF871" , { "pic16lf871" , "p16lf871" , "16lf871" }, 0xA871, 1, 4, 0x0180, { 0x70, 0x7F }, -1, { -1, -1 }, 0x01FF, 0x00213F, 0x000800, { 0x000800, 0x0020FF }, { 0x002000, 0x002003 }, { 0x002007, 0x002007 }, { 0x002100, 0x00213F }, 0x3F80, "p16lf871.inc" , "16lf871_g.lkr" , 0 },
{ PROC_CLASS_PIC14 , "__16LF872" , { "pic16lf872" , "p16lf872" , "16lf872" }, 0xA800, 1, 4, 0x0180, { 0x70, 0x7F }, -1, { -1, -1 }, 0x01FF, 0x00213F, 0x000800, { 0x000800, 0x0020FF }, { 0x002000, 0x002003 }, { 0x002007, 0x002007 }, { 0x002100, 0x00213F }, 0x3F80, "p16lf872.inc" , "16lf872_g.lkr" , 0 },
{ PROC_CLASS_PIC14 , "__16LF873" , { "pic16lf873" , "p16lf873" , "16lf873" }, 0xA873, 2, 4, 0x0180, { -1, -1 }, -1, { -1, -1 }, 0x01FF, 0x00217F, 0x001000, { 0x001000, 0x0020FF }, { 0x002000, 0x002003 }, { 0x002007, 0x002007 }, { 0x002100, 0x00217F }, 0x3F80, "p16lf873.inc" , "16lf873_g.lkr" , 0 },
{ PROC_CLASS_PIC14 , "__16LF873A" , { "pic16lf873a" , "p16lf873a" , "16lf873a" }, 0xA803, 2, 4, 0x0180, { -1, -1 }, -1, { -1, -1 }, 0x01FF, 0x00217F, 0x001000, { 0x001000, 0x0020FF }, { 0x002000, 0x002003 }, { 0x002007, 0x002007 }, { 0x002100, 0x00217F }, 0x3F80, "p16lf873a.inc" , "16lf873a_g.lkr" , 0 },
{ PROC_CLASS_PIC14 , "__16LF874" , { "pic16lf874" , "p16lf874" , "16lf874" }, 0xA874, 2, 4, 0x0180, { -1, -1 }, -1, { -1, -1 }, 0x01FF, 0x00217F, 0x001000, { 0x001000, 0x0020FF }, { 0x002000, 0x002003 }, { 0x002007, 0x002007 }, { 0x002100, 0x00217F }, 0x3F80, "p16lf874.inc" , "16lf874_g.lkr" , 0 },
{ PROC_CLASS_PIC14 , "__16LF874A" , { "pic16lf874a" , "p16lf874a" , "16lf874a" }, 0xA804, 2, 4, 0x0180, { -1, -1 }, -1, { -1, -1 }, 0x01FF, 0x00217F, 0x001000, { 0x001000, 0x0020FF }, { 0x002000, 0x002003 }, { 0x002007, 0x002007 }, { 0x002100, 0x00217F }, 0x3F80, "p16lf874a.inc" , "16lf874a_g.lkr" , 0 },
{ PROC_CLASS_PIC14 , "__16LF876" , { "pic16lf876" , "p16lf876" , "16lf876" }, 0xA801, 4, 4, 0x0180, { 0x70, 0x7F }, -1, { -1, -1 }, 0x01FF, 0x0021FF, 0x002000, { 0x002000, 0x0020FF }, { 0x002000, 0x002003 }, { 0x002007, 0x002007 }, { 0x002100, 0x0021FF }, 0x3F80, "p16lf876.inc" , "16lf876_g.lkr" , 0 },
{ PROC_CLASS_PIC14 , "__16LF876A" , { "pic16lf876a" , "p16lf876a" , "16lf876a" }, 0xA805, 4, 4, 0x0180, { 0x70, 0x7F }, -1, { -1, -1 }, 0x01FF, 0x0021FF, 0x002000, { 0x002000, 0x0020FF }, { 0x002000, 0x002003 }, { 0x002007, 0x002007 }, { 0x002100, 0x0021FF }, 0x3F80, "p16lf876a.inc" , "16lf876a_g.lkr" , 0 },
{ PROC_CLASS_PIC14 , "__16LF877" , { "pic16lf877" , "p16lf877" , "16lf877" }, 0xA802, 4, 4, 0x0180, { 0x70, 0x7F }, -1, { -1, -1 }, 0x01FF, 0x0021FF, 0x002000, { 0x002000, 0x0020FF }, { 0x002000, 0x002003 }, { 0x002007, 0x002007 }, { 0x002100, 0x0021FF }, 0x3F80, "p16lf877.inc" , "16lf877_g.lkr" , 0 },
{ PROC_CLASS_PIC14 , "__16LF877A" , { "pic16lf877a" , "p16lf877a" , "16lf877a" }, 0xA806, 4, 4, 0x0180, { 0x70, 0x7F }, -1, { -1, -1 }, 0x01FF, 0x0021FF, 0x002000, { 0x002000, 0x0020FF }, { 0x002000, 0x002003 }, { 0x002007, 0x002007 }, { 0x002100, 0x0021FF }, 0x3F80, "p16lf877a.inc" , "16lf877a_g.lkr" , 0 },
{ PROC_CLASS_PIC14E , "__16LF1454" , { "pic16lf1454" , "p16lf1454" , "16lf1454" }, 0xA454, 4, 32, 0x0F80, { 0x70, 0x7F }, -1, { 0x2000, 0x23EF }, 0x0FFF, 0x001FFF, 0x002000, { -1, -1 }, { 0x008000, 0x008003 }, { 0x008007, 0x008008 }, { -1, -1 }, 0x3F80, "p16lf1454.inc" , "16lf1454_g.lkr" , 0 },
{ PROC_CLASS_PIC14E , "__16LF1455" , { "pic16lf1455" , "p16lf1455" , "16lf1455" }, 0xA455, 4, 32, 0x0F80, { 0x70, 0x7F }, -1, { 0x2000, 0x23EF }, 0x0FFF, 0x001FFF, 0x002000, { -1, -1 }, { 0x008000, 0x008003 }, { 0x008007, 0x008008 }, { -1, -1 }, 0x3F80, "p16lf1455.inc" , "16lf1455_g.lkr" , 0 },
{ PROC_CLASS_PIC14E , "__16LF1458" , { "pic16lf1458" , "p16lf1458" , "16lf1458" }, 0xA458, 2, 32, 0x0F80, { 0x70, 0x7F }, -1, { 0x2000, 0x21EF }, 0x0FFF, 0x000FFF, 0x001000, { -1, -1 }, { 0x008000, 0x008003 }, { 0x008007, 0x008008 }, { -1, -1 }, 0x3F80, "p16lf1458.inc" , "16lf1458_g.lkr" , 0 },
{ PROC_CLASS_PIC14E , "__16LF1459" , { "pic16lf1459" , "p16lf1459" , "16lf1459" }, 0xA459, 4, 32, 0x0F80, { 0x70, 0x7F }, -1, { 0x2000, 0x23EF }, 0x0FFF, 0x001FFF, 0x002000, { -1, -1 }, { 0x008000, 0x008003 }, { 0x008007, 0x008008 }, { -1, -1 }, 0x3F80, "p16lf1459.inc" , "16lf1459_g.lkr" , 0 },
{ PROC_CLASS_PIC14E , "__16LF1503" , { "pic16lf1503" , "p16lf1503" , "16lf1503" }, 0xA503, 1, 32, 0x0F80, { 0x70, 0x7F }, -1, { 0x2000, 0x206F }, 0x0FFF, 0x0007FF, 0x000800, { -1, -1 }, { 0x008000, 0x008003 }, { 0x008007, 0x008008 }, { -1, -1 }, 0x3F80, "p16lf1503.inc" , "16lf1503_g.lkr" , 0 },
{ PROC_CLASS_PIC14E , "__16LF1507" , { "pic16lf1507" , "p16lf1507" , "16lf1507" }, 0xA507, 1, 32, 0x0F80, { 0x70, 0x7F }, -1, { 0x2000, 0x206F }, 0x0FFF, 0x0007FF, 0x000800, { -1, -1 }, { 0x008000, 0x008003 }, { 0x008007, 0x008008 }, { -1, -1 }, 0x3F80, "p16lf1507.inc" , "16lf1507_g.lkr" , 0 },
{ PROC_CLASS_PIC14E , "__16LF1508" , { "pic16lf1508" , "p16lf1508" , "16lf1508" }, 0xA508, 2, 32, 0x0F80, { 0x70, 0x7F }, -1, { 0x2000, 0x20EF }, 0x0FFF, 0x000FFF, 0x001000, { -1, -1 }, { 0x008000, 0x008003 }, { 0x008007, 0x008008 }, { -1, -1 }, 0x3F80, "p16lf1508.inc" , "16lf1508_g.lkr" , 0 },
{ PROC_CLASS_PIC14E , "__16LF1509" , { "pic16lf1509" , "p16lf1509" , "16lf1509" }, 0xA509, 4, 32, 0x0F80, { 0x70, 0x7F }, -1, { 0x2000, 0x21EF }, 0x0FFF, 0x001FFF, 0x002000, { -1, -1 }, { 0x008000, 0x008003 }, { 0x008007, 0x008008 }, { -1, -1 }, 0x3F80, "p16lf1509.inc" , "16lf1509_g.lkr" , 0 },
{ PROC_CLASS_PIC14E , "__16LF1512" , { "pic16lf1512" , "p16lf1512" , "16lf1512" }, 0xA512, 1, 32, 0x0F80, { 0x70, 0x7F }, -1, { 0x2000, 0x206F }, 0x0FFF, 0x0007FF, 0x000800, { -1, -1 }, { 0x008000, 0x008003 }, { 0x008007, 0x008008 }, { -1, -1 }, 0x3F80, "p16lf1512.inc" , "16lf1512_g.lkr" , 0 },
{ PROC_CLASS_PIC14E , "__16LF1513" , { "pic16lf1513" , "p16lf1513" , "16lf1513" }, 0xA513, 2, 32, 0x0F80, { 0x70, 0x7F }, -1, { 0x2000, 0x20EF }, 0x0FFF, 0x000FFF, 0x001000, { -1, -1 }, { 0x008000, 0x008003 }, { 0x008007, 0x008008 }, { -1, -1 }, 0x3F80, "p16lf1513.inc" , "16lf1513_g.lkr" , 0 },
{ PROC_CLASS_PIC14E , "__16LF1516" , { "pic16lf1516" , "p16lf1516" , "16lf1516" }, 0xA516, 4, 32, 0x0F80, { 0x70, 0x7F }, -1, { 0x2000, 0x21EF }, 0x0FFF, 0x001FFF, 0x002000, { -1, -1 }, { 0x008000, 0x008003 }, { 0x008007, 0x008008 }, { -1, -1 }, 0x3F80, "p16lf1516.inc" , "16lf1516_g.lkr" , 0 },
{ PROC_CLASS_PIC14E , "__16LF1517" , { "pic16lf1517" , "p16lf1517" , "16lf1517" }, 0xA517, 4, 32, 0x0F80, { 0x70, 0x7F }, -1, { 0x2000, 0x21EF }, 0x0FFF, 0x001FFF, 0x002000, { -1, -1 }, { 0x008000, 0x008003 }, { 0x008007, 0x008008 }, { -1, -1 }, 0x3F80, "p16lf1517.inc" , "16lf1517_g.lkr" , 0 },
{ PROC_CLASS_PIC14E , "__16LF1518" , { "pic16lf1518" , "p16lf1518" , "16lf1518" }, 0xA518, 8, 32, 0x0F80, { 0x70, 0x7F }, -1, { 0x2000, 0x23EF }, 0x0FFF, 0x003FFF, 0x004000, { -1, -1 }, { 0x008000, 0x008003 }, { 0x008007, 0x008008 }, { -1, -1 }, 0x3F80, "p16lf1518.inc" , "16lf1518_g.lkr" , 0 },
{ PROC_CLASS_PIC14E , "__16LF1519" , { "pic16lf1519" , "p16lf1519" , "16lf1519" }, 0xA519, 8, 32, 0x0F80, { 0x70, 0x7F }, -1, { 0x2000, 0x23EF }, 0x0FFF, 0x003FFF, 0x004000, { -1, -1 }, { 0x008000, 0x008003 }, { 0x008007, 0x008008 }, { -1, -1 }, 0x3F80, "p16lf1519.inc" , "16lf1519_g.lkr" , 0 },
{ PROC_CLASS_PIC14E , "__16LF1526" , { "pic16lf1526" , "p16lf1526" , "16lf1526" }, 0xA526, 4, 32, 0x0F80, { 0x70, 0x7F }, -1, { 0x2000, 0x22EF }, 0x0FFF, 0x001FFF, 0x002000, { -1, -1 }, { 0x008000, 0x008003 }, { 0x008007, 0x008008 }, { -1, -1 }, 0x3F80, "p16lf1526.inc" , "16lf1526_g.lkr" , 0 },
{ PROC_CLASS_PIC14E , "__16LF1527" , { "pic16lf1527" , "p16lf1527" , "16lf1527" }, 0xA527, 8, 32, 0x0F80, { 0x70, 0x7F }, -1, { 0x2000, 0x25EF }, 0x0FFF, 0x003FFF, 0x004000, { -1, -1 }, { 0x008000, 0x008003 }, { 0x008007, 0x008008 }, { -1, -1 }, 0x3F80, "p16lf1527.inc" , "16lf1527_g.lkr" , 0 },
{ PROC_CLASS_PIC14E , "__16LF1554" , { "pic16lf1554" , "p16lf1554" , "16lf1554" }, 0xA554, 2, 32, 0x0F80, { 0x70, 0x7F }, -1, { 0x2000, 0x20EF }, 0x0FFF, 0x000FFF, 0x001000, { -1, -1 }, { 0x008000, 0x008003 }, { 0x008007, 0x008008 }, { -1, -1 }, 0x3F80, "p16lf1554.inc" , "16lf1554_g.lkr" , 0 },
{ PROC_CLASS_PIC14E , "__16LF1559" , { "pic16lf1559" , "p16lf1559" , "16lf1559" }, 0xA559, 4, 32, 0x0F80, { 0x70, 0x7F }, -1, { 0x2000, 0x21EF }, 0x0FFF, 0x001FFF, 0x002000, { -1, -1 }, { 0x008000, 0x008003 }, { 0x008007, 0x008008 }, { -1, -1 }, 0x3F80, "p16lf1559.inc" , "16lf1559_g.lkr" , 0 },
{ PROC_CLASS_PIC14E , "__16LF1566" , { "pic16lf1566" , "p16lf1566" , "16lf1566" }, 0xA566, 4, 32, 0x0F80, { 0x70, 0x7F }, -1, { 0x2000, 0x21EF }, 0x0FFF, 0x001FFF, 0x002000, { -1, -1 }, { 0x008000, 0x008003 }, { 0x008007, 0x008008 }, { -1, -1 }, 0x3F80, "p16lf1566.inc" , "16lf1566_g.lkr" , 0 },
{ PROC_CLASS_PIC14E , "__16LF1567" , { "pic16lf1567" , "p16lf1567" , "16lf1567" }, 0xA567, 4, 32, 0x0F80, { 0x70, 0x7F }, -1, { 0x2000, 0x21EF }, 0x0FFF, 0x001FFF, 0x002000, { -1, -1 }, { 0x008000, 0x008003 }, { 0x008007, 0x008008 }, { -1, -1 }, 0x3F80, "p16lf1567.inc" , "16lf1567_g.lkr" , 0 },
{ PROC_CLASS_PIC14E , "__16LF1574" , { "pic16lf1574" , "p16lf1574" , "16lf1574" }, 0xA574, 2, 32, 0x0F80, { 0x70, 0x7F }, -1, { 0x2000, 0x21EF }, 0x0FFF, 0x000FFF, 0x001000, { -1, -1 }, { 0x008000, 0x008003 }, { 0x008007, 0x008008 }, { -1, -1 }, 0x3F80, "p16lf1574.inc" , "16lf1574_g.lkr" , 0 },
{ PROC_CLASS_PIC14E , "__16LF1575" , { "pic16lf1575" , "p16lf1575" , "16lf1575" }, 0xA575, 4, 32, 0x0F80, { 0x70, 0x7F }, -1, { 0x2000, 0x23DF }, 0x0FFF, 0x001FFF, 0x002000, { -1, -1 }, { 0x008000, 0x008003 }, { 0x008007, 0x008008 }, { -1, -1 }, 0x3F80, "p16lf1575.inc" , "16lf1575_g.lkr" , 0 },
{ PROC_CLASS_PIC14E , "__16LF1578" , { "pic16lf1578" , "p16lf1578" , "16lf1578" }, 0xA578, 2, 32, 0x0F80, { 0x70, 0x7F }, -1, { 0x2000, 0x21EF }, 0x0FFF, 0x000FFF, 0x001000, { -1, -1 }, { 0x008000, 0x008003 }, { 0x008007, 0x008008 }, { -1, -1 }, 0x3F80, "p16lf1578.inc" , "16lf1578_g.lkr" , 0 },
{ PROC_CLASS_PIC14E , "__16LF1579" , { "pic16lf1579" , "p16lf1579" , "16lf1579" }, 0xA579, 4, 32, 0x0F80, { 0x70, 0x7F }, -1, { 0x2000, 0x23DF }, 0x0FFF, 0x001FFF, 0x002000, { -1, -1 }, { 0x008000, 0x008003 }, { 0x008007, 0x008008 }, { -1, -1 }, 0x3F80, "p16lf1579.inc" , "16lf1579_g.lkr" , 0 },
{ PROC_CLASS_PIC14E , "__16LF1613" , { "pic16lf1613" , "p16lf1613" , "16lf1613" }, 0xA613, 1, 32, 0x0F80, { 0x70, 0x7F }, -1, { 0x2000, 0x20EF }, 0x0FFF, 0x0007FF, 0x000800, { -1, -1 }, { 0x008000, 0x008003 }, { 0x008007, 0x008009 }, { -1, -1 }, 0x3F80, "p16lf1613.inc" , "16lf1613_g.lkr" , 0 },
{ PROC_CLASS_PIC14E , "__16LF1614" , { "pic16lf1614" , "p16lf1614" , "16lf1614" }, 0xA614, 2, 32, 0x0F80, { 0x70, 0x7F }, -1, { 0x2000, 0x21EF }, 0x0FFF, 0x000FFF, 0x001000, { -1, -1 }, { 0x008000, 0x008003 }, { 0x008007, 0x008009 }, { -1, -1 }, 0x3F80, "p16lf1614.inc" , "16lf1614_g.lkr" , 0 },
{ PROC_CLASS_PIC14E , "__16LF1615" , { "pic16lf1615" , "p16lf1615" , "16lf1615" }, 0xA615, 4, 32, 0x0F80, { 0x70, 0x7F }, -1, { 0x2000, 0x23DF }, 0x0FFF, 0x001FFF, 0x002000, { -1, -1 }, { 0x008000, 0x008003 }, { 0x008007, 0x008009 }, { -1, -1 }, 0x3F80, "p16lf1615.inc" , "16lf1615_g.lkr" , 0 },
{ PROC_CLASS_PIC14E , "__16LF1618" , { "pic16lf1618" , "p16lf1618" , "16lf1618" }, 0xA618, 2, 32, 0x0F80, { 0x70, 0x7F }, -1, { 0x2000, 0x21EF }, 0x0FFF, 0x000FFF, 0x001000, { -1, -1 }, { 0x008000, 0x008003 }, { 0x008007, 0x008009 }, { -1, -1 }, 0x3F80, "p16lf1618.inc" , "16lf1618_g.lkr" , 0 },
{ PROC_CLASS_PIC14E , "__16LF1619" , { "pic16lf1619" , "p16lf1619" , "16lf1619" }, 0xA619, 4, 32, 0x0F80, { 0x70, 0x7F }, -1, { 0x2000, 0x23DF }, 0x0FFF, 0x001FFF, 0x002000, { -1, -1 }, { 0x008000, 0x008003 }, { 0x008007, 0x008009 }, { -1, -1 }, 0x3F80, "p16lf1619.inc" , "16lf1619_g.lkr" , 0 },
{ PROC_CLASS_PIC14E , "__16LF1703" , { "pic16lf1703" , "p16lf1703" , "16lf1703" }, 0xA703, 1, 32, 0x0F80, { 0x70, 0x7F }, -1, { 0x2000, 0x20EF }, 0x0FFF, 0x0007FF, 0x000800, { -1, -1 }, { 0x008000, 0x008003 }, { 0x008007, 0x008008 }, { -1, -1 }, 0x3F80, "p16lf1703.inc" , "16lf1703_g.lkr" , 0 },
{ PROC_CLASS_PIC14E , "__16LF1704" , { "pic16lf1704" , "p16lf1704" , "16lf1704" }, 0xA704, 2, 32, 0x0F80, { 0x70, 0x7F }, -1, { 0x2000, 0x21EF }, 0x0FFF, 0x000FFF, 0x001000, { -1, -1 }, { 0x008000, 0x008003 }, { 0x008007, 0x008008 }, { -1, -1 }, 0x3F80, "p16lf1704.inc" , "16lf1704_g.lkr" , 0 },
{ PROC_CLASS_PIC14E , "__16LF1705" , { "pic16lf1705" , "p16lf1705" , "16lf1705" }, 0xA705, 4, 32, 0x0F80, { 0x70, 0x7F }, -1, { 0x2000, 0x23EF }, 0x0FFF, 0x001FFF, 0x002000, { -1, -1 }, { 0x008000, 0x008003 }, { 0x008007, 0x008008 }, { -1, -1 }, 0x3F80, "p16lf1705.inc" , "16lf1705_g.lkr" , 0 },
{ PROC_CLASS_PIC14E , "__16LF1707" , { "pic16lf1707" , "p16lf1707" , "16lf1707" }, 0xA707, 1, 32, 0x0F80, { 0x70, 0x7F }, -1, { 0x2000, 0x20EF }, 0x0FFF, 0x0007FF, 0x000800, { -1, -1 }, { 0x008000, 0x008003 }, { 0x008007, 0x008008 }, { -1, -1 }, 0x3F80, "p16lf1707.inc" , "16lf1707_g.lkr" , 0 },
{ PROC_CLASS_PIC14E , "__16LF1708" , { "pic16lf1708" , "p16lf1708" , "16lf1708" }, 0xA708, 2, 32, 0x0F80, { 0x70, 0x7F }, -1, { 0x2000, 0x21EF }, 0x0FFF, 0x000FFF, 0x001000, { -1, -1 }, { 0x008000, 0x008003 }, { 0x008007, 0x008008 }, { -1, -1 }, 0x3F80, "p16lf1708.inc" , "16lf1708_g.lkr" , 0 },
{ PROC_CLASS_PIC14E , "__16LF1709" , { "pic16lf1709" , "p16lf1709" , "16lf1709" }, 0xA709, 4, 32, 0x0F80, { 0x70, 0x7F }, -1, { 0x2000, 0x23EF }, 0x0FFF, 0x001FFF, 0x002000, { -1, -1 }, { 0x008000, 0x008003 }, { 0x008007, 0x008008 }, { -1, -1 }, 0x3F80, "p16lf1709.inc" , "16lf1709_g.lkr" , 0 },
{ PROC_CLASS_PIC14E , "__16LF1713" , { "pic16lf1713" , "p16lf1713" , "16lf1713" }, 0xA713, 2, 32, 0x0F80, { 0x70, 0x7F }, -1, { 0x2000, 0x21EF }, 0x0FFF, 0x000FFF, 0x001000, { -1, -1 }, { 0x008000, 0x008003 }, { 0x008007, 0x008008 }, { -1, -1 }, 0x3F80, "p16lf1713.inc" , "16lf1713_g.lkr" , 0 },
{ PROC_CLASS_PIC14E , "__16LF1716" , { "pic16lf1716" , "p16lf1716" , "16lf1716" }, 0xB716, 4, 32, 0x0F80, { 0x70, 0x7F }, -1, { 0x2000, 0x23EF }, 0x0FFF, 0x001FFF, 0x002000, { -1, -1 }, { 0x008000, 0x008003 }, { 0x008007, 0x008008 }, { -1, -1 }, 0x3F80, "p16lf1716.inc" , "16lf1716_g.lkr" , 0 },
{ PROC_CLASS_PIC14E , "__16LF1717" , { "pic16lf1717" , "p16lf1717" , "16lf1717" }, 0xA717, 4, 32, 0x0F80, { 0x70, 0x7F }, -1, { 0x2000, 0x23EF }, 0x0FFF, 0x001FFF, 0x002000, { -1, -1 }, { 0x008000, 0x008003 }, { 0x008007, 0x008008 }, { -1, -1 }, 0x3F80, "p16lf1717.inc" , "16lf1717_g.lkr" , 0 },
{ PROC_CLASS_PIC14E , "__16LF1718" , { "pic16lf1718" , "p16lf1718" , "16lf1718" }, 0xA718, 8, 32, 0x0F80, { 0x70, 0x7F }, -1, { 0x2000, 0x27EF }, 0x0FFF, 0x003FFF, 0x004000, { -1, -1 }, { 0x008000, 0x008003 }, { 0x008007, 0x008008 }, { -1, -1 }, 0x3F80, "p16lf1718.inc" , "16lf1718_g.lkr" , 0 },
{ PROC_CLASS_PIC14E , "__16LF1719" , { "pic16lf1719" , "p16lf1719" , "16lf1719" }, 0xA719, 8, 32, 0x0F80, { 0x70, 0x7F }, -1, { 0x2000, 0x27EF }, 0x0FFF, 0x003FFF, 0x004000, { -1, -1 }, { 0x008000, 0x008003 }, { 0x008007, 0x008008 }, { -1, -1 }, 0x3F80, "p16lf1719.inc" , "16lf1719_g.lkr" , 0 },
{ PROC_CLASS_PIC14E , "__16LF1764" , { "pic16lf1764" , "p16lf1764" , "16lf1764" }, 0xA764, 2, 32, 0x0F80, { 0x70, 0x7F }, -1, { 0x2000, 0x21EF }, 0x0FFF, 0x000FFF, 0x001000, { -1, -1 }, { 0x008000, 0x008003 }, { 0x008007, 0x008008 }, { -1, -1 }, 0x3F80, "p16lf1764.inc" , "16lf1764_g.lkr" , 0 },
{ PROC_CLASS_PIC14E , "__16LF1765" , { "pic16lf1765" , "p16lf1765" , "16lf1765" }, 0xA765, 4, 32, 0x0F80, { 0x70, 0x7F }, -1, { 0x2000, 0x23AF }, 0x0FFF, 0x001FFF, 0x002000, { -1, -1 }, { 0x008000, 0x008003 }, { 0x008007, 0x008008 }, { -1, -1 }, 0x3F80, "p16lf1765.inc" , "16lf1765_g.lkr" , 0 },
{ PROC_CLASS_PIC14E , "__16LF1768" , { "pic16lf1768" , "p16lf1768" , "16lf1768" }, 0xA768, 2, 32, 0x0F80, { 0x70, 0x7F }, -1, { 0x2000, 0x21EF }, 0x0FFF, 0x000FFF, 0x001000, { -1, -1 }, { 0x008000, 0x008003 }, { 0x008007, 0x008008 }, { -1, -1 }, 0x3F80, "p16lf1768.inc" , "16lf1768_g.lkr" , 0 },
{ PROC_CLASS_PIC14E , "__16LF1769" , { "pic16lf1769" , "p16lf1769" , "16lf1769" }, 0xA769, 4, 32, 0x0F80, { 0x70, 0x7F }, -1, { 0x2000, 0x23EF }, 0x0FFF, 0x001FFF, 0x002000, { -1, -1 }, { 0x008000, 0x008003 }, { 0x008007, 0x008008 }, { -1, -1 }, 0x3F80, "p16lf1769.inc" , "16lf1769_g.lkr" , 0 },
{ PROC_CLASS_PIC14E , "__16LF1773" , { "pic16lf1773" , "p16lf1773" , "16lf1773" }, 0xA773, 2, 32, 0x0F80, { 0x70, 0x7F }, -1, { 0x2000, 0x21EF }, 0x0FFF, 0x000FFF, 0x001000, { -1, -1 }, { 0x008000, 0x008003 }, { 0x008007, 0x008008 }, { -1, -1 }, 0x3F80, "p16lf1773.inc" , "16lf1773_g.lkr" , 0 },
{ PROC_CLASS_PIC14E , "__16LF1776" , { "pic16lf1776" , "p16lf1776" , "16lf1776" }, 0xA776, 4, 32, 0x0F80, { 0x70, 0x7F }, -1, { 0x2000, 0x23EF }, 0x0FFF, 0x001FFF, 0x002000, { -1, -1 }, { 0x008000, 0x008003 }, { 0x008007, 0x008008 }, { -1, -1 }, 0x3F80, "p16lf1776.inc" , "16lf1776_g.lkr" , 0 },
{ PROC_CLASS_PIC14E , "__16LF1777" , { "pic16lf1777" , "p16lf1777" , "16lf1777" }, 0xA26D, 4, 32, 0x0F80, { 0x70, 0x7F }, -1, { 0x2000, 0x23EF }, 0x0FFF, 0x001FFF, 0x002000, { -1, -1 }, { 0x008000, 0x008003 }, { 0x008007, 0x008008 }, { -1, -1 }, 0x3F80, "p16lf1777.inc" , "16lf1777_g.lkr" , 0 },
{ PROC_CLASS_PIC14E , "__16LF1778" , { "pic16lf1778" , "p16lf1778" , "16lf1778" }, 0xA778, 8, 32, 0x0F80, { 0x70, 0x7F }, -1, { 0x2000, 0x27CF }, 0x0FFF, 0x003FFF, 0x004000, { -1, -1 }, { 0x008000, 0x008003 }, { 0x008007, 0x008008 }, { -1, -1 }, 0x3F80, "p16lf1778.inc" , "16lf1778_g.lkr" , 0 },
{ PROC_CLASS_PIC14E , "__16LF1779" , { "pic16lf1779" , "p16lf1779" , "16lf1779" }, 0xA779, 8, 32, 0x0F80, { 0x70, 0x7F }, -1, { 0x2000, 0x27EF }, 0x0FFF, 0x003FFF, 0x004000, { -1, -1 }, { 0x008000, 0x008003 }, { 0x008007, 0x008008 }, { -1, -1 }, 0x3F80, "p16lf1779.inc" , "16lf1779_g.lkr" , 0 },
{ PROC_CLASS_PIC14E , "__16LF1782" , { "pic16lf1782" , "p16lf1782" , "16lf1782" }, 0xA782, 1, 32, 0x0F80, { 0x70, 0x7F }, -1, { 0x2000, 0x20EF }, 0x0FFF, 0x00F0FF, 0x000800, { 0x000800, 0x00EFFF }, { 0x008000, 0x008003 }, { 0x008007, 0x008008 }, { 0x00F000, 0x00F0FF }, 0x3F80, "p16lf1782.inc" , "16lf1782_g.lkr" , 0 },
{ PROC_CLASS_PIC14E , "__16LF1783" , { "pic16lf1783" , "p16lf1783" , "16lf1783" }, 0xA783, 2, 32, 0x0F80, { 0x70, 0x7F }, -1, { 0x2000, 0x21EF }, 0x0FFF, 0x00F0FF, 0x001000, { 0x001000, 0x00EFFF }, { 0x008000, 0x008003 }, { 0x008007, 0x008008 }, { 0x00F000, 0x00F0FF }, 0x3F80, "p16lf1783.inc" , "16lf1783_g.lkr" , 0 },
{ PROC_CLASS_PIC14E , "__16LF1784" , { "pic16lf1784" , "p16lf1784" , "16lf1784" }, 0xA784, 2, 32, 0x0F80, { 0x70, 0x7F }, -1, { 0x2000, 0x21EF }, 0x0FFF, 0x00F0FF, 0x001000, { 0x001000, 0x00EFFF }, { 0x008000, 0x008003 }, { 0x008007, 0x008008 }, { 0x00F000, 0x00F0FF }, 0x3F80, "p16lf1784.inc" , "16lf1784_g.lkr" , 0 },
{ PROC_CLASS_PIC14E , "__16LF1786" , { "pic16lf1786" , "p16lf1786" , "16lf1786" }, 0xA786, 4, 32, 0x0F80, { 0x70, 0x7F }, -1, { 0x2000, 0x23EF }, 0x0FFF, 0x00F0FF, 0x002000, { 0x002000, 0x00EFFF }, { 0x008000, 0x008003 }, { 0x008007, 0x008008 }, { 0x00F000, 0x00F0FF }, 0x3F80, "p16lf1786.inc" , "16lf1786_g.lkr" , 0 },
{ PROC_CLASS_PIC14E , "__16LF1787" , { "pic16lf1787" , "p16lf1787" , "16lf1787" }, 0xA787, 4, 32, 0x0F80, { 0x70, 0x7F }, -1, { 0x2000, 0x23EF }, 0x0FFF, 0x00F0FF, 0x002000, { 0x002000, 0x00EFFF }, { 0x008000, 0x008003 }, { 0x008007, 0x008008 }, { 0x00F000, 0x00F0FF }, 0x3F80, "p16lf1787.inc" , "16lf1787_g.lkr" , 0 },
{ PROC_CLASS_PIC14E , "__16LF1788" , { "pic16lf1788" , "p16lf1788" , "16lf1788" }, 0xA788, 8, 32, 0x0F80, { 0x70, 0x7F }, -1, { 0x2000, 0x27EF }, 0x0FFF, 0x00F0FF, 0x004000, { 0x004000, 0x00EFFF }, { 0x008000, 0x008003 }, { 0x008007, 0x008008 }, { 0x00F000, 0x00F0FF }, 0x3F80, "p16lf1788.inc" , "16lf1788_g.lkr" , 0 },
{ PROC_CLASS_PIC14E , "__16LF1789" , { "pic16lf1789" , "p16lf1789" , "16lf1789" }, 0xA789, 8, 32, 0x0F80, { 0x70, 0x7F }, -1, { 0x2000, 0x27EF }, 0x0FFF, 0x00F0FF, 0x004000, { 0x004000, 0x00EFFF }, { 0x008000, 0x008003 }, { 0x008007, 0x008008 }, { 0x00F000, 0x00F0FF }, 0x3F80, "p16lf1789.inc" , "16lf1789_g.lkr" , 0 },
{ PROC_CLASS_PIC14E , "__16LF1823" , { "pic16lf1823" , "p16lf1823" , "16lf1823" }, 0xA823, 1, 32, 0x0F80, { 0x70, 0x7F }, -1, { 0x2000, 0x206F }, 0x0FFF, 0x00F0FF, 0x000800, { 0x000800, 0x00EFFF }, { 0x008000, 0x008003 }, { 0x008007, 0x008008 }, { 0x00F000, 0x00F0FF }, 0x3F80, "p16lf1823.inc" , "16lf1823_g.lkr" , 0 },
{ PROC_CLASS_PIC14E , "__16LF1824" , { "pic16lf1824" , "p16lf1824" , "16lf1824" }, 0xA824, 2, 32, 0x0F80, { 0x70, 0x7F }, -1, { 0x2000, 0x20EF }, 0x0FFF, 0x00F0FF, 0x001000, { 0x001000, 0x00EFFF }, { 0x008000, 0x008003 }, { 0x008007, 0x008008 }, { 0x00F000, 0x00F0FF }, 0x3F80, "p16lf1824.inc" , "16lf1824_g.lkr" , 0 },
{ PROC_CLASS_PIC14E , "__16LF1824T39A", { "pic16lf1824t39a", "p16lf1824t39a" , "16lf1824t39a" }, 0xC824, 2, 32, 0x0F80, { 0x70, 0x7F }, -1, { 0x2000, 0x20EF }, 0x0FFF, 0x00F0FF, 0x001000, { 0x001000, 0x00EFFF }, { 0x008000, 0x008003 }, { 0x008007, 0x008008 }, { 0x00F000, 0x00F0FF }, 0x3F80, "p16lf1824t39a.inc", "16lf1824t39a_g.lkr", 0 },
{ PROC_CLASS_PIC14E , "__16LF1825" , { "pic16lf1825" , "p16lf1825" , "16lf1825" }, 0xA825, 4, 32, 0x0F80, { 0x70, 0x7F }, -1, { 0x2000, 0x23EF }, 0x0FFF, 0x00F0FF, 0x002000, { 0x002000, 0x00EFFF }, { 0x008000, 0x008003 }, { 0x008007, 0x008008 }, { 0x00F000, 0x00F0FF }, 0x3F80, "p16lf1825.inc" , "16lf1825_g.lkr" , 0 },
{ PROC_CLASS_PIC14E , "__16LF1826" , { "pic16lf1826" , "p16lf1826" , "16lf1826" }, 0xA826, 1, 32, 0x0F80, { 0x70, 0x7F }, -1, { 0x2000, 0x20EF }, 0x0FFF, 0x00F0FF, 0x000800, { 0x000800, 0x00EFFF }, { 0x008000, 0x008003 }, { 0x008007, 0x008008 }, { 0x00F000, 0x00F0FF }, 0x3F80, "p16lf1826.inc" , "16lf1826_g.lkr" , 0 },
{ PROC_CLASS_PIC14E , "__16LF1827" , { "pic16lf1827" , "p16lf1827" , "16lf1827" }, 0xA827, 2, 32, 0x0F80, { 0x70, 0x7F }, -1, { 0x2000, 0x216F }, 0x0FFF, 0x00F0FF, 0x001000, { 0x001000, 0x00EFFF }, { 0x008000, 0x008003 }, { 0x008007, 0x008008 }, { 0x00F000, 0x00F0FF }, 0x3F80, "p16lf1827.inc" , "16lf1827_g.lkr" , 0 },
{ PROC_CLASS_PIC14E , "__16LF1828" , { "pic16lf1828" , "p16lf1828" , "16lf1828" }, 0xA828, 2, 32, 0x0F80, { 0x70, 0x7F }, -1, { 0x2000, 0x20EF }, 0x0FFF, 0x00F0FF, 0x001000, { 0x001000, 0x00EFFF }, { 0x008000, 0x008003 }, { 0x008007, 0x008008 }, { 0x00F000, 0x00F0FF }, 0x3F80, "p16lf1828.inc" , "16lf1828_g.lkr" , 0 },
{ PROC_CLASS_PIC14E , "__16LF1829" , { "pic16lf1829" , "p16lf1829" , "16lf1829" }, 0xA829, 4, 32, 0x0F80, { 0x70, 0x7F }, -1, { 0x2000, 0x23EF }, 0x0FFF, 0x00F0FF, 0x002000, { 0x002000, 0x00EFFF }, { 0x008000, 0x008003 }, { 0x008007, 0x008008 }, { 0x00F000, 0x00F0FF }, 0x3F80, "p16lf1829.inc" , "16lf1829_g.lkr" , 0 },
{ PROC_CLASS_PIC14E , "__16LF1847" , { "pic16lf1847" , "p16lf1847" , "16lf1847" }, 0xA847, 4, 32, 0x0F80, { 0x70, 0x7F }, -1, { 0x2000, 0x23EF }, 0x0FFF, 0x00F0FF, 0x002000, { 0x002000, 0x00EFFF }, { 0x008000, 0x008003 }, { 0x008007, 0x008008 }, { 0x00F000, 0x00F0FF }, 0x3F80, "p16lf1847.inc" , "16lf1847_g.lkr" , 0 },
{ PROC_CLASS_PIC14E , "__16LF1902" , { "pic16lf1902" , "p16lf1902" , "16lf1902" }, 0xA902, 1, 32, 0x0F80, { 0x70, 0x7F }, -1, { 0x2000, 0x206F }, 0x0FFF, 0x0007FF, 0x000800, { -1, -1 }, { 0x008000, 0x008003 }, { 0x008007, 0x008008 }, { -1, -1 }, 0x3F80, "p16lf1902.inc" , "16lf1902_g.lkr" , 0 },
{ PROC_CLASS_PIC14E , "__16LF1903" , { "pic16lf1903" , "p16lf1903" , "16lf1903" }, 0xA903, 2, 32, 0x0F80, { 0x70, 0x7F }, -1, { 0x2000, 0x20EF }, 0x0FFF, 0x000FFF, 0x001000, { -1, -1 }, { 0x008000, 0x008003 }, { 0x008007, 0x008008 }, { -1, -1 }, 0x3F80, "p16lf1903.inc" , "16lf1903_g.lkr" , 0 },
{ PROC_CLASS_PIC14E , "__16LF1904" , { "pic16lf1904" , "p16lf1904" , "16lf1904" }, 0xA904, 2, 32, 0x0F80, { 0x70, 0x7F }, -1, { 0x2000, 0x20EF }, 0x0FFF, 0x000FFF, 0x001000, { -1, -1 }, { 0x008000, 0x008003 }, { 0x008007, 0x008008 }, { -1, -1 }, 0x3F80, "p16lf1904.inc" , "16lf1904_g.lkr" , 0 },
{ PROC_CLASS_PIC14E , "__16LF1906" , { "pic16lf1906" , "p16lf1906" , "16lf1906" }, 0xA906, 4, 32, 0x0F80, { 0x70, 0x7F }, -1, { 0x2000, 0x21EF }, 0x0FFF, 0x001FFF, 0x002000, { -1, -1 }, { 0x008000, 0x008003 }, { 0x008007, 0x008008 }, { -1, -1 }, 0x3F80, "p16lf1906.inc" , "16lf1906_g.lkr" , 0 },
{ PROC_CLASS_PIC14E , "__16LF1907" , { "pic16lf1907" , "p16lf1907" , "16lf1907" }, 0xA907, 4, 32, 0x0F80, { 0x70, 0x7F }, -1, { 0x2000, 0x21EF }, 0x0FFF, 0x001FFF, 0x002000, { -1, -1 }, { 0x008000, 0x008003 }, { 0x008007, 0x008008 }, { -1, -1 }, 0x3F80, "p16lf1907.inc" , "16lf1907_g.lkr" , 0 },
{ PROC_CLASS_PIC14E , "__16LF1933" , { "pic16lf1933" , "p16lf1933" , "16lf1933" }, 0xA933, 2, 32, 0x0F80, { 0x70, 0x7F }, -1, { 0x2000, 0x20EF }, 0x0FFF, 0x00F0FF, 0x001000, { 0x001000, 0x00EFFF }, { 0x008000, 0x008003 }, { 0x008007, 0x008008 }, { 0x00F000, 0x00F0FF }, 0x3F80, "p16lf1933.inc" , "16lf1933_g.lkr" , 0 },
{ PROC_CLASS_PIC14E , "__16LF1934" , { "pic16lf1934" , "p16lf1934" , "16lf1934" }, 0xA934, 2, 32, 0x0F80, { 0x70, 0x7F }, -1, { 0x2000, 0x20EF }, 0x0FFF, 0x00F0FF, 0x001000, { 0x001000, 0x00EFFF }, { 0x008000, 0x008003 }, { 0x008007, 0x008008 }, { 0x00F000, 0x00F0FF }, 0x3F80, "p16lf1934.inc" , "16lf1934_g.lkr" , 0 },
{ PROC_CLASS_PIC14E , "__16LF1936" , { "pic16lf1936" , "p16lf1936" , "16lf1936" }, 0xA936, 4, 32, 0x0F80, { 0x70, 0x7F }, -1, { 0x2000, 0x21EF }, 0x0FFF, 0x00F0FF, 0x002000, { 0x002000, 0x00EFFF }, { 0x008000, 0x008003 }, { 0x008007, 0x008008 }, { 0x00F000, 0x00F0FF }, 0x3F80, "p16lf1936.inc" , "16lf1936_g.lkr" , 0 },
{ PROC_CLASS_PIC14E , "__16LF1937" , { "pic16lf1937" , "p16lf1937" , "16lf1937" }, 0xA937, 4, 32, 0x0F80, { 0x70, 0x7F }, -1, { 0x2000, 0x21EF }, 0x0FFF, 0x00F0FF, 0x002000, { 0x002000, 0x00EFFF }, { 0x008000, 0x008003 }, { 0x008007, 0x008008 }, { 0x00F000, 0x00F0FF }, 0x3F80, "p16lf1937.inc" , "16lf1937_g.lkr" , 0 },
{ PROC_CLASS_PIC14E , "__16LF1938" , { "pic16lf1938" , "p16lf1938" , "16lf1938" }, 0xA938, 8, 32, 0x0F80, { 0x70, 0x7F }, -1, { 0x2000, 0x23EF }, 0x0FFF, 0x00F0FF, 0x004000, { 0x004000, 0x00EFFF }, { 0x008000, 0x008003 }, { 0x008007, 0x008008 }, { 0x00F000, 0x00F0FF }, 0x3F80, "p16lf1938.inc" , "16lf1938_g.lkr" , 0 },
{ PROC_CLASS_PIC14E , "__16LF1939" , { "pic16lf1939" , "p16lf1939" , "16lf1939" }, 0xA939, 8, 32, 0x0F80, { 0x70, 0x7F }, -1, { 0x2000, 0x23EF }, 0x0FFF, 0x00F0FF, 0x004000, { 0x004000, 0x00EFFF }, { 0x008000, 0x008003 }, { 0x008007, 0x008008 }, { 0x00F000, 0x00F0FF }, 0x3F80, "p16lf1939.inc" , "16lf1939_g.lkr" , 0 },
{ PROC_CLASS_PIC14E , "__16LF1946" , { "pic16lf1946" , "p16lf1946" , "16lf1946" }, 0xA946, 4, 32, 0x0F80, { 0x70, 0x7F }, -1, { 0x2000, 0x21EF }, 0x0FFF, 0x00F0FF, 0x002000, { 0x002000, 0x00EFFF }, { 0x008000, 0x008003 }, { 0x008007, 0x008008 }, { 0x00F000, 0x00F0FF }, 0x3F80, "p16lf1946.inc" , "16lf1946_g.lkr" , 0 },
{ PROC_CLASS_PIC14E , "__16LF1947" , { "pic16lf1947" , "p16lf1947" , "16lf1947" }, 0xA947, 8, 32, 0x0F80, { 0x70, 0x7F }, -1, { 0x2000, 0x23EF }, 0x0FFF, 0x00F0FF, 0x004000, { 0x004000, 0x00EFFF }, { 0x008000, 0x008003 }, { 0x008007, 0x008008 }, { 0x00F000, 0x00F0FF }, 0x3F80, "p16lf1947.inc" , "16lf1947_g.lkr" , 0 },
{ PROC_CLASS_PIC14EX , "__16LF15324" , { "pic16lf15324" , "p16lf15324" , "16lf15324" }, 0xA2AC, 2, 64, 0x1F80, { 0x70, 0x7F }, -1, { 0x2000, 0x21EF }, 0x1FFF, 0x000FFF, 0x001000, { -1, -1 }, { 0x008000, 0x008003 }, { 0x008007, 0x00800B }, { -1, -1 }, 0x3F80, "p16lf15324.inc" , "16lf15324_g.lkr" , CPU_NO_OPTION_INSN },
{ PROC_CLASS_PIC14EX , "__16LF15325" , { "pic16lf15325" , "p16lf15325" , "16lf15325" }, 0xA2A0, 4, 64, 0x1F80, { 0x70, 0x7F }, -1, { 0x2000, 0x23EF }, 0x1FFF, 0x001FFF, 0x002000, { -1, -1 }, { 0x008000, 0x008003 }, { 0x008007, 0x00800B }, { -1, -1 }, 0x3F80, "p16lf15325.inc" , "16lf15325_g.lkr" , CPU_NO_OPTION_INSN },
{ PROC_CLASS_PIC14EX , "__16LF15344" , { "pic16lf15344" , "p16lf15344" , "16lf15344" }, 0xA2AD, 2, 64, 0x1F80, { 0x70, 0x7F }, -1, { 0x2000, 0x21EF }, 0x1FFF, 0x000FFF, 0x001000, { -1, -1 }, { 0x008000, 0x008003 }, { 0x008007, 0x00800B }, { -1, -1 }, 0x3F80, "p16lf15344.inc" , "16lf15344_g.lkr" , CPU_NO_OPTION_INSN },
{ PROC_CLASS_PIC14EX , "__16LF15345" , { "pic16lf15345" , "p16lf15345" , "16lf15345" }, 0xA2A1, 4, 64, 0x1F80, { 0x70, 0x7F }, -1, { 0x2000, 0x23EF }, 0x1FFF, 0x001FFF, 0x002000, { -1, -1 }, { 0x008000, 0x008003 }, { 0x008007, 0x00800B }, { -1, -1 }, 0x3F80, "p16lf15345.inc" , "16lf15345_g.lkr" , CPU_NO_OPTION_INSN },
{ PROC_CLASS_PIC14EX , "__16LF15354" , { "pic16lf15354" , "p16lf15354" , "16lf15354" }, 0xA282, 2, 64, 0x1F80, { 0x70, 0x7F }, -1, { 0x2000, 0x23EF }, 0x1FFF, 0x000FFF, 0x001000, { -1, -1 }, { 0x008000, 0x008003 }, { 0x008007, 0x00800B }, { -1, -1 }, 0x3F80, "p16lf15354.inc" , "16lf15354_g.lkr" , CPU_NO_OPTION_INSN },
{ PROC_CLASS_PIC14EX , "__16LF15355" , { "pic16lf15355" , "p16lf15355" , "16lf15355" }, 0xA281, 4, 64, 0x1F80, { 0x70, 0x7F }, -1, { 0x2000, 0x25EF }, 0x1FFF, 0x001FFF, 0x002000, { -1, -1 }, { 0x008000, 0x008003 }, { 0x008007, 0x00800B }, { -1, -1 }, 0x3F80, "p16lf15355.inc" , "16lf15355_g.lkr" , CPU_NO_OPTION_INSN },
{ PROC_CLASS_PIC14EX , "__16LF15356" , { "pic16lf15356" , "p16lf15356" , "16lf15356" }, 0xA291, 8, 64, 0x1F80, { 0x70, 0x7F }, -1, { 0x2000, 0x27EF }, 0x1FFF, 0x003FFF, 0x004000, { -1, -1 }, { 0x008000, 0x008003 }, { 0x008007, 0x00800B }, { -1, -1 }, 0x3F80, "p16lf15356.inc" , "16lf15356_g.lkr" , CPU_NO_OPTION_INSN },
{ PROC_CLASS_PIC14EX , "__16LF15375" , { "pic16lf15375" , "p16lf15375" , "16lf15375" }, 0xA293, 4, 64, 0x1F80, { 0x70, 0x7F }, -1, { 0x2000, 0x23EF }, 0x1FFF, 0x001FFF, 0x002000, { -1, -1 }, { 0x008000, 0x008003 }, { 0x008007, 0x00800B }, { -1, -1 }, 0x3F80, "p16lf15375.inc" , "16lf15375_g.lkr" , CPU_NO_OPTION_INSN },
{ PROC_CLASS_PIC14EX , "__16LF15376" , { "pic16lf15376" , "p16lf15376" , "16lf15376" }, 0xA295, 8, 64, 0x1F80, { 0x70, 0x7F }, -1, { 0x2000, 0x27EF }, 0x1FFF, 0x003FFF, 0x004000, { -1, -1 }, { 0x008000, 0x008003 }, { 0x008007, 0x00800B }, { -1, -1 }, 0x3F80, "p16lf15376.inc" , "16lf15376_g.lkr" , CPU_NO_OPTION_INSN },
{ PROC_CLASS_PIC14EX , "__16LF15385" , { "pic16lf15385" , "p16lf15385" , "16lf15385" }, 0xA297, 4, 64, 0x1F80, { 0x70, 0x7F }, -1, { 0x2000, 0x23EF }, 0x1FFF, 0x001FFF, 0x002000, { -1, -1 }, { 0x008000, 0x008003 }, { 0x008007, 0x00800B }, { -1, -1 }, 0x3F80, "p16lf15385.inc" , "16lf15385_g.lkr" , CPU_NO_OPTION_INSN },
{ PROC_CLASS_PIC14EX , "__16LF15386" , { "pic16lf15386" , "p16lf15386" , "16lf15386" }, 0xA299, 8, 64, 0x1F80, { 0x70, 0x7F }, -1, { 0x2000, 0x27EF }, 0x1FFF, 0x003FFF, 0x004000, { -1, -1 }, { 0x008000, 0x008003 }, { 0x008007, 0x00800B }, { -1, -1 }, 0x3F80, "p16lf15386.inc" , "16lf15386_g.lkr" , CPU_NO_OPTION_INSN },
{ PROC_CLASS_PIC14E , "__16LF18313" , { "pic16lf18313" , "p16lf18313" , "16lf18313" }, 0xA832, 1, 32, 0x0F80, { 0x70, 0x7F }, -1, { 0x2000, 0x20EF }, 0x0FFF, 0x00F0FF, 0x000800, { 0x000800, 0x00EFFF }, { 0x008000, 0x008003 }, { 0x008007, 0x00800A }, { 0x00F000, 0x00F0FF }, 0x3F80, "p16lf18313.inc" , "16lf18313_g.lkr" , CPU_NO_OPTION_INSN },
{ PROC_CLASS_PIC14E , "__16LF18323" , { "pic16lf18323" , "p16lf18323" , "16lf18323" }, 0xA833, 1, 32, 0x0F80, { 0x70, 0x7F }, -1, { 0x2000, 0x20EF }, 0x0FFF, 0x00F0FF, 0x000800, { 0x000800, 0x00EFFF }, { 0x008000, 0x008003 }, { 0x008007, 0x00800A }, { 0x00F000, 0x00F0FF }, 0x3F80, "p16lf18323.inc" , "16lf18323_g.lkr" , CPU_NO_OPTION_INSN },
{ PROC_CLASS_PIC14E , "__16LF18324" , { "pic16lf18324" , "p16lf18324" , "16lf18324" }, 0xA324, 2, 32, 0x0F80, { 0x70, 0x7F }, -1, { 0x2000, 0x21EF }, 0x0FFF, 0x00F0FF, 0x001000, { 0x001000, 0x00EFFF }, { 0x008000, 0x008003 }, { 0x008007, 0x00800A }, { 0x00F000, 0x00F0FF }, 0x3F80, "p16lf18324.inc" , "16lf18324_g.lkr" , CPU_NO_OPTION_INSN },
{ PROC_CLASS_PIC14E , "__16LF18325" , { "pic16lf18325" , "p16lf18325" , "16lf18325" }, 0xA325, 4, 32, 0x0F80, { 0x70, 0x7F }, -1, { 0x2000, 0x23EF }, 0x0FFF, 0x00F0FF, 0x002000, { 0x002000, 0x00EFFF }, { 0x008000, 0x008003 }, { 0x008007, 0x00800A }, { 0x00F000, 0x00F0FF }, 0x3F80, "p16lf18325.inc" , "16lf18325_g.lkr" , CPU_NO_OPTION_INSN },
{ PROC_CLASS_PIC14E , "__16LF18326" , { "pic16lf18326" , "p16lf18326" , "16lf18326" }, 0xA274, 8, 32, 0x0F80, { 0x70, 0x7F }, -1, { 0x2000, 0x23EF }, 0x0FFF, 0x00F0FF, 0x004000, { 0x004000, 0x00EFFF }, { 0x008000, 0x008003 }, { 0x008007, 0x00800A }, { 0x00F000, 0x00F0FF }, 0x3F80, "p16lf18326.inc" , "16lf18326_g.lkr" , 0 },
{ PROC_CLASS_PIC14E , "__16LF18344" , { "pic16lf18344" , "p16lf18344" , "16lf18344" }, 0xA344, 2, 32, 0x0F80, { 0x70, 0x7F }, -1, { 0x2000, 0x21EF }, 0x0FFF, 0x00F0FF, 0x001000, { 0x001000, 0x00EFFF }, { 0x008000, 0x008003 }, { 0x008007, 0x00800A }, { 0x00F000, 0x00F0FF }, 0x3F80, "p16lf18344.inc" , "16lf18344_g.lkr" , CPU_NO_OPTION_INSN },
{ PROC_CLASS_PIC14E , "__16LF18345" , { "pic16lf18345" , "p16lf18345" , "16lf18345" }, 0xA345, 4, 32, 0x0F80, { 0x70, 0x7F }, -1, { 0x2000, 0x23EF }, 0x0FFF, 0x00F0FF, 0x002000, { 0x002000, 0x00EFFF }, { 0x008000, 0x008003 }, { 0x008007, 0x00800A }, { 0x00F000, 0x00F0FF }, 0x3F80, "p16lf18345.inc" , "16lf18345_g.lkr" , CPU_NO_OPTION_INSN },
{ PROC_CLASS_PIC14E , "__16LF18346" , { "pic16lf18346" , "p16lf18346" , "16lf18346" }, 0xA275, 8, 32, 0x0F80, { 0x70, 0x7F }, -1, { 0x2000, 0x23EF }, 0x0FFF, 0x00F0FF, 0x004000, { 0x004000, 0x00EFFF }, { 0x008000, 0x008003 }, { 0x008007, 0x00800A }, { 0x00F000, 0x00F0FF }, 0x3F80, "p16lf18346.inc" , "16lf18346_g.lkr" , 0 },
{ PROC_CLASS_PIC14E , "__16LF18854" , { "pic16lf18854" , "p16lf18854" , "16lf18854" }, 0xA854, 2, 32, 0x0F80, { 0x70, 0x7F }, -1, { 0x2000, 0x21EF }, 0x0FFF, 0x00F0FF, 0x001000, { 0x001000, 0x00EFFF }, { 0x008000, 0x008003 }, { 0x008007, 0x00800B }, { 0x00F000, 0x00F0FF }, 0x3F80, "p16lf18854.inc" , "16lf18854_g.lkr" , 0 },
{ PROC_CLASS_PIC14E , "__16LF18855" , { "pic16lf18855" , "p16lf18855" , "16lf18855" }, 0xA855, 4, 32, 0x0F80, { 0x70, 0x7F }, -1, { 0x2000, 0x23EF }, 0x0FFF, 0x00F0FF, 0x002000, { 0x002000, 0x00EFFF }, { 0x008000, 0x008003 }, { 0x008007, 0x00800B }, { 0x00F000, 0x00F0FF }, 0x3F80, "p16lf18855.inc" , "16lf18855_g.lkr" , 0 },
{ PROC_CLASS_PIC14E , "__16LF18856" , { "pic16lf18856" , "p16lf18856" , "16lf18856" }, 0xA856, 8, 32, 0x0F80, { 0x70, 0x7F }, -1, { 0x2000, 0x27EF }, 0x0FFF, 0x00F0FF, 0x004000, { 0x004000, 0x00EFFF }, { 0x008000, 0x008003 }, { 0x008007, 0x00800B }, { 0x00F000, 0x00F0FF }, 0x3F80, "p16lf18856.inc" , "16lf18856_g.lkr" , 0 },
{ PROC_CLASS_PIC14EX , "__16LF18857" , { "pic16lf18857" , "p16lf18857" , "16lf18857" }, 0xA857, 16, 64, 0x1F80, { 0x70, 0x7F }, -1, { 0x2000, 0x31CF }, 0x1FFF, 0x00F0FF, 0x008000, { 0x008000, 0x00EFFF }, { 0x008000, 0x008003 }, { 0x008007, 0x00800B }, { 0x00F000, 0x00F0FF }, 0x3F80, "p16lf18857.inc" , "16lf18857_g.lkr" , 0 },
{ PROC_CLASS_PIC14E , "__16LF18875" , { "pic16lf18875" , "p16lf18875" , "16lf18875" }, 0xA875, 4, 32, 0x0F80, { 0x70, 0x7F }, -1, { 0x2000, 0x23EF }, 0x0FFF, 0x00F0FF, 0x002000, { 0x002000, 0x00EFFF }, { 0x008000, 0x008003 }, { 0x008007, 0x00800B }, { 0x00F000, 0x00F0FF }, 0x3F80, "p16lf18875.inc" , "16lf18875_g.lkr" , 0 },
{ PROC_CLASS_PIC14E , "__16LF18876" , { "pic16lf18876" , "p16lf18876" , "16lf18876" }, 0xA876, 8, 32, 0x0F80, { 0x70, 0x7F }, -1, { 0x2000, 0x27CF }, 0x0FFF, 0x00F0FF, 0x004000, { 0x004000, 0x00EFFF }, { 0x008000, 0x008003 }, { 0x008007, 0x00800B }, { 0x00F000, 0x00F0FF }, 0x3F80, "p16lf18876.inc" , "16lf18876_g.lkr" , 0 },
{ PROC_CLASS_PIC14EX , "__16LF18877" , { "pic16lf18877" , "p16lf18877" , "16lf18877" }, 0xA877, 16, 64, 0x1F80, { 0x70, 0x7F }, -1, { 0x2000, 0x25EF }, 0x1FEF, 0x00F0FF, 0x008000, { 0x008000, 0x00EFFF }, { 0x008000, 0x008003 }, { 0x008007, 0x00800B }, { 0x00F000, 0x00F0FF }, 0x3F80, "p16lf18877.inc" , "16lf18877_g.lkr" , 0 },
{ PROC_CLASS_PIC14EX , "__16LF19195" , { "pic16lf19195" , "p16lf19195" , "16lf19195" }, 0xA27C, 4, 64, 0x1F80, { 0x70, 0x7F }, -1, { 0x2000, 0x23EF }, 0x1FFF, 0x00F0FF, 0x002000, { 0x002000, 0x00EFFF }, { 0x008000, 0x008003 }, { 0x008007, 0x00800B }, { 0x00F000, 0x00F0FF }, 0x3F80, "p16lf19195.inc" , "16lf19195_g.lkr" , CPU_NO_OPTION_INSN },
{ PROC_CLASS_PIC14EX , "__16LF19196" , { "pic16lf19196" , "p16lf19196" , "16lf19196" }, 0xA27D, 8, 64, 0x1F80, { 0x70, 0x7F }, -1, { 0x2000, 0x27EF }, 0x1FFF, 0x00F0FF, 0x004000, { 0x004000, 0x00EFFF }, { 0x008000, 0x008003 }, { 0x008007, 0x00800B }, { 0x00F000, 0x00F0FF }, 0x3F80, "p16lf19196.inc" , "16lf19196_g.lkr" , CPU_NO_OPTION_INSN },
{ PROC_CLASS_PIC14EX , "__16LF19197" , { "pic16lf19197" , "p16lf19197" , "16lf19197" }, 0xA27E, 16, 64, 0x1F80, { 0x70, 0x7F }, -1, { 0x2000, 0x2FEF }, 0x1FFF, 0x00F0FF, 0x008000, { 0x008000, 0x00EFFF }, { 0x008000, 0x008003 }, { 0x008007, 0x00800B }, { 0x00F000, 0x00F0FF }, 0x3F80, "p16lf19197.inc" , "16lf19197_g.lkr" , CPU_NO_OPTION_INSN },
{ PROC_CLASS_PIC16 , "__17C42" , { "pic17c42" , "p17c42" , "17c42" }, 0x7C42, 0, 4, 0x0300, { 0x18, 0x1F }, -1, { -1, -1 }, 0x03FF, 0x0007FF, 0x000800, { -1, -1 }, { -1, -1 }, { 0x00FE00, 0x00FE0F }, { -1, -1 }, 0x0000, "p17c42.inc" , "17c42_g.lkr" , 0 },
{ PROC_CLASS_PIC16 , "__17C42A" , { "pic17c42a" , "p17c42a" , "17c42a" }, 0x742A, 0, 4, 0x0300, { 0x1A, 0x1F }, -1, { -1, -1 }, 0x031F, 0x0007FF, 0x000800, { -1, -1 }, { -1, -1 }, { 0x00FE00, 0x00FE0F }, { -1, -1 }, 0x0000, "p17c42a.inc" , "17c42a_g.lkr" , 0 },
{ PROC_CLASS_PIC16 , "__17C43" , { "pic17c43" , "p17c43" , "17c43" }, 0x7C43, 0, 4, 0x0300, { 0x1A, 0x1F }, -1, { -1, -1 }, 0x031F, 0x000FFF, 0x001000, { -1, -1 }, { -1, -1 }, { 0x00FE00, 0x00FE0F }, { -1, -1 }, 0x0000, "p17c43.inc" , "17c43_g.lkr" , 0 },
{ PROC_CLASS_PIC16 , "__17C44" , { "pic17c44" , "p17c44" , "17c44" }, 0x7C44, 0, 4, 0x0300, { 0x1A, 0x1F }, -1, { -1, -1 }, 0x031F, 0x001FFF, 0x002000, { -1, -1 }, { -1, -1 }, { 0x00FE00, 0x00FE0F }, { -1, -1 }, 0x0000, "p17c44.inc" , "17c44_g.lkr" , 0 },
{ PROC_CLASS_PIC16 , "__17C752" , { "pic17c752" , "p17c752" , "17c752" }, 0x7752, 0, 8, 0x0700, { 0x1A, 0x1F }, -1, { -1, -1 }, 0x071F, 0x001FFF, 0x002000, { -1, -1 }, { -1, -1 }, { 0x00FE00, 0x00FE0F }, { -1, -1 }, 0x0000, "p17c752.inc" , "17c752_g.lkr" , 0 },
{ PROC_CLASS_PIC16 , "__17C756" , { "pic17c756" , "p17c756" , "17c756" }, 0x7756, 0, 8, 0x0700, { 0x1A, 0x1F }, -1, { -1, -1 }, 0x071F, 0x003FFF, 0x004000, { -1, -1 }, { -1, -1 }, { 0x00FE00, 0x00FE0F }, { -1, -1 }, 0x0000, "p17c756.inc" , "17c756_g.lkr" , 0 },
{ PROC_CLASS_PIC16 , "__17C756A" , { "pic17c756a" , "p17c756a" , "17c756a" }, 0x756A, 0, 8, 0x0700, { 0x1A, 0x1F }, -1, { -1, -1 }, 0x071F, 0x003FFF, 0x004000, { -1, -1 }, { -1, -1 }, { 0x00FE00, 0x00FE0F }, { -1, -1 }, 0x0000, "p17c756a.inc" , "17c756a_g.lkr" , 0 },
{ PROC_CLASS_PIC16 , "__17C762" , { "pic17c762" , "p17c762" , "17c762" }, 0x7762, 0, 9, 0x0F00, { 0x1A, 0x1F }, -1, { -1, -1 }, 0x081F, 0x001FFF, 0x002000, { -1, -1 }, { -1, -1 }, { 0x00FE00, 0x00FE0F }, { -1, -1 }, 0x0000, "p17c762.inc" , "17c762_g.lkr" , 0 },
{ PROC_CLASS_PIC16 , "__17C766" , { "pic17c766" , "p17c766" , "17c766" }, 0x7766, 0, 9, 0x0F00, { 0x1A, 0x1F }, -1, { -1, -1 }, 0x081F, 0x003FFF, 0x004000, { -1, -1 }, { -1, -1 }, { 0x00FE00, 0x00FE0F }, { -1, -1 }, 0x0000, "p17c766.inc" , "17c766_g.lkr" , 0 },
{ PROC_CLASS_PIC16 , "__17CR42" , { "pic17cr42" , "p17cr42" , "17cr42" }, 0xE42A, 0, 4, 0x0300, { 0x1A, 0x1F }, -1, { -1, -1 }, 0x031F, 0x0007FF, 0x000800, { -1, -1 }, { -1, -1 }, { 0x00FE00, 0x00FE0F }, { -1, -1 }, 0x0000, "p17cr42.inc" , "17cr42_g.lkr" , 0 },
{ PROC_CLASS_PIC16 , "__17CR43" , { "pic17cr43" , "p17cr43" , "17cr43" }, 0xEC43, 0, 4, 0x0300, { 0x1A, 0x1F }, -1, { -1, -1 }, 0x031F, 0x000FFF, 0x001000, { -1, -1 }, { -1, -1 }, { 0x00FE00, 0x00FE0F }, { -1, -1 }, 0x0000, "p17cr43.inc" , "17cr43_g.lkr" , 0 },
{ PROC_CLASS_PIC16 , "__17CXX" , { "pic17cxx" , "p17cxx" , "17cxx" }, 0x7756, 0, 4, 0x0000, { 0x1A, 0x1F }, -1, { -1, -1 }, -1, -1, -1, { -1, -1 }, { -1, -1 }, { -1, -1 }, { -1, -1 }, 0x0000, NULL , NULL , 0 },
{ PROC_CLASS_PIC16E , "__18C242" , { "pic18c242" , "p18c242" , "18c242" }, 0x8242, 0, 16, 0x0F00, { 0x00, 0x7F }, -1, { -1, -1 }, 0x0FFF, 0x003FFF, 0x004000, { -1, -1 }, { 0x200000, 0x200007 }, { 0x300000, 0x300007 }, { -1, -1 }, 0x0000, "p18c242.inc" , "18c242_g.lkr" , 0 },
{ PROC_CLASS_PIC16E , "__18C252" , { "pic18c252" , "p18c252" , "18c252" }, 0x8252, 0, 16, 0x0F00, { 0x00, 0x7F }, -1, { -1, -1 }, 0x0FFF, 0x007FFF, 0x008000, { -1, -1 }, { 0x200000, 0x200007 }, { 0x300000, 0x300007 }, { -1, -1 }, 0x0000, "p18c252.inc" , "18c252_g.lkr" , 0 },
{ PROC_CLASS_PIC16E , "__18C442" , { "pic18c442" , "p18c442" , "18c442" }, 0x8442, 0, 16, 0x0F00, { 0x00, 0x7F }, -1, { -1, -1 }, 0x0FFF, 0x003FFF, 0x004000, { -1, -1 }, { 0x200000, 0x200007 }, { 0x300000, 0x300007 }, { -1, -1 }, 0x0000, "p18c442.inc" , "18c442_g.lkr" , 0 },
{ PROC_CLASS_PIC16E , "__18C452" , { "pic18c452" , "p18c452" , "18c452" }, 0x8452, 0, 16, 0x0F00, { 0x00, 0x7F }, -1, { -1, -1 }, 0x0FFF, 0x007FFF, 0x008000, { -1, -1 }, { 0x200000, 0x200007 }, { 0x300000, 0x300007 }, { -1, -1 }, 0x0000, "p18c452.inc" , "18c452_g.lkr" , 0 },
{ PROC_CLASS_PIC16E , "__18C601" , { "pic18c601" , "p18c601" , "18c601" }, 0x8601, 0, 16, 0x0F00, { 0x00, 0x7F }, -1, { -1, -1 }, 0x0FFF, 0x03FFFF, 0x040000, { -1, -1 }, { -1, -1 }, { 0x300000, 0x300007 }, { -1, -1 }, 0x0000, "p18c601.inc" , "18c601_g.lkr" , 0 },
{ PROC_CLASS_PIC16E , "__18C658" , { "pic18c658" , "p18c658" , "18c658" }, 0x8658, 0, 16, 0x0F00, { 0x00, 0x5F }, -1, { -1, -1 }, 0x0FFF, 0x007FFF, 0x008000, { -1, -1 }, { 0x200000, 0x200007 }, { 0x300000, 0x300007 }, { -1, -1 }, 0x0000, "p18c658.inc" , "18c658_g.lkr" , 0 },
{ PROC_CLASS_PIC16E , "__18C801" , { "pic18c801" , "p18c801" , "18c801" }, 0x8801, 0, 16, 0x0F00, { 0x00, 0x7F }, -1, { -1, -1 }, 0x0FFF, 0x1FFFFF, 0x200000, { -1, -1 }, { -1, -1 }, { 0x300000, 0x300007 }, { -1, -1 }, 0x0000, "p18c801.inc" , "18c801_g.lkr" , 0 },
{ PROC_CLASS_PIC16E , "__18C858" , { "pic18c858" , "p18c858" , "18c858" }, 0x8858, 0, 16, 0x0F00, { 0x00, 0x5F }, -1, { -1, -1 }, 0x0FFF, 0x007FFF, 0x008000, { -1, -1 }, { 0x200000, 0x200007 }, { 0x300000, 0x300007 }, { -1, -1 }, 0x0000, "p18c858.inc" , "18c858_g.lkr" , 0 },
{ PROC_CLASS_PIC16E , "__18CXX" , { "pic18cxx" , "p18cxx" , "18cxx" }, 0x8452, 0, 16, 0x0000, { 0x00, 0x7F }, -1, { -1, -1 }, -1, -1, -1, { -1, -1 }, { 0x200000, 0x200007 }, { -1, -1 }, { -1, -1 }, 0x0000, NULL , NULL , 0 },
{ PROC_CLASS_PIC16E , "__18F13K22" , { "pic18f13k22" , "p18f13k22" , "18f13k22" }, 0xB132, 0, 16, 0x0F00, { 0x00, 0x5F }, -1, { -1, -1 }, 0x0FFF, 0xF000FF, 0x002000, { 0x002000, 0xEFFFFF }, { 0x200000, 0x200007 }, { 0x300000, 0x30000D }, { 0xF00000, 0xF000FF }, 0x0000, "p18f13k22.inc" , "18f13k22_g.lkr" , CPU_HAVE_EXTINST },
{ PROC_CLASS_PIC16E , "__18F13K50" , { "pic18f13k50" , "p18f13k50" , "18f13k50" }, 0xA135, 0, 16, 0x0F00, { 0x00, 0x5F }, -1, { -1, -1 }, 0x0FFF, 0xF000FF, 0x002000, { 0x002000, 0xEFFFFF }, { 0x200000, 0x200007 }, { 0x300000, 0x30000D }, { 0xF00000, 0xF000FF }, 0x0000, "p18f13k50.inc" , "18f13k50_g.lkr" , CPU_HAVE_EXTINST },
{ PROC_CLASS_PIC16E , "__18F14K22" , { "pic18f14k22" , "p18f14k22" , "18f14k22" }, 0xB142, 0, 16, 0x0F00, { 0x00, 0x5F }, -1, { -1, -1 }, 0x0FFF, 0xF000FF, 0x004000, { 0x004000, 0xEFFFFF }, { 0x200000, 0x200007 }, { 0x300000, 0x30000D }, { 0xF00000, 0xF000FF }, 0x0000, "p18f14k22.inc" , "18f14k22_g.lkr" , CPU_HAVE_EXTINST },
{ PROC_CLASS_PIC16E , "__18F14K22LIN" , { "pic18f14k22lin" , "p18f14k22lin" , "18f14k22lin" }, 0xC142, 0, 16, 0x0F00, { 0x00, 0x5F }, -1, { -1, -1 }, 0x0FFF, 0xF000FF, 0x004000, { 0x004000, 0xEFFFFF }, { 0x200000, 0x200007 }, { 0x300000, 0x30000D }, { 0xF00000, 0xF000FF }, 0x0000, "p18f14k22lin.inc" , "18f14k22lin_g.lkr" , CPU_HAVE_EXTINST },
{ PROC_CLASS_PIC16E , "__18F14K50" , { "pic18f14k50" , "p18f14k50" , "18f14k50" }, 0xA145, 0, 16, 0x0F00, { 0x00, 0x5F }, -1, { -1, -1 }, 0x0FFF, 0xF000FF, 0x004000, { 0x004000, 0xEFFFFF }, { 0x200000, 0x200007 }, { 0x300000, 0x30000D }, { 0xF00000, 0xF000FF }, 0x0000, "p18f14k50.inc" , "18f14k50_g.lkr" , CPU_HAVE_EXTINST },
{ PROC_CLASS_PIC16E , "__18F23K20" , { "pic18f23k20" , "p18f23k20" , "18f23k20" }, 0xD320, 0, 16, 0x0F00, { 0x00, 0x5F }, -1, { -1, -1 }, 0x0FFF, 0xF000FF, 0x002000, { 0x002000, 0xEFFFFF }, { 0x200000, 0x200007 }, { 0x300000, 0x30000D }, { 0xF00000, 0xF000FF }, 0x0000, "p18f23k20.inc" , "18f23k20_g.lkr" , CPU_HAVE_EXTINST },
{ PROC_CLASS_PIC16E , "__18F23K22" , { "pic18f23k22" , "p18f23k22" , "18f23k22" }, 0xD322, 0, 16, 0x0F00, { 0x00, 0x5F }, -1, { -1, -1 }, 0x0FFF, 0xF000FF, 0x002000, { 0x002000, 0xEFFFFF }, { 0x200000, 0x200007 }, { 0x300000, 0x30000D }, { 0xF00000, 0xF000FF }, 0x0000, "p18f23k22.inc" , "18f23k22_g.lkr" , CPU_HAVE_EXTINST },
{ PROC_CLASS_PIC16E , "__18F24J10" , { "pic18f24j10" , "p18f24j10" , "18f24j10" }, 0xD410, 0, 16, 0x0F00, { 0x00, 0x7F }, -1, { -1, -1 }, 0x0FFF, 0x003FF7, 0x003FF8, { -1, -1 }, { -1, -1 }, { 0x003FF8, 0x003FFD }, { -1, -1 }, 0x0000, "p18f24j10.inc" , "18f24j10_g.lkr" , CPU_HAVE_EXTINST | CPU_18FJ_FAMILY },
{ PROC_CLASS_PIC16E , "__18F24J11" , { "pic18f24j11" , "p18f24j11" , "18f24j11" }, 0xD411, 0, 16, 0x0F00, { 0x00, 0x5F }, -1, { -1, -1 }, 0x0FFF, 0x003FF7, 0x003FF8, { -1, -1 }, { -1, -1 }, { 0x003FF8, 0x003FFF }, { -1, -1 }, 0x0000, "p18f24j11.inc" , "18f24j11_g.lkr" , CPU_HAVE_EXTINST | CPU_18FJ_FAMILY },
{ PROC_CLASS_PIC16E , "__18F24J50" , { "pic18f24j50" , "p18f24j50" , "18f24j50" }, 0xD450, 0, 16, 0x0F00, { 0x00, 0x5F }, -1, { -1, -1 }, 0x0FFF, 0x003FF7, 0x003FF8, { -1, -1 }, { -1, -1 }, { 0x003FF8, 0x003FFF }, { -1, -1 }, 0x0000, "p18f24j50.inc" , "18f24j50_g.lkr" , CPU_HAVE_EXTINST | CPU_18FJ_FAMILY },
{ PROC_CLASS_PIC16E , "__18F24K20" , { "pic18f24k20" , "p18f24k20" , "18f24k20" }, 0xD420, 0, 16, 0x0F00, { 0x00, 0x5F }, -1, { -1, -1 }, 0x0FFF, 0xF000FF, 0x004000, { 0x004000, 0xEFFFFF }, { 0x200000, 0x200007 }, { 0x300000, 0x30000D }, { 0xF00000, 0xF000FF }, 0x0000, "p18f24k20.inc" , "18f24k20_g.lkr" , CPU_HAVE_EXTINST },
{ PROC_CLASS_PIC16E , "__18F24K22" , { "pic18f24k22" , "p18f24k22" , "18f24k22" }, 0xD422, 0, 16, 0x0F00, { 0x00, 0x5F }, -1, { -1, -1 }, 0x0FFF, 0xF000FF, 0x004000, { 0x004000, 0xEFFFFF }, { 0x200000, 0x200007 }, { 0x300000, 0x30000D }, { 0xF00000, 0xF000FF }, 0x0000, "p18f24k22.inc" , "18f24k22_g.lkr" , CPU_HAVE_EXTINST },
{ PROC_CLASS_PIC16E , "__18F24K40" , { "pic18f24k40" , "p18f24k40" , "18f24k40" }, 0x2440, 0, 16, 0x0F00, { 0x00, 0x5F }, -1, { -1, -1 }, 0x0FFF, 0x3100FF, 0x004000, { 0x004000, 0x30FFFF }, { 0x200000, 0x20000F }, { 0x300000, 0x30000B }, { 0x310000, 0x3100FF }, 0x0000, "p18f24k40.inc" , "18f24k40_g.lkr" , CPU_HAVE_EXTINST },
{ PROC_CLASS_PIC16E , "__18F24K50" , { "pic18f24k50" , "p18f24k50" , "18f24k50" }, 0xD451, 0, 16, 0x0F00, { 0x00, 0x5F }, -1, { -1, -1 }, 0x0FFF, 0xF000FF, 0x004000, { 0x004000, 0xEFFFFF }, { 0x200000, 0x200007 }, { 0x300000, 0x30000D }, { 0xF00000, 0xF000FF }, 0x0000, "p18f24k50.inc" , "18f24k50_g.lkr" , CPU_HAVE_EXTINST },
{ PROC_CLASS_PIC16E , "__18F24Q10" , { "pic18f24q10" , "p18f24q10" , "18f24q10" }, 0xA2A6, 0, 16, 0x0F00, { 0x00, 0x5F }, -1, { -1, -1 }, 0x0FFF, 0x3100FF, 0x004000, { 0x004000, 0x30FFFF }, { 0x200000, 0x2000FF }, { 0x300000, 0x30000B }, { 0x310000, 0x3100FF }, 0x0000, "p18f24q10.inc" , "18f24q10_g.lkr" , CPU_HAVE_EXTINST | 0 },
{ PROC_CLASS_PIC16E , "__18F25J10" , { "pic18f25j10" , "p18f25j10" , "18f25j10" }, 0xD510, 0, 16, 0x0F00, { 0x00, 0x7F }, -1, { -1, -1 }, 0x0FFF, 0x007FF7, 0x007FF8, { -1, -1 }, { -1, -1 }, { 0x007FF8, 0x007FFD }, { -1, -1 }, 0x0000, "p18f25j10.inc" , "18f25j10_g.lkr" , CPU_HAVE_EXTINST | CPU_18FJ_FAMILY },
{ PROC_CLASS_PIC16E , "__18F25J11" , { "pic18f25j11" , "p18f25j11" , "18f25j11" }, 0xD511, 0, 16, 0x0F00, { 0x00, 0x5F }, -1, { -1, -1 }, 0x0FFF, 0x007FF7, 0x007FF8, { -1, -1 }, { -1, -1 }, { 0x007FF8, 0x007FFF }, { -1, -1 }, 0x0000, "p18f25j11.inc" , "18f25j11_g.lkr" , CPU_HAVE_EXTINST | CPU_18FJ_FAMILY },
{ PROC_CLASS_PIC16E , "__18F25J50" , { "pic18f25j50" , "p18f25j50" , "18f25j50" }, 0xD550, 0, 16, 0x0F00, { 0x00, 0x5F }, -1, { -1, -1 }, 0x0FFF, 0x007FF7, 0x007FF8, { -1, -1 }, { -1, -1 }, { 0x007FF8, 0x007FFF }, { -1, -1 }, 0x0000, "p18f25j50.inc" , "18f25j50_g.lkr" , CPU_HAVE_EXTINST | CPU_18FJ_FAMILY },
{ PROC_CLASS_PIC16E , "__18F25K20" , { "pic18f25k20" , "p18f25k20" , "18f25k20" }, 0xD520, 0, 16, 0x0F00, { 0x00, 0x5F }, -1, { -1, -1 }, 0x0FFF, 0xF000FF, 0x008000, { 0x008000, 0xEFFFFF }, { 0x200000, 0x200007 }, { 0x300000, 0x30000D }, { 0xF00000, 0xF000FF }, 0x0000, "p18f25k20.inc" , "18f25k20_g.lkr" , CPU_HAVE_EXTINST },
{ PROC_CLASS_PIC16E , "__18F25K22" , { "pic18f25k22" , "p18f25k22" , "18f25k22" }, 0xD522, 0, 16, 0x0F00, { 0x00, 0x5F }, -1, { -1, -1 }, 0x0FFF, 0xF000FF, 0x008000, { 0x008000, 0xEFFFFF }, { 0x200000, 0x200007 }, { 0x300000, 0x30000D }, { 0xF00000, 0xF000FF }, 0x0000, "p18f25k22.inc" , "18f25k22_g.lkr" , CPU_HAVE_EXTINST },
{ PROC_CLASS_PIC16E , "__18F25K40" , { "pic18f25k40" , "p18f25k40" , "18f25k40" }, 0x2540, 0, 16, 0x0F00, { 0x00, 0x5F }, -1, { -1, -1 }, 0x0FFF, 0x3100FF, 0x008000, { 0x008000, 0x30FFFF }, { 0x200000, 0x20000F }, { 0x300000, 0x30000B }, { 0x310000, 0x3100FF }, 0x0000, "p18f25k40.inc" , "18f25k40_g.lkr" , CPU_HAVE_EXTINST },
{ PROC_CLASS_PIC16E , "__18F25K50" , { "pic18f25k50" , "p18f25k50" , "18f25k50" }, 0xD551, 0, 16, 0x0F00, { 0x00, 0x5F }, -1, { -1, -1 }, 0x0FFF, 0xF000FF, 0x008000, { 0x008000, 0xEFFFFF }, { 0x200000, 0x200007 }, { 0x300000, 0x30000D }, { 0xF00000, 0xF000FF }, 0x0000, "p18f25k50.inc" , "18f25k50_g.lkr" , CPU_HAVE_EXTINST },
{ PROC_CLASS_PIC16E , "__18F25K80" , { "pic18f25k80" , "p18f25k80" , "18f25k80" }, 0xA580, 0, 16, 0x0F00, { 0x00, 0x5F }, -1, { -1, -1 }, 0x0FFF, 0xF003FF, 0x008000, { 0x008000, 0xEFFFFF }, { 0x200000, 0x200007 }, { 0x300000, 0x30000D }, { 0xF00000, 0xF003FF }, 0x0000, "p18f25k80.inc" , "18f25k80_g.lkr" , CPU_HAVE_EXTINST },
{ PROC_CLASS_PIC16E , "__18F25Q10" , { "pic18f25q10" , "p18f25q10" , "18f25q10" }, 0xA2A8, 0, 16, 0x0F00, { 0x00, 0x5F }, -1, { -1, -1 }, 0x0FFF, 0x3100FF, 0x008000, { 0x008000, 0x30FFFF }, { 0x200000, 0x2000FF }, { 0x300000, 0x30000B }, { 0x310000, 0x3100FF }, 0x0000, "p18f25q10.inc" , "18f25q10_g.lkr" , CPU_HAVE_EXTINST | 0 },
{ PROC_CLASS_PIC16E , "__18F26J11" , { "pic18f26j11" , "p18f26j11" , "18f26j11" }, 0xD611, 0, 16, 0x0F00, { 0x00, 0x5F }, -1, { -1, -1 }, 0x0FFF, 0x00FFF7, 0x00FFF8, { -1, -1 }, { -1, -1 }, { 0x00FFF8, 0x00FFFF }, { -1, -1 }, 0x0000, "p18f26j11.inc" , "18f26j11_g.lkr" , CPU_HAVE_EXTINST | CPU_18FJ_FAMILY },
{ PROC_CLASS_PIC16E , "__18F26J13" , { "pic18f26j13" , "p18f26j13" , "18f26j13" }, 0xD616, 0, 16, 0x0F00, { 0x00, 0x5F }, -1, { -1, -1 }, 0x0FFF, 0x00FFF7, 0x00FFF8, { -1, -1 }, { -1, -1 }, { 0x00FFF8, 0x00FFFF }, { -1, -1 }, 0x0000, "p18f26j13.inc" , "18f26j13_g.lkr" , CPU_HAVE_EXTINST | CPU_18FJ_FAMILY },
{ PROC_CLASS_PIC16E , "__18F26J50" , { "pic18f26j50" , "p18f26j50" , "18f26j50" }, 0xD650, 0, 16, 0x0F00, { 0x00, 0x5F }, -1, { -1, -1 }, 0x0FFF, 0x00FFF7, 0x00FFF8, { -1, -1 }, { -1, -1 }, { 0x00FFF8, 0x00FFFF }, { -1, -1 }, 0x0000, "p18f26j50.inc" , "18f26j50_g.lkr" , CPU_HAVE_EXTINST | CPU_18FJ_FAMILY },
{ PROC_CLASS_PIC16E , "__18F26J53" , { "pic18f26j53" , "p18f26j53" , "18f26j53" }, 0xD655, 0, 16, 0x0F00, { 0x00, 0x5F }, -1, { -1, -1 }, 0x0FFF, 0x00FFF7, 0x00FFF8, { -1, -1 }, { -1, -1 }, { 0x00FFF8, 0x00FFFF }, { -1, -1 }, 0x0000, "p18f26j53.inc" , "18f26j53_g.lkr" , CPU_HAVE_EXTINST | CPU_18FJ_FAMILY },
{ PROC_CLASS_PIC16E , "__18F26K20" , { "pic18f26k20" , "p18f26k20" , "18f26k20" }, 0xD620, 0, 16, 0x0F00, { 0x00, 0x5F }, -1, { -1, -1 }, 0x0FFF, 0xF003FF, 0x010000, { 0x010000, 0xEFFFFF }, { 0x200000, 0x200007 }, { 0x300000, 0x30000D }, { 0xF00000, 0xF003FF }, 0x0000, "p18f26k20.inc" , "18f26k20_g.lkr" , CPU_HAVE_EXTINST },
{ PROC_CLASS_PIC16E , "__18F26K22" , { "pic18f26k22" , "p18f26k22" , "18f26k22" }, 0xD622, 0, 16, 0x0F00, { 0x00, 0x5F }, -1, { -1, -1 }, 0x0FFF, 0xF003FF, 0x010000, { 0x010000, 0xEFFFFF }, { 0x200000, 0x200007 }, { 0x300000, 0x30000D }, { 0xF00000, 0xF003FF }, 0x0000, "p18f26k22.inc" , "18f26k22_g.lkr" , CPU_HAVE_EXTINST },
{ PROC_CLASS_PIC16E , "__18F26K40" , { "pic18f26k40" , "p18f26k40" , "18f26k40" }, 0x2640, 0, 16, 0x0F00, { 0x00, 0x5F }, -1, { -1, -1 }, 0x0FFF, 0x3103FF, 0x010000, { 0x010000, 0x30FFFF }, { 0x200000, 0x20000F }, { 0x300000, 0x30000B }, { 0x310000, 0x3103FF }, 0x0000, "p18f26k40.inc" , "18f26k40_g.lkr" , CPU_HAVE_EXTINST },
{ PROC_CLASS_PIC16E , "__18F26K80" , { "pic18f26k80" , "p18f26k80" , "18f26k80" }, 0xA680, 0, 16, 0x0F00, { 0x00, 0x5F }, -1, { -1, -1 }, 0x0FFF, 0xF003FF, 0x010000, { 0x010000, 0xEFFFFF }, { 0x200000, 0x200007 }, { 0x300000, 0x30000D }, { 0xF00000, 0xF003FF }, 0x0000, "p18f26k80.inc" , "18f26k80_g.lkr" , CPU_HAVE_EXTINST },
{ PROC_CLASS_PIC16E , "__18F26Q10" , { "pic18f26q10" , "p18f26q10" , "18f26q10" }, 0xA2D2, 0, 16, 0x0F00, { 0x00, 0x5F }, -1, { -1, -1 }, 0x0FFF, 0x3103FF, 0x010000, { 0x010000, 0x30FFFF }, { 0x200000, 0x2000FF }, { 0x300000, 0x30000B }, { 0x310000, 0x3103FF }, 0x0000, "p18f26q10.inc" , "18f26q10_g.lkr" , CPU_HAVE_EXTINST | 0 },
{ PROC_CLASS_PIC16E , "__18F27J13" , { "pic18f27j13" , "p18f27j13" , "18f27j13" }, 0xD711, 0, 16, 0x0F00, { 0x00, 0x5F }, -1, { -1, -1 }, 0x0FFF, 0x01FFF7, 0x01FFF8, { -1, -1 }, { -1, -1 }, { 0x01FFF8, 0x01FFFF }, { -1, -1 }, 0x0000, "p18f27j13.inc" , "18f27j13_g.lkr" , CPU_HAVE_EXTINST | CPU_18FJ_FAMILY },
{ PROC_CLASS_PIC16E , "__18F27J53" , { "pic18f27j53" , "p18f27j53" , "18f27j53" }, 0xD750, 0, 16, 0x0F00, { 0x00, 0x5F }, -1, { -1, -1 }, 0x0FFF, 0x01FFF7, 0x01FFF8, { -1, -1 }, { -1, -1 }, { 0x01FFF8, 0x01FFFF }, { -1, -1 }, 0x0000, "p18f27j53.inc" , "18f27j53_g.lkr" , CPU_HAVE_EXTINST | CPU_18FJ_FAMILY },
{ PROC_CLASS_PIC16E , "__18F27K40" , { "pic18f27k40" , "p18f27k40" , "18f27k40" }, 0x2740, 0, 16, 0x0F00, { 0x00, 0x5F }, -1, { -1, -1 }, 0x0FFF, 0x3103FF, 0x020000, { 0x020000, 0x30FFFF }, { 0x200000, 0x20000F }, { 0x300000, 0x30000B }, { 0x310000, 0x3103FF }, 0x0000, "p18f27k40.inc" , "18f27k40_g.lkr" , CPU_HAVE_EXTINST },
{ PROC_CLASS_PIC16E , "__18F43K20" , { "pic18f43k20" , "p18f43k20" , "18f43k20" }, 0xE320, 0, 16, 0x0F00, { 0x00, 0x5F }, -1, { -1, -1 }, 0x0FFF, 0xF000FF, 0x002000, { 0x002000, 0xEFFFFF }, { 0x200000, 0x200007 }, { 0x300000, 0x30000D }, { 0xF00000, 0xF000FF }, 0x0000, "p18f43k20.inc" , "18f43k20_g.lkr" , CPU_HAVE_EXTINST },
{ PROC_CLASS_PIC16E , "__18F43K22" , { "pic18f43k22" , "p18f43k22" , "18f43k22" }, 0xE322, 0, 16, 0x0F00, { 0x00, 0x5F }, -1, { -1, -1 }, 0x0FFF, 0xF000FF, 0x002000, { 0x002000, 0xEFFFFF }, { 0x200000, 0x200007 }, { 0x300000, 0x30000D }, { 0xF00000, 0xF000FF }, 0x0000, "p18f43k22.inc" , "18f43k22_g.lkr" , CPU_HAVE_EXTINST },
{ PROC_CLASS_PIC16E , "__18F44J10" , { "pic18f44j10" , "p18f44j10" , "18f44j10" }, 0xE410, 0, 16, 0x0F00, { 0x00, 0x7F }, -1, { -1, -1 }, 0x0FFF, 0x003FF7, 0x003FF8, { -1, -1 }, { -1, -1 }, { 0x003FF8, 0x003FFD }, { -1, -1 }, 0x0000, "p18f44j10.inc" , "18f44j10_g.lkr" , CPU_HAVE_EXTINST | CPU_18FJ_FAMILY },
{ PROC_CLASS_PIC16E , "__18F44J11" , { "pic18f44j11" , "p18f44j11" , "18f44j11" }, 0xE411, 0, 16, 0x0F00, { 0x00, 0x5F }, -1, { -1, -1 }, 0x0FFF, 0x003FF7, 0x003FF8, { -1, -1 }, { -1, -1 }, { 0x003FF8, 0x003FFF }, { -1, -1 }, 0x0000, "p18f44j11.inc" , "18f44j11_g.lkr" , CPU_HAVE_EXTINST | CPU_18FJ_FAMILY },
{ PROC_CLASS_PIC16E , "__18F44J50" , { "pic18f44j50" , "p18f44j50" , "18f44j50" }, 0xE450, 0, 16, 0x0F00, { 0x00, 0x5F }, -1, { -1, -1 }, 0x0FFF, 0x003FF7, 0x003FF8, { -1, -1 }, { -1, -1 }, { 0x003FF8, 0x003FFF }, { -1, -1 }, 0x0000, "p18f44j50.inc" , "18f44j50_g.lkr" , CPU_HAVE_EXTINST | CPU_18FJ_FAMILY },
{ PROC_CLASS_PIC16E , "__18F44K20" , { "pic18f44k20" , "p18f44k20" , "18f44k20" }, 0xE420, 0, 16, 0x0F00, { 0x00, 0x5F }, -1, { -1, -1 }, 0x0FFF, 0xF000FF, 0x004000, { 0x004000, 0xEFFFFF }, { 0x200000, 0x200007 }, { 0x300000, 0x30000D }, { 0xF00000, 0xF000FF }, 0x0000, "p18f44k20.inc" , "18f44k20_g.lkr" , CPU_HAVE_EXTINST },
{ PROC_CLASS_PIC16E , "__18F44K22" , { "pic18f44k22" , "p18f44k22" , "18f44k22" }, 0xE422, 0, 16, 0x0F00, { 0x00, 0x5F }, -1, { -1, -1 }, 0x0FFF, 0xF000FF, 0x004000, { 0x004000, 0xEFFFFF }, { 0x200000, 0x200007 }, { 0x300000, 0x30000D }, { 0xF00000, 0xF000FF }, 0x0000, "p18f44k22.inc" , "18f44k22_g.lkr" , CPU_HAVE_EXTINST },
{ PROC_CLASS_PIC16E , "__18F45J10" , { "pic18f45j10" , "p18f45j10" , "18f45j10" }, 0xE510, 0, 16, 0x0F00, { 0x00, 0x7F }, -1, { -1, -1 }, 0x0FFF, 0x007FF7, 0x007FF8, { -1, -1 }, { -1, -1 }, { 0x007FF8, 0x007FFD }, { -1, -1 }, 0x0000, "p18f45j10.inc" , "18f45j10_g.lkr" , CPU_HAVE_EXTINST | CPU_18FJ_FAMILY },
{ PROC_CLASS_PIC16E , "__18F45J11" , { "pic18f45j11" , "p18f45j11" , "18f45j11" }, 0xE511, 0, 16, 0x0F00, { 0x00, 0x5F }, -1, { -1, -1 }, 0x0FFF, 0x007FF7, 0x007FF8, { -1, -1 }, { -1, -1 }, { 0x007FF8, 0x007FFF }, { -1, -1 }, 0x0000, "p18f45j11.inc" , "18f45j11_g.lkr" , CPU_HAVE_EXTINST | CPU_18FJ_FAMILY },
{ PROC_CLASS_PIC16E , "__18F45J50" , { "pic18f45j50" , "p18f45j50" , "18f45j50" }, 0xE550, 0, 16, 0x0F00, { 0x00, 0x5F }, -1, { -1, -1 }, 0x0FFF, 0x007FF7, 0x007FF8, { -1, -1 }, { -1, -1 }, { 0x007FF8, 0x007FFF }, { -1, -1 }, 0x0000, "p18f45j50.inc" , "18f45j50_g.lkr" , CPU_HAVE_EXTINST | CPU_18FJ_FAMILY },
{ PROC_CLASS_PIC16E , "__18F45K20" , { "pic18f45k20" , "p18f45k20" , "18f45k20" }, 0xE520, 0, 16, 0x0F00, { 0x00, 0x5F }, -1, { -1, -1 }, 0x0FFF, 0xF000FF, 0x008000, { 0x008000, 0xEFFFFF }, { 0x200000, 0x200007 }, { 0x300000, 0x30000D }, { 0xF00000, 0xF000FF }, 0x0000, "p18f45k20.inc" , "18f45k20_g.lkr" , CPU_HAVE_EXTINST },
{ PROC_CLASS_PIC16E , "__18F45K22" , { "pic18f45k22" , "p18f45k22" , "18f45k22" }, 0xE522, 0, 16, 0x0F00, { 0x00, 0x5F }, -1, { -1, -1 }, 0x0FFF, 0xF000FF, 0x008000, { 0x008000, 0xEFFFFF }, { 0x200000, 0x200007 }, { 0x300000, 0x30000D }, { 0xF00000, 0xF000FF }, 0x0000, "p18f45k22.inc" , "18f45k22_g.lkr" , CPU_HAVE_EXTINST },
{ PROC_CLASS_PIC16E , "__18F45K40" , { "pic18f45k40" , "p18f45k40" , "18f45k40" }, 0x4540, 0, 16, 0x0F00, { 0x00, 0x5F }, -1, { -1, -1 }, 0x0FFF, 0x3100FF, 0x008000, { 0x008000, 0x30FFFF }, { 0x200000, 0x20000F }, { 0x300000, 0x30000B }, { 0x310000, 0x3100FF }, 0x0000, "p18f45k40.inc" , "18f45k40_g.lkr" , CPU_HAVE_EXTINST },
{ PROC_CLASS_PIC16E , "__18F45K50" , { "pic18f45k50" , "p18f45k50" , "18f45k50" }, 0xE551, 0, 16, 0x0F00, { 0x00, 0x5F }, -1, { -1, -1 }, 0x0FFF, 0xF000FF, 0x008000, { 0x008000, 0xEFFFFF }, { 0x200000, 0x200007 }, { 0x300000, 0x30000D }, { 0xF00000, 0xF000FF }, 0x0000, "p18f45k50.inc" , "18f45k50_g.lkr" , CPU_HAVE_EXTINST },
{ PROC_CLASS_PIC16E , "__18F45K80" , { "pic18f45k80" , "p18f45k80" , "18f45k80" }, 0xB580, 0, 16, 0x0F00, { 0x00, 0x5F }, -1, { -1, -1 }, 0x0FFF, 0xF003FF, 0x008000, { 0x008000, 0xEFFFFF }, { 0x200000, 0x200007 }, { 0x300000, 0x30000D }, { 0xF00000, 0xF003FF }, 0x0000, "p18f45k80.inc" , "18f45k80_g.lkr" , CPU_HAVE_EXTINST },
{ PROC_CLASS_PIC16E , "__18F45Q10" , { "pic18f45q10" , "p18f45q10" , "18f45q10" }, 0xA2D3, 0, 16, 0x0F00, { 0x00, 0x5F }, -1, { -1, -1 }, 0x0FFF, 0x3100FF, 0x008000, { 0x008000, 0x30FFFF }, { 0x200000, 0x2000FF }, { 0x300000, 0x30000B }, { 0x310000, 0x3100FF }, 0x0000, "p18f45q10.inc" , "18f45q10_g.lkr" , CPU_HAVE_EXTINST | 0 },
{ PROC_CLASS_PIC16E , "__18F46J11" , { "pic18f46j11" , "p18f46j11" , "18f46j11" }, 0xE611, 0, 16, 0x0F00, { 0x00, 0x5F }, -1, { -1, -1 }, 0x0FFF, 0x00FFF7, 0x00FFF8, { -1, -1 }, { -1, -1 }, { 0x00FFF8, 0x00FFFF }, { -1, -1 }, 0x0000, "p18f46j11.inc" , "18f46j11_g.lkr" , CPU_HAVE_EXTINST | CPU_18FJ_FAMILY },
{ PROC_CLASS_PIC16E , "__18F46J13" , { "pic18f46j13" , "p18f46j13" , "18f46j13" }, 0xE616, 0, 16, 0x0F00, { 0x00, 0x5F }, -1, { -1, -1 }, 0x0FFF, 0x00FFF7, 0x00FFF8, { -1, -1 }, { -1, -1 }, { 0x00FFF8, 0x00FFFF }, { -1, -1 }, 0x0000, "p18f46j13.inc" , "18f46j13_g.lkr" , CPU_HAVE_EXTINST | CPU_18FJ_FAMILY },
{ PROC_CLASS_PIC16E , "__18F46J50" , { "pic18f46j50" , "p18f46j50" , "18f46j50" }, 0xE650, 0, 16, 0x0F00, { 0x00, 0x5F }, -1, { -1, -1 }, 0x0FFF, 0x00FFF7, 0x00FFF8, { -1, -1 }, { -1, -1 }, { 0x00FFF8, 0x00FFFF }, { -1, -1 }, 0x0000, "p18f46j50.inc" , "18f46j50_g.lkr" , CPU_HAVE_EXTINST | CPU_18FJ_FAMILY },
{ PROC_CLASS_PIC16E , "__18F46J53" , { "pic18f46j53" , "p18f46j53" , "18f46j53" }, 0xE655, 0, 16, 0x0F00, { 0x00, 0x5F }, -1, { -1, -1 }, 0x0FFF, 0x00FFF7, 0x00FFF8, { -1, -1 }, { -1, -1 }, { 0x00FFF8, 0x00FFFF }, { -1, -1 }, 0x0000, "p18f46j53.inc" , "18f46j53_g.lkr" , CPU_HAVE_EXTINST | CPU_18FJ_FAMILY },
{ PROC_CLASS_PIC16E , "__18F46K20" , { "pic18f46k20" , "p18f46k20" , "18f46k20" }, 0xE620, 0, 16, 0x0F00, { 0x00, 0x5F }, -1, { -1, -1 }, 0x0FFF, 0xF003FF, 0x010000, { 0x010000, 0xEFFFFF }, { 0x200000, 0x200007 }, { 0x300000, 0x30000D }, { 0xF00000, 0xF003FF }, 0x0000, "p18f46k20.inc" , "18f46k20_g.lkr" , CPU_HAVE_EXTINST },
{ PROC_CLASS_PIC16E , "__18F46K22" , { "pic18f46k22" , "p18f46k22" , "18f46k22" }, 0xE622, 0, 16, 0x0F00, { 0x00, 0x5F }, -1, { -1, -1 }, 0x0FFF, 0xF003FF, 0x010000, { 0x010000, 0xEFFFFF }, { 0x200000, 0x200007 }, { 0x300000, 0x30000D }, { 0xF00000, 0xF003FF }, 0x0000, "p18f46k22.inc" , "18f46k22_g.lkr" , CPU_HAVE_EXTINST },
{ PROC_CLASS_PIC16E , "__18F46K40" , { "pic18f46k40" , "p18f46k40" , "18f46k40" }, 0x4640, 0, 16, 0x0F00, { 0x00, 0x5F }, -1, { -1, -1 }, 0x0FFF, 0x3103FF, 0x010000, { 0x010000, 0x30FFFF }, { 0x200000, 0x20000F }, { 0x300000, 0x30000B }, { 0x310000, 0x3103FF }, 0x0000, "p18f46k40.inc" , "18f46k40_g.lkr" , CPU_HAVE_EXTINST },
{ PROC_CLASS_PIC16E , "__18F46K80" , { "pic18f46k80" , "p18f46k80" , "18f46k80" }, 0xB680, 0, 16, 0x0F00, { 0x00, 0x5F }, -1, { -1, -1 }, 0x0FFF, 0xF003FF, 0x010000, { 0x010000, 0xEFFFFF }, { 0x200000, 0x200007 }, { 0x300000, 0x30000D }, { 0xF00000, 0xF003FF }, 0x0000, "p18f46k80.inc" , "18f46k80_g.lkr" , CPU_HAVE_EXTINST },
{ PROC_CLASS_PIC16E , "__18F46Q10" , { "pic18f46q10" , "p18f46q10" , "18f46q10" }, 0xA2D4, 0, 16, 0x0F00, { 0x00, 0x5F }, -1, { -1, -1 }, 0x0FFF, 0x3103FF, 0x010000, { 0x010000, 0x30FFFF }, { 0x200000, 0x2000FF }, { 0x300000, 0x30000B }, { 0x310000, 0x3103FF }, 0x0000, "p18f46q10.inc" , "18f46q10_g.lkr" , CPU_HAVE_EXTINST | 0 },
{ PROC_CLASS_PIC16E , "__18F47J13" , { "pic18f47j13" , "p18f47j13" , "18f47j13" }, 0xE711, 0, 16, 0x0F00, { 0x00, 0x5F }, -1, { -1, -1 }, 0x0FFF, 0x01FFF7, 0x01FFF8, { -1, -1 }, { -1, -1 }, { 0x01FFF8, 0x01FFFF }, { -1, -1 }, 0x0000, "p18f47j13.inc" , "18f47j13_g.lkr" , CPU_HAVE_EXTINST | CPU_18FJ_FAMILY },
{ PROC_CLASS_PIC16E , "__18F47J53" , { "pic18f47j53" , "p18f47j53" , "18f47j53" }, 0xE750, 0, 16, 0x0F00, { 0x00, 0x5F }, -1, { -1, -1 }, 0x0FFF, 0x01FFF7, 0x01FFF8, { -1, -1 }, { -1, -1 }, { 0x01FFF8, 0x01FFFF }, { -1, -1 }, 0x0000, "p18f47j53.inc" , "18f47j53_g.lkr" , CPU_HAVE_EXTINST | CPU_18FJ_FAMILY },
{ PROC_CLASS_PIC16E , "__18F47K40" , { "pic18f47k40" , "p18f47k40" , "18f47k40" }, 0x4740, 0, 16, 0x0F00, { 0x00, 0x5F }, -1, { -1, -1 }, 0x0FFF, 0x3103FF, 0x020000, { 0x020000, 0x30FFFF }, { 0x200000, 0x20000F }, { 0x300000, 0x30000B }, { 0x310000, 0x3103FF }, 0x0000, "p18f47k40.inc" , "18f47k40_g.lkr" , CPU_HAVE_EXTINST },
{ PROC_CLASS_PIC16E , "__18F63J11" , { "pic18f63j11" , "p18f63j11" , "18f63j11" }, 0x6311, 0, 16, 0x0F00, { 0x00, 0x5F }, -1, { -1, -1 }, 0x0FFF, 0x001FF7, 0x001FF8, { -1, -1 }, { -1, -1 }, { 0x001FF8, 0x001FFD }, { -1, -1 }, 0x0000, "p18f63j11.inc" , "18f63j11_g.lkr" , CPU_HAVE_EXTINST | CPU_18FJ_FAMILY },
{ PROC_CLASS_PIC16E , "__18F63J90" , { "pic18f63j90" , "p18f63j90" , "18f63j90" }, 0xB390, 0, 16, 0x0F00, { 0x00, 0x5F }, -1, { -1, -1 }, 0x0FFF, 0x001FF7, 0x001FF8, { -1, -1 }, { -1, -1 }, { 0x001FF8, 0x001FFD }, { -1, -1 }, 0x0000, "p18f63j90.inc" , "18f63j90_g.lkr" , CPU_HAVE_EXTINST | CPU_18FJ_FAMILY },
{ PROC_CLASS_PIC16E , "__18F64J11" , { "pic18f64j11" , "p18f64j11" , "18f64j11" }, 0x6411, 0, 16, 0x0F00, { 0x00, 0x5F }, -1, { -1, -1 }, 0x0FFF, 0x003FF7, 0x003FF8, { -1, -1 }, { -1, -1 }, { 0x003FF8, 0x003FFD }, { -1, -1 }, 0x0000, "p18f64j11.inc" , "18f64j11_g.lkr" , CPU_HAVE_EXTINST | CPU_18FJ_FAMILY },
{ PROC_CLASS_PIC16E , "__18F64J15" , { "pic18f64j15" , "p18f64j15" , "18f64j15" }, 0xB415, 0, 16, 0x0F00, { 0x00, 0x5F }, -1, { -1, -1 }, -1, -1, -1, { -1, -1 }, { -1, -1 }, { -1, -1 }, { -1, -1 }, 0x0000, "p18f64j15.inc" , "18f64j15_g.lkr" , CPU_HAVE_EXTINST | CPU_18FJ_FAMILY }, /* not documented by Microchip, added in svn rev. #378, see http://osdir.com/ml/hardware.microcontrollers.gnupic/2008-05/msg00013.html */
{ PROC_CLASS_PIC16E , "__18F64J90" , { "pic18f64j90" , "p18f64j90" , "18f64j90" }, 0xB490, 0, 16, 0x0F00, { 0x00, 0x5F }, -1, { -1, -1 }, 0x0FFF, 0x003FF7, 0x003FF8, { -1, -1 }, { -1, -1 }, { 0x003FF8, 0x003FFD }, { -1, -1 }, 0x0000, "p18f64j90.inc" , "18f64j90_g.lkr" , CPU_HAVE_EXTINST | CPU_18FJ_FAMILY },
{ PROC_CLASS_PIC16E , "__18F65J10" , { "pic18f65j10" , "p18f65j10" , "18f65j10" }, 0xB510, 0, 16, 0x0F00, { 0x00, 0x5F }, -1, { -1, -1 }, 0x0FFF, 0x007FF7, 0x007FF8, { -1, -1 }, { -1, -1 }, { 0x007FF8, 0x007FFD }, { -1, -1 }, 0x0000, "p18f65j10.inc" , "18f65j10_g.lkr" , CPU_HAVE_EXTINST | CPU_18FJ_FAMILY },
{ PROC_CLASS_PIC16E , "__18F65J11" , { "pic18f65j11" , "p18f65j11" , "18f65j11" }, 0x6511, 0, 16, 0x0F00, { 0x00, 0x5F }, -1, { -1, -1 }, 0x0FFF, 0x007FF7, 0x007FF8, { -1, -1 }, { -1, -1 }, { 0x007FF8, 0x007FFD }, { -1, -1 }, 0x0000, "p18f65j11.inc" , "18f65j11_g.lkr" , CPU_HAVE_EXTINST | CPU_18FJ_FAMILY },
{ PROC_CLASS_PIC16E , "__18F65J15" , { "pic18f65j15" , "p18f65j15" , "18f65j15" }, 0xB515, 0, 16, 0x0F00, { 0x00, 0x5F }, -1, { -1, -1 }, 0x0FFF, 0x00BFF7, 0x00BFF8, { -1, -1 }, { -1, -1 }, { 0x00BFF8, 0x00BFFD }, { -1, -1 }, 0x0000, "p18f65j15.inc" , "18f65j15_g.lkr" , CPU_HAVE_EXTINST | CPU_18FJ_FAMILY },
{ PROC_CLASS_PIC16E , "__18F65J50" , { "pic18f65j50" , "p18f65j50" , "18f65j50" }, 0xB550, 0, 16, 0x0F00, { 0x00, 0x5F }, -1, { -1, -1 }, 0x0FFF, 0x007FF7, 0x007FF8, { -1, -1 }, { -1, -1 }, { 0x007FF8, 0x007FFD }, { -1, -1 }, 0x0000, "p18f65j50.inc" , "18f65j50_g.lkr" , CPU_HAVE_EXTINST | CPU_18FJ_FAMILY },
{ PROC_CLASS_PIC16E , "__18F65J90" , { "pic18f65j90" , "p18f65j90" , "18f65j90" }, 0xB590, 0, 16, 0x0F00, { 0x00, 0x5F }, -1, { -1, -1 }, 0x0FFF, 0x007FF7, 0x007FF8, { -1, -1 }, { -1, -1 }, { 0x007FF8, 0x007FFD }, { -1, -1 }, 0x0000, "p18f65j90.inc" , "18f65j90_g.lkr" , CPU_HAVE_EXTINST | CPU_18FJ_FAMILY },
{ PROC_CLASS_PIC16E , "__18F65J94" , { "pic18f65j94" , "p18f65j94" , "18f65j94" }, 0x6594, 0, 16, 0x0F00, { 0x00, 0x5F }, -1, { -1, -1 }, 0x0FFF, 0x007FEF, 0x007FF0, { -1, -1 }, { -1, -1 }, { 0x007FF0, 0x007FFF }, { -1, -1 }, 0x0000, "p18f65j94.inc" , "18f65j94_g.lkr" , CPU_HAVE_EXTINST | CPU_18FJ_FAMILY },
{ PROC_CLASS_PIC16E , "__18F65K22" , { "pic18f65k22" , "p18f65k22" , "18f65k22" }, 0x6522, 0, 16, 0x0F00, { 0x00, 0x5F }, -1, { -1, -1 }, 0x0FFF, 0xF003FF, 0x008000, { 0x008000, 0xEFFFFF }, { 0x200000, 0x200007 }, { 0x300000, 0x30000D }, { 0xF00000, 0xF003FF }, 0x0000, "p18f65k22.inc" , "18f65k22_g.lkr" , CPU_HAVE_EXTINST },
{ PROC_CLASS_PIC16E , "__18F65K40" , { "pic18f65k40" , "p18f65k40" , "18f65k40" }, 0xA26F, 0, 16, 0x0F00, { 0x00, 0x5F }, -1, { -1, -1 }, 0x0FFF, 0x3103FF, 0x008000, { 0x008000, 0x30FFFF }, { 0x200000, 0x20000F }, { 0x300000, 0x30000B }, { 0x310000, 0x3103FF }, 0x0000, "p18f65k40.inc" , "18f65k40_g.lkr" , CPU_HAVE_EXTINST },
{ PROC_CLASS_PIC16E , "__18F65K80" , { "pic18f65k80" , "p18f65k80" , "18f65k80" }, 0xC580, 0, 16, 0x0F00, { 0x00, 0x5F }, -1, { -1, -1 }, 0x0FFF, 0xF003FF, 0x008000, { 0x008000, 0xEFFFFF }, { 0x200000, 0x200007 }, { 0x300000, 0x30000D }, { 0xF00000, 0xF003FF }, 0x0000, "p18f65k80.inc" , "18f65k80_g.lkr" , CPU_HAVE_EXTINST },
{ PROC_CLASS_PIC16E , "__18F65K90" , { "pic18f65k90" , "p18f65k90" , "18f65k90" }, 0xB591, 0, 16, 0x0F00, { 0x00, 0x5F }, -1, { -1, -1 }, 0x0FFF, 0xF003FF, 0x008000, { 0x008000, 0xEFFFFF }, { 0x200000, 0x200007 }, { 0x300000, 0x30000D }, { 0xF00000, 0xF003FF }, 0x0000, "p18f65k90.inc" , "18f65k90_g.lkr" , CPU_HAVE_EXTINST },
{ PROC_CLASS_PIC16E , "__18F66J10" , { "pic18f66j10" , "p18f66j10" , "18f66j10" }, 0xB610, 0, 16, 0x0F00, { 0x00, 0x5F }, -1, { -1, -1 }, 0x0FFF, 0x00FFF7, 0x00FFF8, { -1, -1 }, { -1, -1 }, { 0x00FFF8, 0x00FFFD }, { -1, -1 }, 0x0000, "p18f66j10.inc" , "18f66j10_g.lkr" , CPU_HAVE_EXTINST | CPU_18FJ_FAMILY },
{ PROC_CLASS_PIC16E , "__18F66J11" , { "pic18f66j11" , "p18f66j11" , "18f66j11" }, 0xB611, 0, 16, 0x0F00, { 0x00, 0x5F }, -1, { -1, -1 }, 0x0FFF, 0x00FFF7, 0x00FFF8, { -1, -1 }, { -1, -1 }, { 0x00FFF8, 0x00FFFD }, { -1, -1 }, 0x0000, "p18f66j11.inc" , "18f66j11_g.lkr" , CPU_HAVE_EXTINST | CPU_18FJ_FAMILY },
{ PROC_CLASS_PIC16E , "__18F66J15" , { "pic18f66j15" , "p18f66j15" , "18f66j15" }, 0xB615, 0, 16, 0x0F00, { 0x00, 0x5F }, -1, { -1, -1 }, 0x0FFF, 0x017FF7, 0x017FF8, { -1, -1 }, { -1, -1 }, { 0x017FF8, 0x017FFD }, { -1, -1 }, 0x0000, "p18f66j15.inc" , "18f66j15_g.lkr" , CPU_HAVE_EXTINST | CPU_18FJ_FAMILY },
{ PROC_CLASS_PIC16E , "__18F66J16" , { "pic18f66j16" , "p18f66j16" , "18f66j16" }, 0xB616, 0, 16, 0x0F00, { 0x00, 0x5F }, -1, { -1, -1 }, 0x0FFF, 0x017FF7, 0x017FF8, { -1, -1 }, { -1, -1 }, { 0x017FF8, 0x017FFD }, { -1, -1 }, 0x0000, "p18f66j16.inc" , "18f66j16_g.lkr" , CPU_HAVE_EXTINST | CPU_18FJ_FAMILY },
{ PROC_CLASS_PIC16E , "__18F66J50" , { "pic18f66j50" , "p18f66j50" , "18f66j50" }, 0xB650, 0, 16, 0x0F00, { 0x00, 0x5F }, -1, { -1, -1 }, 0x0FFF, 0x00FFF7, 0x00FFF8, { -1, -1 }, { -1, -1 }, { 0x00FFF8, 0x00FFFD }, { -1, -1 }, 0x0000, "p18f66j50.inc" , "18f66j50_g.lkr" , CPU_HAVE_EXTINST | CPU_18FJ_FAMILY },
{ PROC_CLASS_PIC16E , "__18F66J55" , { "pic18f66j55" , "p18f66j55" , "18f66j55" }, 0xB655, 0, 16, 0x0F00, { 0x00, 0x5F }, -1, { -1, -1 }, 0x0FFF, 0x017FF7, 0x017FF8, { -1, -1 }, { -1, -1 }, { 0x017FF8, 0x017FFD }, { -1, -1 }, 0x0000, "p18f66j55.inc" , "18f66j55_g.lkr" , CPU_HAVE_EXTINST | CPU_18FJ_FAMILY },
{ PROC_CLASS_PIC16E , "__18F66J60" , { "pic18f66j60" , "p18f66j60" , "18f66j60" }, 0xB660, 0, 16, 0x0F00, { 0x00, 0x5F }, -1, { -1, -1 }, 0x0FFF, 0x00FFF7, 0x00FFF8, { -1, -1 }, { -1, -1 }, { 0x00FFF8, 0x00FFFD }, { -1, -1 }, 0x0000, "p18f66j60.inc" , "18f66j60_g.lkr" , CPU_HAVE_EXTINST | CPU_18FJ_FAMILY },
{ PROC_CLASS_PIC16E , "__18F66J65" , { "pic18f66j65" , "p18f66j65" , "18f66j65" }, 0xB665, 0, 16, 0x0F00, { 0x00, 0x5F }, -1, { -1, -1 }, 0x0FFF, 0x017FF7, 0x017FF8, { -1, -1 }, { -1, -1 }, { 0x017FF8, 0x017FFD }, { -1, -1 }, 0x0000, "p18f66j65.inc" , "18f66j65_g.lkr" , CPU_HAVE_EXTINST | CPU_18FJ_FAMILY },
{ PROC_CLASS_PIC16E , "__18F66J90" , { "pic18f66j90" , "p18f66j90" , "18f66j90" }, 0xB690, 0, 16, 0x0F00, { 0x00, 0x5F }, -1, { -1, -1 }, 0x0FFF, 0x00FFF7, 0x00FFF8, { -1, -1 }, { -1, -1 }, { 0x00FFF8, 0x00FFFF }, { -1, -1 }, 0x0000, "p18f66j90.inc" , "18f66j90_g.lkr" , CPU_HAVE_EXTINST | CPU_18FJ_FAMILY },
{ PROC_CLASS_PIC16E , "__18F66J93" , { "pic18f66j93" , "p18f66j93" , "18f66j93" }, 0x6693, 0, 16, 0x0F00, { 0x00, 0x5F }, -1, { -1, -1 }, 0x0FFF, 0x00FFF7, 0x00FFF8, { -1, -1 }, { -1, -1 }, { 0x00FFF8, 0x00FFFF }, { -1, -1 }, 0x0000, "p18f66j93.inc" , "18f66j93_g.lkr" , CPU_HAVE_EXTINST | CPU_18FJ_FAMILY },
{ PROC_CLASS_PIC16E , "__18F66J94" , { "pic18f66j94" , "p18f66j94" , "18f66j94" }, 0x6694, 0, 16, 0x0F00, { 0x00, 0x5F }, -1, { -1, -1 }, 0x0FFF, 0x00FFEF, 0x00FFF0, { -1, -1 }, { -1, -1 }, { 0x00FFF0, 0x00FFFF }, { -1, -1 }, 0x0000, "p18f66j94.inc" , "18f66j94_g.lkr" , CPU_HAVE_EXTINST | CPU_18FJ_FAMILY },
{ PROC_CLASS_PIC16E , "__18F66J99" , { "pic18f66j99" , "p18f66j99" , "18f66j99" }, 0x6699, 0, 16, 0x0F00, { 0x00, 0x5F }, -1, { -1, -1 }, 0x0FFF, 0x017FEF, 0x017FF0, { -1, -1 }, { -1, -1 }, { 0x017FF0, 0x017FFF }, { -1, -1 }, 0x0000, "p18f66j99.inc" , "18f66j99_g.lkr" , CPU_HAVE_EXTINST | CPU_18FJ_FAMILY },
{ PROC_CLASS_PIC16E , "__18F66K22" , { "pic18f66k22" , "p18f66k22" , "18f66k22" }, 0xB622, 0, 16, 0x0F00, { 0x00, 0x5F }, -1, { -1, -1 }, 0x0FFF, 0xF003FF, 0x010000, { 0x010000, 0xEFFFFF }, { 0x200000, 0x200007 }, { 0x300000, 0x30000D }, { 0xF00000, 0xF003FF }, 0x0000, "p18f66k22.inc" , "18f66k22_g.lkr" , CPU_HAVE_EXTINST },
{ PROC_CLASS_PIC16E , "__18F66K40" , { "pic18f66k40" , "p18f66k40" , "18f66k40" }, 0x6640, 0, 16, 0x0F00, { 0x00, 0x5F }, -1, { -1, -1 }, 0x0FFF, 0x3103FF, 0x010000, { 0x010000, 0x30FFFF }, { 0x200000, 0x20000F }, { 0x300000, 0x30000B }, { 0x310000, 0x3103FF }, 0x0000, "p18f66k40.inc" , "18f66k40_g.lkr" , CPU_HAVE_EXTINST },
{ PROC_CLASS_PIC16E , "__18F66K80" , { "pic18f66k80" , "p18f66k80" , "18f66k80" }, 0xC680, 0, 16, 0x0F00, { 0x00, 0x5F }, -1, { -1, -1 }, 0x0FFF, 0xF003FF, 0x010000, { 0x010000, 0xEFFFFF }, { 0x200000, 0x200007 }, { 0x300000, 0x30000D }, { 0xF00000, 0xF003FF }, 0x0000, "p18f66k80.inc" , "18f66k80_g.lkr" , CPU_HAVE_EXTINST },
{ PROC_CLASS_PIC16E , "__18F66K90" , { "pic18f66k90" , "p18f66k90" , "18f66k90" }, 0xB691, 0, 16, 0x0F00, { 0x00, 0x5F }, -1, { -1, -1 }, 0x0FFF, 0xF003FF, 0x010000, { 0x010000, 0xEFFFFF }, { 0x200000, 0x200007 }, { 0x300000, 0x30000D }, { 0xF00000, 0xF003FF }, 0x0000, "p18f66k90.inc" , "18f66k90_g.lkr" , CPU_HAVE_EXTINST },
{ PROC_CLASS_PIC16E , "__18F67J10" , { "pic18f67j10" , "p18f67j10" , "18f67j10" }, 0xB710, 0, 16, 0x0F00, { 0x00, 0x5F }, -1, { -1, -1 }, 0x0FFF, 0x01FFF7, 0x01FFF8, { -1, -1 }, { -1, -1 }, { 0x01FFF8, 0x01FFFD }, { -1, -1 }, 0x0000, "p18f67j10.inc" , "18f67j10_g.lkr" , CPU_HAVE_EXTINST | CPU_18FJ_FAMILY },
{ PROC_CLASS_PIC16E , "__18F67J11" , { "pic18f67j11" , "p18f67j11" , "18f67j11" }, 0xB711, 0, 16, 0x0F00, { 0x00, 0x5F }, -1, { -1, -1 }, 0x0FFF, 0x01FFF7, 0x01FFF8, { -1, -1 }, { -1, -1 }, { 0x01FFF8, 0x01FFFD }, { -1, -1 }, 0x0000, "p18f67j11.inc" , "18f67j11_g.lkr" , CPU_HAVE_EXTINST | CPU_18FJ_FAMILY },
{ PROC_CLASS_PIC16E , "__18F67J50" , { "pic18f67j50" , "p18f67j50" , "18f67j50" }, 0xB750, 0, 16, 0x0F00, { 0x00, 0x5F }, -1, { -1, -1 }, 0x0FFF, 0x01FFF7, 0x01FFF8, { -1, -1 }, { -1, -1 }, { 0x01FFF8, 0x01FFFD }, { -1, -1 }, 0x0000, "p18f67j50.inc" , "18f67j50_g.lkr" , CPU_HAVE_EXTINST | CPU_18FJ_FAMILY },
{ PROC_CLASS_PIC16E , "__18F67J60" , { "pic18f67j60" , "p18f67j60" , "18f67j60" }, 0xB760, 0, 16, 0x0F00, { 0x00, 0x5F }, -1, { -1, -1 }, 0x0FFF, 0x01FFF7, 0x01FFF8, { -1, -1 }, { -1, -1 }, { 0x01FFF8, 0x01FFFD }, { -1, -1 }, 0x0000, "p18f67j60.inc" , "18f67j60_g.lkr" , CPU_HAVE_EXTINST | CPU_18FJ_FAMILY },
{ PROC_CLASS_PIC16E , "__18F67J90" , { "pic18f67j90" , "p18f67j90" , "18f67j90" }, 0x6790, 0, 16, 0x0F00, { 0x00, 0x5F }, -1, { -1, -1 }, 0x0FFF, 0x01FFF7, 0x01FFF8, { -1, -1 }, { -1, -1 }, { 0x01FFF8, 0x01FFFF }, { -1, -1 }, 0x0000, "p18f67j90.inc" , "18f67j90_g.lkr" , CPU_HAVE_EXTINST | CPU_18FJ_FAMILY },
{ PROC_CLASS_PIC16E , "__18F67J93" , { "pic18f67j93" , "p18f67j93" , "18f67j93" }, 0x6793, 0, 16, 0x0F00, { 0x00, 0x5F }, -1, { -1, -1 }, 0x0FFF, 0x01FFF7, 0x01FFF8, { -1, -1 }, { -1, -1 }, { 0x01FFF8, 0x01FFFF }, { -1, -1 }, 0x0000, "p18f67j93.inc" , "18f67j93_g.lkr" , CPU_HAVE_EXTINST | CPU_18FJ_FAMILY },
{ PROC_CLASS_PIC16E , "__18F67J94" , { "pic18f67j94" , "p18f67j94" , "18f67j94" }, 0x6794, 0, 16, 0x0F00, { 0x00, 0x5F }, -1, { -1, -1 }, 0x0FFF, 0x01FFEF, 0x01FFF0, { -1, -1 }, { -1, -1 }, { 0x01FFF0, 0x01FFFF }, { -1, -1 }, 0x0000, "p18f67j94.inc" , "18f67j94_g.lkr" , CPU_HAVE_EXTINST | CPU_18FJ_FAMILY },
{ PROC_CLASS_PIC16E , "__18F67K22" , { "pic18f67k22" , "p18f67k22" , "18f67k22" }, 0x6722, 0, 16, 0x0F00, { 0x00, 0x5F }, -1, { -1, -1 }, 0x0FFF, 0xF003FF, 0x020000, { 0x020000, 0xEFFFFF }, { 0x200000, 0x200007 }, { 0x300000, 0x30000D }, { 0xF00000, 0xF003FF }, 0x0000, "p18f67k22.inc" , "18f67k22_g.lkr" , CPU_HAVE_EXTINST },
{ PROC_CLASS_PIC16E , "__18F67K40" , { "pic18f67k40" , "p18f67k40" , "18f67k40" }, 0x6740, 0, 16, 0x0F00, { 0x00, 0x5F }, -1, { -1, -1 }, 0x0FFF, 0x3103FF, 0x020000, { 0x020000, 0x30FFFF }, { 0x200000, 0x20000F }, { 0x300000, 0x30000B }, { 0x310000, 0x3103FF }, 0x0000, "p18f67k40.inc" , "18f67k40_g.lkr" , CPU_HAVE_EXTINST },
{ PROC_CLASS_PIC16E , "__18F67K90" , { "pic18f67k90" , "p18f67k90" , "18f67k90" }, 0xB790, 0, 16, 0x0F00, { 0x00, 0x5F }, -1, { -1, -1 }, 0x0FFF, 0xF003FF, 0x020000, { 0x020000, 0xEFFFFF }, { 0x200000, 0x200007 }, { 0x300000, 0x30000D }, { 0xF00000, 0xF003FF }, 0x0000, "p18f67k90.inc" , "18f67k90_g.lkr" , CPU_HAVE_EXTINST },
{ PROC_CLASS_PIC16E , "__18F83J11" , { "pic18f83j11" , "p18f83j11" , "18f83j11" }, 0x8311, 0, 16, 0x0F00, { 0x00, 0x5F }, -1, { -1, -1 }, 0x0FFF, 0x001FF7, 0x001FF8, { -1, -1 }, { -1, -1 }, { 0x001FF8, 0x001FFD }, { -1, -1 }, 0x0000, "p18f83j11.inc" , "18f83j11_g.lkr" , CPU_HAVE_EXTINST | CPU_18FJ_FAMILY },
{ PROC_CLASS_PIC16E , "__18F83J90" , { "pic18f83j90" , "p18f83j90" , "18f83j90" }, 0xC390, 0, 16, 0x0F00, { 0x00, 0x5F }, -1, { -1, -1 }, 0x0FFF, 0x001FF7, 0x001FF8, { -1, -1 }, { -1, -1 }, { 0x001FF8, 0x001FFD }, { -1, -1 }, 0x0000, "p18f83j90.inc" , "18f83j90_g.lkr" , CPU_HAVE_EXTINST | CPU_18FJ_FAMILY },
{ PROC_CLASS_PIC16E , "__18F84J11" , { "pic18f84j11" , "p18f84j11" , "18f84j11" }, 0x8411, 0, 16, 0x0F00, { 0x00, 0x5F }, -1, { -1, -1 }, 0x0FFF, 0x003FF7, 0x003FF8, { -1, -1 }, { -1, -1 }, { 0x003FF8, 0x003FFD }, { -1, -1 }, 0x0000, "p18f84j11.inc" , "18f84j11_g.lkr" , CPU_HAVE_EXTINST | CPU_18FJ_FAMILY },
{ PROC_CLASS_PIC16E , "__18F84J15" , { "pic18f84j15" , "p18f84j15" , "18f84j15" }, 0xC415, 0, 16, 0x0F00, { 0x00, 0x5F }, -1, { -1, -1 }, -1, -1, -1, { -1, -1 }, { -1, -1 }, { -1, -1 }, { -1, -1 }, 0x0000, "p18f84j15.inc" , "18f84j15_g.lkr" , CPU_HAVE_EXTINST | CPU_18FJ_FAMILY }, /* not documented by Microchip, added in svn rev. #378, see http://osdir.com/ml/hardware.microcontrollers.gnupic/2008-05/msg00013.html */
{ PROC_CLASS_PIC16E , "__18F84J90" , { "pic18f84j90" , "p18f84j90" , "18f84j90" }, 0xC490, 0, 16, 0x0F00, { 0x00, 0x5F }, -1, { -1, -1 }, 0x0FFF, 0x003FF7, 0x003FF8, { -1, -1 }, { -1, -1 }, { 0x003FF8, 0x003FFD }, { -1, -1 }, 0x0000, "p18f84j90.inc" , "18f84j90_g.lkr" , CPU_HAVE_EXTINST | CPU_18FJ_FAMILY },
{ PROC_CLASS_PIC16E , "__18F85J10" , { "pic18f85j10" , "p18f85j10" , "18f85j10" }, 0xC510, 0, 16, 0x0F00, { 0x00, 0x5F }, -1, { -1, -1 }, 0x0FFF, 0x007FF7, 0x007FF8, { -1, -1 }, { -1, -1 }, { 0x007FF8, 0x007FFD }, { -1, -1 }, 0x0000, "p18f85j10.inc" , "18f85j10_g.lkr" , CPU_HAVE_EXTINST | CPU_18FJ_FAMILY },
{ PROC_CLASS_PIC16E , "__18F85J11" , { "pic18f85j11" , "p18f85j11" , "18f85j11" }, 0x8511, 0, 16, 0x0F00, { 0x00, 0x5F }, -1, { -1, -1 }, 0x0FFF, 0x007FF7, 0x007FF8, { -1, -1 }, { -1, -1 }, { 0x007FF8, 0x007FFD }, { -1, -1 }, 0x0000, "p18f85j11.inc" , "18f85j11_g.lkr" , CPU_HAVE_EXTINST | CPU_18FJ_FAMILY },
{ PROC_CLASS_PIC16E , "__18F85J15" , { "pic18f85j15" , "p18f85j15" , "18f85j15" }, 0xC515, 0, 16, 0x0F00, { 0x00, 0x5F }, -1, { -1, -1 }, 0x0FFF, 0x00BFF7, 0x00BFF8, { -1, -1 }, { -1, -1 }, { 0x00BFF8, 0x00BFFD }, { -1, -1 }, 0x0000, "p18f85j15.inc" , "18f85j15_g.lkr" , CPU_HAVE_EXTINST | CPU_18FJ_FAMILY },
{ PROC_CLASS_PIC16E , "__18F85J50" , { "pic18f85j50" , "p18f85j50" , "18f85j50" }, 0xC550, 0, 16, 0x0F00, { 0x00, 0x5F }, -1, { -1, -1 }, 0x0FFF, 0x007FF7, 0x007FF8, { -1, -1 }, { -1, -1 }, { 0x007FF8, 0x007FFD }, { -1, -1 }, 0x0000, "p18f85j50.inc" , "18f85j50_g.lkr" , CPU_HAVE_EXTINST | CPU_18FJ_FAMILY },
{ PROC_CLASS_PIC16E , "__18F85J90" , { "pic18f85j90" , "p18f85j90" , "18f85j90" }, 0xC590, 0, 16, 0x0F00, { 0x00, 0x5F }, -1, { -1, -1 }, 0x0FFF, 0x007FF7, 0x007FF8, { -1, -1 }, { -1, -1 }, { 0x007FF8, 0x007FFD }, { -1, -1 }, 0x0000, "p18f85j90.inc" , "18f85j90_g.lkr" , CPU_HAVE_EXTINST | CPU_18FJ_FAMILY },
{ PROC_CLASS_PIC16E , "__18F85J94" , { "pic18f85j94" , "p18f85j94" , "18f85j94" }, 0x8594, 0, 16, 0x0F00, { 0x00, 0x5F }, -1, { -1, -1 }, 0x0FFF, 0x007FEF, 0x007FF0, { -1, -1 }, { -1, -1 }, { 0x007FF0, 0x007FFF }, { -1, -1 }, 0x0000, "p18f85j94.inc" , "18f85j94_g.lkr" , CPU_HAVE_EXTINST | CPU_18FJ_FAMILY },
{ PROC_CLASS_PIC16E , "__18F85K22" , { "pic18f85k22" , "p18f85k22" , "18f85k22" }, 0x8522, 0, 16, 0x0F00, { 0x00, 0x5F }, -1, { -1, -1 }, 0x0FFF, 0xF003FF, 0x008000, { 0x008000, 0xEFFFFF }, { 0x200000, 0x200007 }, { 0x300000, 0x30000D }, { 0xF00000, 0xF003FF }, 0x0000, "p18f85k22.inc" , "18f85k22_g.lkr" , CPU_HAVE_EXTINST },
{ PROC_CLASS_PIC16E , "__18F85K90" , { "pic18f85k90" , "p18f85k90" , "18f85k90" }, 0xC591, 0, 16, 0x0F00, { 0x00, 0x5F }, -1, { -1, -1 }, 0x0FFF, 0xF003FF, 0x008000, { 0x008000, 0xEFFFFF }, { 0x200000, 0x200007 }, { 0x300000, 0x30000D }, { 0xF00000, 0xF003FF }, 0x0000, "p18f85k90.inc" , "18f85k90_g.lkr" , CPU_HAVE_EXTINST },
{ PROC_CLASS_PIC16E , "__18F86J10" , { "pic18f86j10" , "p18f86j10" , "18f86j10" }, 0xC610, 0, 16, 0x0F00, { 0x00, 0x5F }, -1, { -1, -1 }, 0x0FFF, 0x00FFF7, 0x00FFF8, { -1, -1 }, { -1, -1 }, { 0x00FFF8, 0x00FFFD }, { -1, -1 }, 0x0000, "p18f86j10.inc" , "18f86j10_g.lkr" , CPU_HAVE_EXTINST | CPU_18FJ_FAMILY },
{ PROC_CLASS_PIC16E , "__18F86J11" , { "pic18f86j11" , "p18f86j11" , "18f86j11" }, 0xC611, 0, 16, 0x0F00, { 0x00, 0x5F }, -1, { -1, -1 }, 0x0FFF, 0x00FFF7, 0x00FFF8, { -1, -1 }, { -1, -1 }, { 0x00FFF8, 0x00FFFD }, { -1, -1 }, 0x0000, "p18f86j11.inc" , "18f86j11_g.lkr" , CPU_HAVE_EXTINST | CPU_18FJ_FAMILY },
{ PROC_CLASS_PIC16E , "__18F86J15" , { "pic18f86j15" , "p18f86j15" , "18f86j15" }, 0xC615, 0, 16, 0x0F00, { 0x00, 0x5F }, -1, { -1, -1 }, 0x0FFF, 0x017FF7, 0x017FF8, { -1, -1 }, { -1, -1 }, { 0x017FF8, 0x017FFD }, { -1, -1 }, 0x0000, "p18f86j15.inc" , "18f86j15_g.lkr" , CPU_HAVE_EXTINST | CPU_18FJ_FAMILY },
{ PROC_CLASS_PIC16E , "__18F86J16" , { "pic18f86j16" , "p18f86j16" , "18f86j16" }, 0xC616, 0, 16, 0x0F00, { 0x00, 0x5F }, -1, { -1, -1 }, 0x0FFF, 0x017FF7, 0x017FF8, { -1, -1 }, { -1, -1 }, { 0x017FF8, 0x017FFD }, { -1, -1 }, 0x0000, "p18f86j16.inc" , "18f86j16_g.lkr" , CPU_HAVE_EXTINST | CPU_18FJ_FAMILY },
{ PROC_CLASS_PIC16E , "__18F86J50" , { "pic18f86j50" , "p18f86j50" , "18f86j50" }, 0xC650, 0, 16, 0x0F00, { 0x00, 0x5F }, -1, { -1, -1 }, 0x0FFF, 0x00FFF7, 0x00FFF8, { -1, -1 }, { -1, -1 }, { 0x00FFF8, 0x00FFFD }, { -1, -1 }, 0x0000, "p18f86j50.inc" , "18f86j50_g.lkr" , CPU_HAVE_EXTINST | CPU_18FJ_FAMILY },
{ PROC_CLASS_PIC16E , "__18F86J55" , { "pic18f86j55" , "p18f86j55" , "18f86j55" }, 0xC655, 0, 16, 0x0F00, { 0x00, 0x5F }, -1, { -1, -1 }, 0x0FFF, 0x017FF7, 0x017FF8, { -1, -1 }, { -1, -1 }, { 0x017FF8, 0x017FFD }, { -1, -1 }, 0x0000, "p18f86j55.inc" , "18f86j55_g.lkr" , CPU_HAVE_EXTINST | CPU_18FJ_FAMILY },
{ PROC_CLASS_PIC16E , "__18F86J60" , { "pic18f86j60" , "p18f86j60" , "18f86j60" }, 0xC660, 0, 16, 0x0F00, { 0x00, 0x5F }, -1, { -1, -1 }, 0x0FFF, 0x00FFF7, 0x00FFF8, { -1, -1 }, { -1, -1 }, { 0x00FFF8, 0x00FFFD }, { -1, -1 }, 0x0000, "p18f86j60.inc" , "18f86j60_g.lkr" , CPU_HAVE_EXTINST | CPU_18FJ_FAMILY },
{ PROC_CLASS_PIC16E , "__18F86J65" , { "pic18f86j65" , "p18f86j65" , "18f86j65" }, 0xC665, 0, 16, 0x0F00, { 0x00, 0x5F }, -1, { -1, -1 }, 0x0FFF, 0x017FF7, 0x017FF8, { -1, -1 }, { -1, -1 }, { 0x017FF8, 0x017FFD }, { -1, -1 }, 0x0000, "p18f86j65.inc" , "18f86j65_g.lkr" , CPU_HAVE_EXTINST | CPU_18FJ_FAMILY },
{ PROC_CLASS_PIC16E , "__18F86J72" , { "pic18f86j72" , "p18f86j72" , "18f86j72" }, 0x8672, 0, 16, 0x0F00, { 0x00, 0x5F }, -1, { -1, -1 }, 0x0FFF, 0x00FFF7, 0x00FFF8, { -1, -1 }, { -1, -1 }, { 0x00FFF8, 0x00FFFF }, { -1, -1 }, 0x0000, "p18f86j72.inc" , "18f86j72_g.lkr" , CPU_HAVE_EXTINST | CPU_18FJ_FAMILY },
{ PROC_CLASS_PIC16E , "__18F86J90" , { "pic18f86j90" , "p18f86j90" , "18f86j90" }, 0x8690, 0, 16, 0x0F00, { 0x00, 0x5F }, -1, { -1, -1 }, 0x0FFF, 0x00FFF7, 0x00FFF8, { -1, -1 }, { -1, -1 }, { 0x00FFF8, 0x00FFFF }, { -1, -1 }, 0x0000, "p18f86j90.inc" , "18f86j90_g.lkr" , CPU_HAVE_EXTINST | CPU_18FJ_FAMILY },
{ PROC_CLASS_PIC16E , "__18F86J93" , { "pic18f86j93" , "p18f86j93" , "18f86j93" }, 0x8693, 0, 16, 0x0F00, { 0x00, 0x5F }, -1, { -1, -1 }, 0x0FFF, 0x00FFF7, 0x00FFF8, { -1, -1 }, { -1, -1 }, { 0x00FFF8, 0x00FFFF }, { -1, -1 }, 0x0000, "p18f86j93.inc" , "18f86j93_g.lkr" , CPU_HAVE_EXTINST | CPU_18FJ_FAMILY },
{ PROC_CLASS_PIC16E , "__18F86J94" , { "pic18f86j94" , "p18f86j94" , "18f86j94" }, 0x8694, 0, 16, 0x0F00, { 0x00, 0x5F }, -1, { -1, -1 }, 0x0FFF, 0x00FFEF, 0x00FFF0, { -1, -1 }, { -1, -1 }, { 0x00FFF0, 0x00FFFF }, { -1, -1 }, 0x0000, "p18f86j94.inc" , "18f86j94_g.lkr" , CPU_HAVE_EXTINST | CPU_18FJ_FAMILY },
{ PROC_CLASS_PIC16E , "__18F86J99" , { "pic18f86j99" , "p18f86j99" , "18f86j99" }, 0x8699, 0, 16, 0x0F00, { 0x00, 0x5F }, -1, { -1, -1 }, 0x0FFF, 0x017FEF, 0x017FF0, { -1, -1 }, { -1, -1 }, { 0x017FF0, 0x017FFF }, { -1, -1 }, 0x0000, "p18f86j99.inc" , "18f86j99_g.lkr" , CPU_HAVE_EXTINST | CPU_18FJ_FAMILY },
{ PROC_CLASS_PIC16E , "__18F86K22" , { "pic18f86k22" , "p18f86k22" , "18f86k22" }, 0xC622, 0, 16, 0x0F00, { 0x00, 0x5F }, -1, { -1, -1 }, 0x0FFF, 0xF003FF, 0x010000, { 0x010000, 0xEFFFFF }, { 0x200000, 0x200007 }, { 0x300000, 0x30000D }, { 0xF00000, 0xF003FF }, 0x0000, "p18f86k22.inc" , "18f86k22_g.lkr" , CPU_HAVE_EXTINST },
{ PROC_CLASS_PIC16E , "__18F86K90" , { "pic18f86k90" , "p18f86k90" , "18f86k90" }, 0xC690, 0, 16, 0x0F00, { 0x00, 0x5F }, -1, { -1, -1 }, 0x0FFF, 0xF003FF, 0x010000, { 0x010000, 0xEFFFFF }, { 0x200000, 0x200007 }, { 0x300000, 0x30000D }, { 0xF00000, 0xF003FF }, 0x0000, "p18f86k90.inc" , "18f86k90_g.lkr" , CPU_HAVE_EXTINST },
{ PROC_CLASS_PIC16E , "__18F87J10" , { "pic18f87j10" , "p18f87j10" , "18f87j10" }, 0xC710, 0, 16, 0x0F00, { 0x00, 0x5F }, -1, { -1, -1 }, 0x0FFF, 0x01FFF7, 0x01FFF8, { -1, -1 }, { -1, -1 }, { 0x01FFF8, 0x01FFFD }, { -1, -1 }, 0x0000, "p18f87j10.inc" , "18f87j10_g.lkr" , CPU_HAVE_EXTINST | CPU_18FJ_FAMILY },
{ PROC_CLASS_PIC16E , "__18F87J11" , { "pic18f87j11" , "p18f87j11" , "18f87j11" }, 0xC711, 0, 16, 0x0F00, { 0x00, 0x5F }, -1, { -1, -1 }, 0x0FFF, 0x01FFF7, 0x01FFF8, { -1, -1 }, { -1, -1 }, { 0x01FFF8, 0x01FFFD }, { -1, -1 }, 0x0000, "p18f87j11.inc" , "18f87j11_g.lkr" , CPU_HAVE_EXTINST | CPU_18FJ_FAMILY },
{ PROC_CLASS_PIC16E , "__18F87J50" , { "pic18f87j50" , "p18f87j50" , "18f87j50" }, 0xC750, 0, 16, 0x0F00, { 0x00, 0x5F }, -1, { -1, -1 }, 0x0FFF, 0x01FFF7, 0x01FFF8, { -1, -1 }, { -1, -1 }, { 0x01FFF8, 0x01FFFD }, { -1, -1 }, 0x0000, "p18f87j50.inc" , "18f87j50_g.lkr" , CPU_HAVE_EXTINST | CPU_18FJ_FAMILY },
{ PROC_CLASS_PIC16E , "__18F87J60" , { "pic18f87j60" , "p18f87j60" , "18f87j60" }, 0xC760, 0, 16, 0x0F00, { 0x00, 0x5F }, -1, { -1, -1 }, 0x0FFF, 0x01FFF7, 0x01FFF8, { -1, -1 }, { -1, -1 }, { 0x01FFF8, 0x01FFFD }, { -1, -1 }, 0x0000, "p18f87j60.inc" , "18f87j60_g.lkr" , CPU_HAVE_EXTINST | CPU_18FJ_FAMILY },
{ PROC_CLASS_PIC16E , "__18F87J72" , { "pic18f87j72" , "p18f87j72" , "18f87j72" }, 0x8772, 0, 16, 0x0F00, { 0x00, 0x5F }, -1, { -1, -1 }, 0x0FFF, 0x01FFF7, 0x01FFF8, { -1, -1 }, { -1, -1 }, { 0x01FFF8, 0x01FFFF }, { -1, -1 }, 0x0000, "p18f87j72.inc" , "18f87j72_g.lkr" , CPU_HAVE_EXTINST | CPU_18FJ_FAMILY },
{ PROC_CLASS_PIC16E , "__18F87J90" , { "pic18f87j90" , "p18f87j90" , "18f87j90" }, 0x8790, 0, 16, 0x0F00, { 0x00, 0x5F }, -1, { -1, -1 }, 0x0FFF, 0x01FFF7, 0x01FFF8, { -1, -1 }, { -1, -1 }, { 0x01FFF8, 0x01FFFF }, { -1, -1 }, 0x0000, "p18f87j90.inc" , "18f87j90_g.lkr" , CPU_HAVE_EXTINST | CPU_18FJ_FAMILY },
{ PROC_CLASS_PIC16E , "__18F87J93" , { "pic18f87j93" , "p18f87j93" , "18f87j93" }, 0x8793, 0, 16, 0x0F00, { 0x00, 0x5F }, -1, { -1, -1 }, 0x0FFF, 0x01FFF7, 0x01FFF8, { -1, -1 }, { -1, -1 }, { 0x01FFF8, 0x01FFFF }, { -1, -1 }, 0x0000, "p18f87j93.inc" , "18f87j93_g.lkr" , CPU_HAVE_EXTINST | CPU_18FJ_FAMILY },
{ PROC_CLASS_PIC16E , "__18F87J94" , { "pic18f87j94" , "p18f87j94" , "18f87j94" }, 0x8794, 0, 16, 0x0F00, { 0x00, 0x5F }, -1, { -1, -1 }, 0x0FFF, 0x01FFEF, 0x01FFF0, { -1, -1 }, { -1, -1 }, { 0x01FFF0, 0x01FFFF }, { -1, -1 }, 0x0000, "p18f87j94.inc" , "18f87j94_g.lkr" , CPU_HAVE_EXTINST | CPU_18FJ_FAMILY },
{ PROC_CLASS_PIC16E , "__18F87K22" , { "pic18f87k22" , "p18f87k22" , "18f87k22" }, 0x8722, 0, 16, 0x0F00, { 0x00, 0x5F }, -1, { -1, -1 }, 0x0FFF, 0xF003FF, 0x020000, { 0x020000, 0xEFFFFF }, { 0x200000, 0x200007 }, { 0x300000, 0x30000D }, { 0xF00000, 0xF003FF }, 0x0000, "p18f87k22.inc" , "18f87k22_g.lkr" , CPU_HAVE_EXTINST },
{ PROC_CLASS_PIC16E , "__18F87K90" , { "pic18f87k90" , "p18f87k90" , "18f87k90" }, 0xC790, 0, 16, 0x0F00, { 0x00, 0x5F }, -1, { -1, -1 }, 0x0FFF, 0xF003FF, 0x020000, { 0x020000, 0xEFFFFF }, { 0x200000, 0x200007 }, { 0x300000, 0x30000D }, { 0xF00000, 0xF003FF }, 0x0000, "p18f87k90.inc" , "18f87k90_g.lkr" , CPU_HAVE_EXTINST },
{ PROC_CLASS_PIC16E , "__18F95J94" , { "pic18f95j94" , "p18f95j94" , "18f95j94" }, 0x9594, 0, 16, 0x0F00, { 0x00, 0x5F }, -1, { -1, -1 }, 0x0FFF, 0x007FEF, 0x007FF0, { -1, -1 }, { -1, -1 }, { 0x007FF0, 0x007FFF }, { -1, -1 }, 0x0000, "p18f95j94.inc" , "18f95j94_g.lkr" , CPU_HAVE_EXTINST | CPU_18FJ_FAMILY },
{ PROC_CLASS_PIC16E , "__18F96J60" , { "pic18f96j60" , "p18f96j60" , "18f96j60" }, 0xD660, 0, 16, 0x0F00, { 0x00, 0x5F }, -1, { -1, -1 }, 0x0FFF, 0x00FFF7, 0x00FFF8, { -1, -1 }, { -1, -1 }, { 0x00FFF8, 0x00FFFD }, { -1, -1 }, 0x0000, "p18f96j60.inc" , "18f96j60_g.lkr" , CPU_HAVE_EXTINST | CPU_18FJ_FAMILY },
{ PROC_CLASS_PIC16E , "__18F96J65" , { "pic18f96j65" , "p18f96j65" , "18f96j65" }, 0xD665, 0, 16, 0x0F00, { 0x00, 0x5F }, -1, { -1, -1 }, 0x0FFF, 0x017FF7, 0x017FF8, { -1, -1 }, { -1, -1 }, { 0x017FF8, 0x017FFD }, { -1, -1 }, 0x0000, "p18f96j65.inc" , "18f96j65_g.lkr" , CPU_HAVE_EXTINST | CPU_18FJ_FAMILY },
{ PROC_CLASS_PIC16E , "__18F96J94" , { "pic18f96j94" , "p18f96j94" , "18f96j94" }, 0x9694, 0, 16, 0x0F00, { 0x00, 0x5F }, -1, { -1, -1 }, 0x0FFF, 0x00FFEF, 0x00FFF0, { -1, -1 }, { -1, -1 }, { 0x00FFF0, 0x00FFFF }, { -1, -1 }, 0x0000, "p18f96j94.inc" , "18f96j94_g.lkr" , CPU_HAVE_EXTINST | CPU_18FJ_FAMILY },
{ PROC_CLASS_PIC16E , "__18F96J99" , { "pic18f96j99" , "p18f96j99" , "18f96j99" }, 0x9699, 0, 16, 0x0F00, { 0x00, 0x5F }, -1, { -1, -1 }, 0x0FFF, 0x017FEF, 0x017FF0, { -1, -1 }, { -1, -1 }, { 0x017FF0, 0x017FFF }, { -1, -1 }, 0x0000, "p18f96j99.inc" , "18f96j99_g.lkr" , CPU_HAVE_EXTINST | CPU_18FJ_FAMILY },
{ PROC_CLASS_PIC16E , "__18F97J60" , { "pic18f97j60" , "p18f97j60" , "18f97j60" }, 0xD760, 0, 16, 0x0F00, { 0x00, 0x5F }, -1, { -1, -1 }, 0x0FFF, 0x01FFF7, 0x01FFF8, { -1, -1 }, { -1, -1 }, { 0x01FFF8, 0x01FFFD }, { -1, -1 }, 0x0000, "p18f97j60.inc" , "18f97j60_g.lkr" , CPU_HAVE_EXTINST | CPU_18FJ_FAMILY },
{ PROC_CLASS_PIC16E , "__18F97J94" , { "pic18f97j94" , "p18f97j94" , "18f97j94" }, 0x9794, 0, 16, 0x0F00, { 0x00, 0x5F }, -1, { -1, -1 }, 0x0FFF, 0x01FFEF, 0x01FFF0, { -1, -1 }, { -1, -1 }, { 0x01FFF0, 0x01FFFF }, { -1, -1 }, 0x0000, "p18f97j94.inc" , "18f97j94_g.lkr" , CPU_HAVE_EXTINST | CPU_18FJ_FAMILY },
{ PROC_CLASS_PIC16E , "__18F242" , { "pic18f242" , "p18f242" , "18f242" }, 0x242F, 0, 16, 0x0F00, { 0x00, 0x7F }, -1, { -1, -1 }, 0x0FFF, 0xF000FF, 0x004000, { 0x004000, 0xEFFFFF }, { 0x200000, 0x200007 }, { 0x300000, 0x30000D }, { 0xF00000, 0xF000FF }, 0x0000, "p18f242.inc" , "18f242_g.lkr" , 0 },
{ PROC_CLASS_PIC16E , "__18F248" , { "pic18f248" , "p18f248" , "18f248" }, 0x8248, 0, 16, 0x0F00, { 0x00, 0x5F }, -1, { -1, -1 }, 0x0FFF, 0xF000FF, 0x004000, { 0x004000, 0xEFFFFF }, { 0x200000, 0x200007 }, { 0x300000, 0x30000D }, { 0xF00000, 0xF000FF }, 0x0000, "p18f248.inc" , "18f248_g.lkr" , 0 },
{ PROC_CLASS_PIC16E , "__18F252" , { "pic18f252" , "p18f252" , "18f252" }, 0x252F, 0, 16, 0x0F00, { 0x00, 0x7F }, -1, { -1, -1 }, 0x0FFF, 0xF000FF, 0x008000, { 0x008000, 0xEFFFFF }, { 0x200000, 0x200007 }, { 0x300000, 0x30000D }, { 0xF00000, 0xF000FF }, 0x0000, "p18f252.inc" , "18f252_g.lkr" , 0 },
{ PROC_CLASS_PIC16E , "__18F258" , { "pic18f258" , "p18f258" , "18f258" }, 0x8258, 0, 16, 0x0F00, { 0x00, 0x5F }, -1, { -1, -1 }, 0x0FFF, 0xF000FF, 0x008000, { 0x008000, 0xEFFFFF }, { 0x200000, 0x200007 }, { 0x300000, 0x30000D }, { 0xF00000, 0xF000FF }, 0x0000, "p18f258.inc" , "18f258_g.lkr" , 0 },
{ PROC_CLASS_PIC16E , "__18F442" , { "pic18f442" , "p18f442" , "18f442" }, 0x442F, 0, 16, 0x0F00, { 0x00, 0x7F }, -1, { -1, -1 }, 0x0FFF, 0xF000FF, 0x004000, { 0x004000, 0xEFFFFF }, { 0x200000, 0x200007 }, { 0x300000, 0x30000D }, { 0xF00000, 0xF000FF }, 0x0000, "p18f442.inc" , "18f442_g.lkr" , 0 },
{ PROC_CLASS_PIC16E , "__18F448" , { "pic18f448" , "p18f448" , "18f448" }, 0x8448, 0, 16, 0x0F00, { 0x00, 0x5F }, -1, { -1, -1 }, 0x0FFF, 0xF000FF, 0x004000, { 0x004000, 0xEFFFFF }, { 0x200000, 0x200007 }, { 0x300000, 0x30000D }, { 0xF00000, 0xF000FF }, 0x0000, "p18f448.inc" , "18f448_g.lkr" , 0 },
{ PROC_CLASS_PIC16E , "__18F452" , { "pic18f452" , "p18f452" , "18f452" }, 0x452F, 0, 16, 0x0F00, { 0x00, 0x7F }, -1, { -1, -1 }, 0x0FFF, 0xF000FF, 0x008000, { 0x008000, 0xEFFFFF }, { 0x200000, 0x200007 }, { 0x300000, 0x30000D }, { 0xF00000, 0xF000FF }, 0x0000, "p18f452.inc" , "18f452_g.lkr" , 0 },
{ PROC_CLASS_PIC16E , "__18F458" , { "pic18f458" , "p18f458" , "18f458" }, 0x8458, 0, 16, 0x0F00, { 0x00, 0x5F }, -1, { -1, -1 }, 0x0FFF, 0xF000FF, 0x008000, { 0x008000, 0xEFFFFF }, { 0x200000, 0x200007 }, { 0x300000, 0x30000D }, { 0xF00000, 0xF000FF }, 0x0000, "p18f458.inc" , "18f458_g.lkr" , 0 },
{ PROC_CLASS_PIC16E , "__18F1220" , { "pic18f1220" , "p18f1220" , "18f1220" }, 0xA122, 0, 16, 0x0F00, { 0x00, 0x7F }, -1, { -1, -1 }, 0x0FFF, 0xF000FF, 0x001000, { 0x001000, 0xEFFFFF }, { 0x200000, 0x200007 }, { 0x300000, 0x30000D }, { 0xF00000, 0xF000FF }, 0x0000, "p18f1220.inc" , "18f1220_g.lkr" , 0 },
{ PROC_CLASS_PIC16E , "__18F1230" , { "pic18f1230" , "p18f1230" , "18f1230" }, 0x1230, 0, 16, 0x0F00, { 0x00, 0x7F }, -1, { -1, -1 }, 0x0FFF, 0xF0007F, 0x001000, { 0x001000, 0xEFFFFF }, { 0x200000, 0x200007 }, { 0x300000, 0x30000D }, { 0xF00000, 0xF0007F }, 0x0000, "p18f1230.inc" , "18f1230_g.lkr" , CPU_HAVE_EXTINST },
{ PROC_CLASS_PIC16E , "__18F1320" , { "pic18f1320" , "p18f1320" , "18f1320" }, 0xA132, 0, 16, 0x0F00, { 0x00, 0x7F }, -1, { -1, -1 }, 0x0FFF, 0xF000FF, 0x002000, { 0x002000, 0xEFFFFF }, { 0x200000, 0x200007 }, { 0x300000, 0x30000D }, { 0xF00000, 0xF000FF }, 0x0000, "p18f1320.inc" , "18f1320_g.lkr" , 0 },
{ PROC_CLASS_PIC16E , "__18F1330" , { "pic18f1330" , "p18f1330" , "18f1330" }, 0x1330, 0, 16, 0x0F00, { 0x00, 0x7F }, -1, { -1, -1 }, 0x0FFF, 0xF0007F, 0x002000, { 0x002000, 0xEFFFFF }, { 0x200000, 0x200007 }, { 0x300000, 0x30000D }, { 0xF00000, 0xF0007F }, 0x0000, "p18f1330.inc" , "18f1330_g.lkr" , CPU_HAVE_EXTINST },
{ PROC_CLASS_PIC16E , "__18F2220" , { "pic18f2220" , "p18f2220" , "18f2220" }, 0xA222, 0, 16, 0x0F00, { 0x00, 0x7F }, -1, { -1, -1 }, 0x0FFF, 0xF000FF, 0x001000, { 0x001000, 0xEFFFFF }, { 0x200000, 0x200007 }, { 0x300000, 0x30000D }, { 0xF00000, 0xF000FF }, 0x0000, "p18f2220.inc" , "18f2220_g.lkr" , 0 },
{ PROC_CLASS_PIC16E , "__18F2221" , { "pic18f2221" , "p18f2221" , "18f2221" }, 0x2221, 0, 16, 0x0F00, { 0x00, 0x7F }, -1, { -1, -1 }, 0x0FFF, 0xF000FF, 0x001000, { 0x001000, 0xEFFFFF }, { 0x200000, 0x200007 }, { 0x300000, 0x30000D }, { 0xF00000, 0xF000FF }, 0x0000, "p18f2221.inc" , "18f2221_g.lkr" , CPU_HAVE_EXTINST },
{ PROC_CLASS_PIC16E , "__18F2320" , { "pic18f2320" , "p18f2320" , "18f2320" }, 0xA232, 0, 16, 0x0F00, { 0x00, 0x7F }, -1, { -1, -1 }, 0x0FFF, 0xF000FF, 0x002000, { 0x002000, 0xEFFFFF }, { 0x200000, 0x200007 }, { 0x300000, 0x30000D }, { 0xF00000, 0xF000FF }, 0x0000, "p18f2320.inc" , "18f2320_g.lkr" , 0 },
{ PROC_CLASS_PIC16E , "__18F2321" , { "pic18f2321" , "p18f2321" , "18f2321" }, 0x2321, 0, 16, 0x0F00, { 0x00, 0x7F }, -1, { -1, -1 }, 0x0FFF, 0xF000FF, 0x002000, { 0x002000, 0xEFFFFF }, { 0x200000, 0x200007 }, { 0x300000, 0x30000D }, { 0xF00000, 0xF000FF }, 0x0000, "p18f2321.inc" , "18f2321_g.lkr" , CPU_HAVE_EXTINST },
{ PROC_CLASS_PIC16E , "__18F2331" , { "pic18f2331" , "p18f2331" , "18f2331" }, 0x2331, 0, 16, 0x0F00, { 0x00, 0x5F }, -1, { -1, -1 }, 0x0FFF, 0xF000FF, 0x002000, { 0x002000, 0xEFFFFF }, { 0x200000, 0x200007 }, { 0x300000, 0x30000D }, { 0xF00000, 0xF000FF }, 0x0000, "p18f2331.inc" , "18f2331_g.lkr" , 0 },
{ PROC_CLASS_PIC16E , "__18F2410" , { "pic18f2410" , "p18f2410" , "18f2410" }, 0x2410, 0, 16, 0x0F00, { 0x00, 0x7F }, -1, { -1, -1 }, 0x0FFF, 0x003FFF, 0x004000, { -1, -1 }, { 0x200000, 0x200007 }, { 0x300000, 0x30000D }, { -1, -1 }, 0x0000, "p18f2410.inc" , "18f2410_g.lkr" , CPU_HAVE_EXTINST },
{ PROC_CLASS_PIC16E , "__18F2420" , { "pic18f2420" , "p18f2420" , "18f2420" }, 0x2420, 0, 16, 0x0F00, { 0x00, 0x7F }, -1, { -1, -1 }, 0x0FFF, 0xF000FF, 0x004000, { 0x004000, 0xEFFFFF }, { 0x200000, 0x200007 }, { 0x300000, 0x30000D }, { 0xF00000, 0xF000FF }, 0x0000, "p18f2420.inc" , "18f2420_g.lkr" , CPU_HAVE_EXTINST },
{ PROC_CLASS_PIC16E , "__18F2423" , { "pic18f2423" , "p18f2423" , "18f2423" }, 0x2423, 0, 16, 0x0F00, { 0x00, 0x7F }, -1, { -1, -1 }, 0x0FFF, 0xF000FF, 0x004000, { 0x004000, 0xEFFFFF }, { 0x200000, 0x200007 }, { 0x300000, 0x30000D }, { 0xF00000, 0xF000FF }, 0x0000, "p18f2423.inc" , "18f2423_g.lkr" , CPU_HAVE_EXTINST },
{ PROC_CLASS_PIC16E , "__18F2431" , { "pic18f2431" , "p18f2431" , "18f2431" }, 0x2431, 0, 16, 0x0F00, { 0x00, 0x5F }, -1, { -1, -1 }, 0x0FFF, 0xF000FF, 0x004000, { 0x004000, 0xEFFFFF }, { 0x200000, 0x200007 }, { 0x300000, 0x30000D }, { 0xF00000, 0xF000FF }, 0x0000, "p18f2431.inc" , "18f2431_g.lkr" , 0 },
{ PROC_CLASS_PIC16E , "__18F2439" , { "pic18f2439" , "p18f2439" , "18f2439" }, 0x2439, 0, 16, 0x0F00, { 0x00, 0x7F }, -1, { -1, -1 }, 0x0FFF, 0xF000FF, 0x003000, { 0x003000, 0xEFFFFF }, { 0x200000, 0x200007 }, { 0x300000, 0x30000D }, { 0xF00000, 0xF000FF }, 0x0000, "p18f2439.inc" , "18f2439_g.lkr" , 0 },
{ PROC_CLASS_PIC16E , "__18F2450" , { "pic18f2450" , "p18f2450" , "18f2450" }, 0x2450, 0, 16, 0x0F00, { 0x00, 0x5F }, -1, { -1, -1 }, 0x0FFF, 0x003FFF, 0x004000, { -1, -1 }, { 0x200000, 0x200007 }, { 0x300000, 0x30000D }, { -1, -1 }, 0x0000, "p18f2450.inc" , "18f2450_g.lkr" , CPU_HAVE_EXTINST },
{ PROC_CLASS_PIC16E , "__18F2455" , { "pic18f2455" , "p18f2455" , "18f2455" }, 0x2455, 0, 16, 0x0F00, { 0x00, 0x5F }, -1, { -1, -1 }, 0x0FFF, 0xF000FF, 0x006000, { 0x006000, 0xEFFFFF }, { 0x200000, 0x200007 }, { 0x300000, 0x30000D }, { 0xF00000, 0xF000FF }, 0x0000, "p18f2455.inc" , "18f2455_g.lkr" , CPU_HAVE_EXTINST },
{ PROC_CLASS_PIC16E , "__18F2458" , { "pic18f2458" , "p18f2458" , "18f2458" }, 0x2458, 0, 16, 0x0F00, { 0x00, 0x5F }, -1, { -1, -1 }, 0x0FFF, 0xF000FF, 0x006000, { 0x006000, 0xEFFFFF }, { 0x200000, 0x200007 }, { 0x300000, 0x30000D }, { 0xF00000, 0xF000FF }, 0x0000, "p18f2458.inc" , "18f2458_g.lkr" , CPU_HAVE_EXTINST },
{ PROC_CLASS_PIC16E , "__18F2480" , { "pic18f2480" , "p18f2480" , "18f2480" }, 0x2480, 0, 16, 0x0F00, { 0x00, 0x5F }, -1, { -1, -1 }, 0x0FFF, 0xF000FF, 0x004000, { 0x004000, 0xEFFFFF }, { 0x200000, 0x200007 }, { 0x300000, 0x30000D }, { 0xF00000, 0xF000FF }, 0x0000, "p18f2480.inc" , "18f2480_g.lkr" , CPU_HAVE_EXTINST },
{ PROC_CLASS_PIC16E , "__18F2510" , { "pic18f2510" , "p18f2510" , "18f2510" }, 0x2510, 0, 16, 0x0F00, { 0x00, 0x7F }, -1, { -1, -1 }, 0x0FFF, 0x007FFF, 0x008000, { -1, -1 }, { 0x200000, 0x200007 }, { 0x300000, 0x30000D }, { -1, -1 }, 0x0000, "p18f2510.inc" , "18f2510_g.lkr" , CPU_HAVE_EXTINST },
{ PROC_CLASS_PIC16E , "__18F2515" , { "pic18f2515" , "p18f2515" , "18f2515" }, 0x2515, 0, 16, 0x0F00, { 0x00, 0x7F }, -1, { -1, -1 }, 0x0FFF, 0x00BFFF, 0x00C000, { -1, -1 }, { 0x200000, 0x200007 }, { 0x300000, 0x30000D }, { -1, -1 }, 0x0000, "p18f2515.inc" , "18f2515_g.lkr" , CPU_HAVE_EXTINST },
{ PROC_CLASS_PIC16E , "__18F2520" , { "pic18f2520" , "p18f2520" , "18f2520" }, 0x2520, 0, 16, 0x0F00, { 0x00, 0x7F }, -1, { -1, -1 }, 0x0FFF, 0xF000FF, 0x008000, { 0x008000, 0xEFFFFF }, { 0x200000, 0x200007 }, { 0x300000, 0x30000D }, { 0xF00000, 0xF000FF }, 0x0000, "p18f2520.inc" , "18f2520_g.lkr" , CPU_HAVE_EXTINST },
{ PROC_CLASS_PIC16E , "__18F2523" , { "pic18f2523" , "p18f2523" , "18f2523" }, 0x2523, 0, 16, 0x0F00, { 0x00, 0x7F }, -1, { -1, -1 }, 0x0FFF, 0xF000FF, 0x008000, { 0x008000, 0xEFFFFF }, { 0x200000, 0x200007 }, { 0x300000, 0x30000D }, { 0xF00000, 0xF000FF }, 0x0000, "p18f2523.inc" , "18f2523_g.lkr" , CPU_HAVE_EXTINST },
{ PROC_CLASS_PIC16E , "__18F2525" , { "pic18f2525" , "p18f2525" , "18f2525" }, 0x2525, 0, 16, 0x0F00, { 0x00, 0x7F }, -1, { -1, -1 }, 0x0FFF, 0xF003FF, 0x00C000, { 0x00C000, 0xEFFFFF }, { 0x200000, 0x200007 }, { 0x300000, 0x30000D }, { 0xF00000, 0xF003FF }, 0x0000, "p18f2525.inc" , "18f2525_g.lkr" , CPU_HAVE_EXTINST },
{ PROC_CLASS_PIC16E , "__18F2539" , { "pic18f2539" , "p18f2539" , "18f2539" }, 0x2539, 0, 16, 0x0F00, { 0x00, 0x7F }, -1, { -1, -1 }, 0x0FFF, 0xF000FF, 0x006000, { 0x006000, 0xEFFFFF }, { 0x200000, 0x200007 }, { 0x300000, 0x30000D }, { 0xF00000, 0xF000FF }, 0x0000, "p18f2539.inc" , "18f2539_g.lkr" , 0 },
{ PROC_CLASS_PIC16E , "__18F2550" , { "pic18f2550" , "p18f2550" , "18f2550" }, 0x2550, 0, 16, 0x0F00, { 0x00, 0x5F }, -1, { -1, -1 }, 0x0FFF, 0xF000FF, 0x008000, { 0x008000, 0xEFFFFF }, { 0x200000, 0x200007 }, { 0x300000, 0x30000D }, { 0xF00000, 0xF000FF }, 0x0000, "p18f2550.inc" , "18f2550_g.lkr" , CPU_HAVE_EXTINST },
{ PROC_CLASS_PIC16E , "__18F2553" , { "pic18f2553" , "p18f2553" , "18f2553" }, 0x2553, 0, 16, 0x0F00, { 0x00, 0x5F }, -1, { -1, -1 }, 0x0FFF, 0xF000FF, 0x008000, { 0x008000, 0xEFFFFF }, { 0x200000, 0x200007 }, { 0x300000, 0x30000D }, { 0xF00000, 0xF000FF }, 0x0000, "p18f2553.inc" , "18f2553_g.lkr" , CPU_HAVE_EXTINST },
{ PROC_CLASS_PIC16E , "__18F2580" , { "pic18f2580" , "p18f2580" , "18f2580" }, 0x2580, 0, 16, 0x0F00, { 0x00, 0x5F }, -1, { -1, -1 }, 0x0FFF, 0xF000FF, 0x008000, { 0x008000, 0xEFFFFF }, { 0x200000, 0x200007 }, { 0x300000, 0x30000D }, { 0xF00000, 0xF000FF }, 0x0000, "p18f2580.inc" , "18f2580_g.lkr" , CPU_HAVE_EXTINST },
{ PROC_CLASS_PIC16E , "__18F2585" , { "pic18f2585" , "p18f2585" , "18f2585" }, 0x2585, 0, 16, 0x0F00, { 0x00, 0x5F }, -1, { -1, -1 }, 0x0FFF, 0xF003FF, 0x00C000, { 0x00C000, 0xEFFFFF }, { 0x200000, 0x200007 }, { 0x300000, 0x30000D }, { 0xF00000, 0xF003FF }, 0x0000, "p18f2585.inc" , "18f2585_g.lkr" , CPU_HAVE_EXTINST },
{ PROC_CLASS_PIC16E , "__18F2610" , { "pic18f2610" , "p18f2610" , "18f2610" }, 0x2610, 0, 16, 0x0F00, { 0x00, 0x7F }, -1, { -1, -1 }, 0x0FFF, 0x00FFFF, 0x010000, { -1, -1 }, { 0x200000, 0x200007 }, { 0x300000, 0x30000D }, { -1, -1 }, 0x0000, "p18f2610.inc" , "18f2610_g.lkr" , CPU_HAVE_EXTINST },
{ PROC_CLASS_PIC16E , "__18F2620" , { "pic18f2620" , "p18f2620" , "18f2620" }, 0x2620, 0, 16, 0x0F00, { 0x00, 0x7F }, -1, { -1, -1 }, 0x0FFF, 0xF003FF, 0x010000, { 0x010000, 0xEFFFFF }, { 0x200000, 0x200007 }, { 0x300000, 0x30000D }, { 0xF00000, 0xF003FF }, 0x0000, "p18f2620.inc" , "18f2620_g.lkr" , CPU_HAVE_EXTINST },
{ PROC_CLASS_PIC16E , "__18F2680" , { "pic18f2680" , "p18f2680" , "18f2680" }, 0x2680, 0, 16, 0x0F00, { 0x00, 0x5F }, -1, { -1, -1 }, 0x0FFF, 0xF003FF, 0x010000, { 0x010000, 0xEFFFFF }, { 0x200000, 0x200007 }, { 0x300000, 0x30000D }, { 0xF00000, 0xF003FF }, 0x0000, "p18f2680.inc" , "18f2680_g.lkr" , CPU_HAVE_EXTINST },
{ PROC_CLASS_PIC16E , "__18F2681" , { "pic18f2681" , "p18f2681" , "18f2681" }, 0x2681, 0, 16, 0x0F00, { 0x00, 0x5F }, -1, { -1, -1 }, -1, -1, -1, { -1, -1 }, { 0x200000, 0x200007 }, { -1, -1 }, { 0xF00000, 0xF003FF }, 0x0000, "p18f2681.inc" , "18f2681.lkr" , CPU_HAVE_EXTINST }, /* not documented by Microchip, added in svn rev. #317, see http://osdir.com/ml/hardware.microcontrollers.gnupic/2008-05/msg00013.html */
{ PROC_CLASS_PIC16E , "__18F2682" , { "pic18f2682" , "p18f2682" , "18f2682" }, 0x2682, 0, 16, 0x0F00, { 0x00, 0x5F }, -1, { -1, -1 }, 0x0FFF, 0xF003FF, 0x014000, { 0x014000, 0xEFFFFF }, { 0x200000, 0x200007 }, { 0x300000, 0x30000D }, { 0xF00000, 0xF003FF }, 0x0000, "p18f2682.inc" , "18f2682_g.lkr" , CPU_HAVE_EXTINST },
{ PROC_CLASS_PIC16E , "__18F2685" , { "pic18f2685" , "p18f2685" , "18f2685" }, 0x2685, 0, 16, 0x0F00, { 0x00, 0x5F }, -1, { -1, -1 }, 0x0FFF, 0xF003FF, 0x018000, { 0x018000, 0xEFFFFF }, { 0x200000, 0x200007 }, { 0x300000, 0x30000D }, { 0xF00000, 0xF003FF }, 0x0000, "p18f2685.inc" , "18f2685_g.lkr" , CPU_HAVE_EXTINST },
{ PROC_CLASS_PIC16E , "__18F4220" , { "pic18f4220" , "p18f4220" , "18f4220" }, 0xA422, 0, 16, 0x0F00, { 0x00, 0x7F }, -1, { -1, -1 }, 0x0FFF, 0xF000FF, 0x001000, { 0x001000, 0xEFFFFF }, { 0x200000, 0x200007 }, { 0x300000, 0x30000D }, { 0xF00000, 0xF000FF }, 0x0000, "p18f4220.inc" , "18f4220_g.lkr" , 0 },
{ PROC_CLASS_PIC16E , "__18F4221" , { "pic18f4221" , "p18f4221" , "18f4221" }, 0x4221, 0, 16, 0x0F00, { 0x00, 0x7F }, -1, { -1, -1 }, 0x0FFF, 0xF000FF, 0x001000, { 0x001000, 0xEFFFFF }, { 0x200000, 0x200007 }, { 0x300000, 0x30000D }, { 0xF00000, 0xF000FF }, 0x0000, "p18f4221.inc" , "18f4221_g.lkr" , CPU_HAVE_EXTINST },
{ PROC_CLASS_PIC16E , "__18F4320" , { "pic18f4320" , "p18f4320" , "18f4320" }, 0xA432, 0, 16, 0x0F00, { 0x00, 0x7F }, -1, { -1, -1 }, 0x0FFF, 0xF000FF, 0x002000, { 0x002000, 0xEFFFFF }, { 0x200000, 0x200007 }, { 0x300000, 0x30000D }, { 0xF00000, 0xF000FF }, 0x0000, "p18f4320.inc" , "18f4320_g.lkr" , 0 },
{ PROC_CLASS_PIC16E , "__18F4321" , { "pic18f4321" , "p18f4321" , "18f4321" }, 0x4321, 0, 16, 0x0F00, { 0x00, 0x7F }, -1, { -1, -1 }, 0x0FFF, 0xF000FF, 0x002000, { 0x002000, 0xEFFFFF }, { 0x200000, 0x200007 }, { 0x300000, 0x30000D }, { 0xF00000, 0xF000FF }, 0x0000, "p18f4321.inc" , "18f4321_g.lkr" , CPU_HAVE_EXTINST },
{ PROC_CLASS_PIC16E , "__18F4331" , { "pic18f4331" , "p18f4331" , "18f4331" }, 0x4331, 0, 16, 0x0F00, { 0x00, 0x5F }, -1, { -1, -1 }, 0x0FFF, 0xF000FF, 0x002000, { 0x002000, 0xEFFFFF }, { 0x200000, 0x200007 }, { 0x300000, 0x30000D }, { 0xF00000, 0xF000FF }, 0x0000, "p18f4331.inc" , "18f4331_g.lkr" , 0 },
{ PROC_CLASS_PIC16E , "__18F4410" , { "pic18f4410" , "p18f4410" , "18f4410" }, 0x4410, 0, 16, 0x0F00, { 0x00, 0x7F }, -1, { -1, -1 }, 0x0FFF, 0x003FFF, 0x004000, { -1, -1 }, { 0x200000, 0x200007 }, { 0x300000, 0x30000D }, { -1, -1 }, 0x0000, "p18f4410.inc" , "18f4410_g.lkr" , CPU_HAVE_EXTINST },
{ PROC_CLASS_PIC16E , "__18F4420" , { "pic18f4420" , "p18f4420" , "18f4420" }, 0x4420, 0, 16, 0x0F00, { 0x00, 0x7F }, -1, { -1, -1 }, 0x0FFF, 0xF000FF, 0x004000, { 0x004000, 0xEFFFFF }, { 0x200000, 0x200007 }, { 0x300000, 0x30000D }, { 0xF00000, 0xF000FF }, 0x0000, "p18f4420.inc" , "18f4420_g.lkr" , CPU_HAVE_EXTINST },
{ PROC_CLASS_PIC16E , "__18F4423" , { "pic18f4423" , "p18f4423" , "18f4423" }, 0x4423, 0, 16, 0x0F00, { 0x00, 0x7F }, -1, { -1, -1 }, 0x0FFF, 0xF000FF, 0x004000, { 0x004000, 0xEFFFFF }, { 0x200000, 0x200007 }, { 0x300000, 0x30000D }, { 0xF00000, 0xF000FF }, 0x0000, "p18f4423.inc" , "18f4423_g.lkr" , CPU_HAVE_EXTINST },
{ PROC_CLASS_PIC16E , "__18F4431" , { "pic18f4431" , "p18f4431" , "18f4431" }, 0x4431, 0, 16, 0x0F00, { 0x00, 0x5F }, -1, { -1, -1 }, 0x0FFF, 0xF000FF, 0x004000, { 0x004000, 0xEFFFFF }, { 0x200000, 0x200007 }, { 0x300000, 0x30000D }, { 0xF00000, 0xF000FF }, 0x0000, "p18f4431.inc" , "18f4431_g.lkr" , 0 },
{ PROC_CLASS_PIC16E , "__18F4439" , { "pic18f4439" , "p18f4439" , "18f4439" }, 0x4439, 0, 16, 0x0F00, { 0x00, 0x7F }, -1, { -1, -1 }, 0x0FFF, 0xF000FF, 0x003000, { 0x003000, 0xEFFFFF }, { 0x200000, 0x200007 }, { 0x300000, 0x30000D }, { 0xF00000, 0xF000FF }, 0x0000, "p18f4439.inc" , "18f4439_g.lkr" , 0 },
{ PROC_CLASS_PIC16E , "__18F4450" , { "pic18f4450" , "p18f4450" , "18f4450" }, 0x4450, 0, 16, 0x0F00, { 0x00, 0x5F }, -1, { -1, -1 }, 0x0FFF, 0x003FFF, 0x004000, { -1, -1 }, { 0x200000, 0x200007 }, { 0x300000, 0x30000D }, { -1, -1 }, 0x0000, "p18f4450.inc" , "18f4450_g.lkr" , CPU_HAVE_EXTINST },
{ PROC_CLASS_PIC16E , "__18F4455" , { "pic18f4455" , "p18f4455" , "18f4455" }, 0x4455, 0, 16, 0x0F00, { 0x00, 0x5F }, -1, { -1, -1 }, 0x0FFF, 0xF000FF, 0x006000, { 0x006000, 0xEFFFFF }, { 0x200000, 0x200007 }, { 0x300000, 0x30000D }, { 0xF00000, 0xF000FF }, 0x0000, "p18f4455.inc" , "18f4455_g.lkr" , CPU_HAVE_EXTINST },
{ PROC_CLASS_PIC16E , "__18F4458" , { "pic18f4458" , "p18f4458" , "18f4458" }, 0x4458, 0, 16, 0x0F00, { 0x00, 0x5F }, -1, { -1, -1 }, 0x0FFF, 0xF000FF, 0x006000, { 0x006000, 0xEFFFFF }, { 0x200000, 0x200007 }, { 0x300000, 0x30000D }, { 0xF00000, 0xF000FF }, 0x0000, "p18f4458.inc" , "18f4458_g.lkr" , CPU_HAVE_EXTINST },
{ PROC_CLASS_PIC16E , "__18F4480" , { "pic18f4480" , "p18f4480" , "18f4480" }, 0x4480, 0, 16, 0x0F00, { 0x00, 0x5F }, -1, { -1, -1 }, 0x0FFF, 0xF000FF, 0x004000, { 0x004000, 0xEFFFFF }, { 0x200000, 0x200007 }, { 0x300000, 0x30000D }, { 0xF00000, 0xF000FF }, 0x0000, "p18f4480.inc" , "18f4480_g.lkr" , CPU_HAVE_EXTINST },
{ PROC_CLASS_PIC16E , "__18F4510" , { "pic18f4510" , "p18f4510" , "18f4510" }, 0x4510, 0, 16, 0x0F00, { 0x00, 0x7F }, -1, { -1, -1 }, 0x0FFF, 0x007FFF, 0x008000, { -1, -1 }, { 0x200000, 0x200007 }, { 0x300000, 0x30000D }, { -1, -1 }, 0x0000, "p18f4510.inc" , "18f4510_g.lkr" , CPU_HAVE_EXTINST },
{ PROC_CLASS_PIC16E , "__18F4515" , { "pic18f4515" , "p18f4515" , "18f4515" }, 0x4515, 0, 16, 0x0F00, { 0x00, 0x7F }, -1, { -1, -1 }, 0x0FFF, 0x00BFFF, 0x00C000, { -1, -1 }, { 0x200000, 0x200007 }, { 0x300000, 0x30000D }, { -1, -1 }, 0x0000, "p18f4515.inc" , "18f4515_g.lkr" , CPU_HAVE_EXTINST },
{ PROC_CLASS_PIC16E , "__18F4520" , { "pic18f4520" , "p18f4520" , "18f4520" }, 0x4520, 0, 16, 0x0F00, { 0x00, 0x7F }, -1, { -1, -1 }, 0x0FFF, 0xF000FF, 0x008000, { 0x008000, 0xEFFFFF }, { 0x200000, 0x200007 }, { 0x300000, 0x30000D }, { 0xF00000, 0xF000FF }, 0x0000, "p18f4520.inc" , "18f4520_g.lkr" , CPU_HAVE_EXTINST },
{ PROC_CLASS_PIC16E , "__18F4523" , { "pic18f4523" , "p18f4523" , "18f4523" }, 0x4523, 0, 16, 0x0F00, { 0x00, 0x7F }, -1, { -1, -1 }, 0x0FFF, 0xF000FF, 0x008000, { 0x008000, 0xEFFFFF }, { 0x200000, 0x200007 }, { 0x300000, 0x30000D }, { 0xF00000, 0xF000FF }, 0x0000, "p18f4523.inc" , "18f4523_g.lkr" , CPU_HAVE_EXTINST },
{ PROC_CLASS_PIC16E , "__18F4525" , { "pic18f4525" , "p18f4525" , "18f4525" }, 0x4525, 0, 16, 0x0F00, { 0x00, 0x7F }, -1, { -1, -1 }, 0x0FFF, 0xF003FF, 0x00C000, { 0x00C000, 0xEFFFFF }, { 0x200000, 0x200007 }, { 0x300000, 0x30000D }, { 0xF00000, 0xF003FF }, 0x0000, "p18f4525.inc" , "18f4525_g.lkr" , CPU_HAVE_EXTINST },
{ PROC_CLASS_PIC16E , "__18F4539" , { "pic18f4539" , "p18f4539" , "18f4539" }, 0x4539, 0, 16, 0x0F00, { 0x00, 0x7F }, -1, { -1, -1 }, 0x0FFF, 0xF000FF, 0x006000, { 0x006000, 0xEFFFFF }, { 0x200000, 0x200007 }, { 0x300000, 0x30000D }, { 0xF00000, 0xF000FF }, 0x0000, "p18f4539.inc" , "18f4539_g.lkr" , 0 },
{ PROC_CLASS_PIC16E , "__18F4550" , { "pic18f4550" , "p18f4550" , "18f4550" }, 0x4550, 0, 16, 0x0F00, { 0x00, 0x5F }, -1, { -1, -1 }, 0x0FFF, 0xF000FF, 0x008000, { 0x008000, 0xEFFFFF }, { 0x200000, 0x200007 }, { 0x300000, 0x30000D }, { 0xF00000, 0xF000FF }, 0x0000, "p18f4550.inc" , "18f4550_g.lkr" , CPU_HAVE_EXTINST },
{ PROC_CLASS_PIC16E , "__18F4553" , { "pic18f4553" , "p18f4553" , "18f4553" }, 0x4553, 0, 16, 0x0F00, { 0x00, 0x5F }, -1, { -1, -1 }, 0x0FFF, 0xF000FF, 0x008000, { 0x008000, 0xEFFFFF }, { 0x200000, 0x200007 }, { 0x300000, 0x30000D }, { 0xF00000, 0xF000FF }, 0x0000, "p18f4553.inc" , "18f4553_g.lkr" , CPU_HAVE_EXTINST },
{ PROC_CLASS_PIC16E , "__18F4580" , { "pic18f4580" , "p18f4580" , "18f4580" }, 0x4580, 0, 16, 0x0F00, { 0x00, 0x5F }, -1, { -1, -1 }, 0x0FFF, 0xF000FF, 0x008000, { 0x008000, 0xEFFFFF }, { 0x200000, 0x200007 }, { 0x300000, 0x30000D }, { 0xF00000, 0xF000FF }, 0x0000, "p18f4580.inc" , "18f4580_g.lkr" , CPU_HAVE_EXTINST },
{ PROC_CLASS_PIC16E , "__18F4585" , { "pic18f4585" , "p18f4585" , "18f4585" }, 0x4585, 0, 16, 0x0F00, { 0x00, 0x5F }, -1, { -1, -1 }, 0x0FFF, 0xF003FF, 0x00C000, { 0x00C000, 0xEFFFFF }, { 0x200000, 0x200007 }, { 0x300000, 0x30000D }, { 0xF00000, 0xF003FF }, 0x0000, "p18f4585.inc" , "18f4585_g.lkr" , CPU_HAVE_EXTINST },
{ PROC_CLASS_PIC16E , "__18F4610" , { "pic18f4610" , "p18f4610" , "18f4610" }, 0x4610, 0, 16, 0x0F00, { 0x00, 0x7F }, -1, { -1, -1 }, 0x0FFF, 0x00FFFF, 0x010000, { -1, -1 }, { 0x200000, 0x200007 }, { 0x300000, 0x30000D }, { -1, -1 }, 0x0000, "p18f4610.inc" , "18f4610_g.lkr" , CPU_HAVE_EXTINST },
{ PROC_CLASS_PIC16E , "__18F4620" , { "pic18f4620" , "p18f4620" , "18f4620" }, 0x4620, 0, 16, 0x0F00, { 0x00, 0x7F }, -1, { -1, -1 }, 0x0FFF, 0xF003FF, 0x010000, { 0x010000, 0xEFFFFF }, { 0x200000, 0x200007 }, { 0x300000, 0x30000D }, { 0xF00000, 0xF003FF }, 0x0000, "p18f4620.inc" , "18f4620_g.lkr" , CPU_HAVE_EXTINST },
{ PROC_CLASS_PIC16E , "__18F4680" , { "pic18f4680" , "p18f4680" , "18f4680" }, 0x4680, 0, 16, 0x0F00, { 0x00, 0x5F }, -1, { -1, -1 }, 0x0FFF, 0xF003FF, 0x010000, { 0x010000, 0xEFFFFF }, { 0x200000, 0x200007 }, { 0x300000, 0x30000D }, { 0xF00000, 0xF003FF }, 0x0000, "p18f4680.inc" , "18f4680_g.lkr" , CPU_HAVE_EXTINST },
{ PROC_CLASS_PIC16E , "__18F4681" , { "pic18f4681" , "p18f4681" , "18f4681" }, 0x4681, 0, 16, 0x0F00, { 0x00, 0x5F }, -1, { -1, -1 }, -1, -1, -1, { -1, -1 }, { 0x200000, 0x200007 }, { -1, -1 }, { 0xF00000, 0xF003FF }, 0x0000, "p18f4681.inc" , "18f4681.lkr" , CPU_HAVE_EXTINST }, /* not documented by Microchip, added in svn rev. #317, see http://osdir.com/ml/hardware.microcontrollers.gnupic/2008-05/msg00013.html */
{ PROC_CLASS_PIC16E , "__18F4682" , { "pic18f4682" , "p18f4682" , "18f4682" }, 0x4682, 0, 16, 0x0F00, { 0x00, 0x5F }, -1, { -1, -1 }, 0x0FFF, 0xF003FF, 0x014000, { 0x014000, 0xEFFFFF }, { 0x200000, 0x200007 }, { 0x300000, 0x30000D }, { 0xF00000, 0xF003FF }, 0x0000, "p18f4682.inc" , "18f4682_g.lkr" , CPU_HAVE_EXTINST },
{ PROC_CLASS_PIC16E , "__18F4685" , { "pic18f4685" , "p18f4685" , "18f4685" }, 0x4685, 0, 16, 0x0F00, { 0x00, 0x5F }, -1, { -1, -1 }, 0x0FFF, 0xF003FF, 0x018000, { 0x018000, 0xEFFFFF }, { 0x200000, 0x200007 }, { 0x300000, 0x30000D }, { 0xF00000, 0xF003FF }, 0x0000, "p18f4685.inc" , "18f4685_g.lkr" , CPU_HAVE_EXTINST },
{ PROC_CLASS_PIC16E , "__18F6310" , { "pic18f6310" , "p18f6310" , "18f6310" }, 0x6310, 0, 16, 0x0F00, { 0x00, 0x5F }, -1, { -1, -1 }, 0x0FFF, 0x001FFF, 0x002000, { -1, -1 }, { 0x200000, 0x200007 }, { 0x300000, 0x30000D }, { -1, -1 }, 0x0000, "p18f6310.inc" , "18f6310_g.lkr" , CPU_HAVE_EXTINST },
{ PROC_CLASS_PIC16E , "__18F6390" , { "pic18f6390" , "p18f6390" , "18f6390" }, 0x6390, 0, 16, 0x0F00, { 0x00, 0x5F }, -1, { -1, -1 }, 0x0FFF, 0x001FFF, 0x002000, { -1, -1 }, { 0x200000, 0x200007 }, { 0x300000, 0x30000D }, { -1, -1 }, 0x0000, "p18f6390.inc" , "18f6390_g.lkr" , CPU_HAVE_EXTINST },
{ PROC_CLASS_PIC16E , "__18F6393" , { "pic18f6393" , "p18f6393" , "18f6393" }, 0x6393, 0, 16, 0x0F00, { 0x00, 0x5F }, -1, { -1, -1 }, 0x0FFF, 0x001FFF, 0x002000, { -1, -1 }, { 0x200000, 0x200007 }, { 0x300000, 0x30000D }, { -1, -1 }, 0x0000, "p18f6393.inc" , "18f6393_g.lkr" , CPU_HAVE_EXTINST },
{ PROC_CLASS_PIC16E , "__18F6410" , { "pic18f6410" , "p18f6410" , "18f6410" }, 0x6410, 0, 16, 0x0F00, { 0x00, 0x5F }, -1, { -1, -1 }, 0x0FFF, 0x003FFF, 0x004000, { -1, -1 }, { 0x200000, 0x200007 }, { 0x300000, 0x30000D }, { -1, -1 }, 0x0000, "p18f6410.inc" , "18f6410_g.lkr" , CPU_HAVE_EXTINST },
{ PROC_CLASS_PIC16E , "__18F6490" , { "pic18f6490" , "p18f6490" , "18f6490" }, 0x6490, 0, 16, 0x0F00, { 0x00, 0x5F }, -1, { -1, -1 }, 0x0FFF, 0x003FFF, 0x004000, { -1, -1 }, { 0x200000, 0x200007 }, { 0x300000, 0x30000D }, { -1, -1 }, 0x0000, "p18f6490.inc" , "18f6490_g.lkr" , CPU_HAVE_EXTINST },
{ PROC_CLASS_PIC16E , "__18F6493" , { "pic18f6493" , "p18f6493" , "18f6493" }, 0x6493, 0, 16, 0x0F00, { 0x00, 0x5F }, -1, { -1, -1 }, 0x0FFF, 0x003FFF, 0x004000, { -1, -1 }, { 0x200000, 0x200007 }, { 0x300000, 0x30000D }, { -1, -1 }, 0x0000, "p18f6493.inc" , "18f6493_g.lkr" , CPU_HAVE_EXTINST },
{ PROC_CLASS_PIC16E , "__18F6520" , { "pic18f6520" , "p18f6520" , "18f6520" }, 0xA652, 0, 16, 0x0F00, { 0x00, 0x5F }, -1, { -1, -1 }, 0x0FFF, 0xF003FF, 0x008000, { 0x008000, 0xEFFFFF }, { 0x200000, 0x200007 }, { 0x300000, 0x30000D }, { 0xF00000, 0xF003FF }, 0x0000, "p18f6520.inc" , "18f6520_g.lkr" , 0 },
{ PROC_CLASS_PIC16E , "__18F6525" , { "pic18f6525" , "p18f6525" , "18f6525" }, 0x6525, 0, 16, 0x0F00, { 0x00, 0x5F }, -1, { -1, -1 }, 0x0FFF, 0xF003FF, 0x00C000, { 0x00C000, 0xEFFFFF }, { 0x200000, 0x200007 }, { 0x300000, 0x30000D }, { 0xF00000, 0xF003FF }, 0x0000, "p18f6525.inc" , "18f6525_g.lkr" , 0 },
{ PROC_CLASS_PIC16E , "__18F6527" , { "pic18f6527" , "p18f6527" , "18f6527" }, 0x6527, 0, 16, 0x0F00, { 0x00, 0x5F }, -1, { -1, -1 }, 0x0FFF, 0xF003FF, 0x00C000, { 0x00C000, 0xEFFFFF }, { 0x200000, 0x200007 }, { 0x300000, 0x30000D }, { 0xF00000, 0xF003FF }, 0x0000, "p18f6527.inc" , "18f6527_g.lkr" , CPU_HAVE_EXTINST },
{ PROC_CLASS_PIC16E , "__18F6585" , { "pic18f6585" , "p18f6585" , "18f6585" }, 0x6585, 0, 16, 0x0F00, { 0x00, 0x5F }, -1, { -1, -1 }, 0x0FFF, 0xF003FF, 0x00C000, { 0x00C000, 0xEFFFFF }, { 0x200000, 0x200007 }, { 0x300000, 0x30000D }, { 0xF00000, 0xF003FF }, 0x0000, "p18f6585.inc" , "18f6585_g.lkr" , 0 },
{ PROC_CLASS_PIC16E , "__18F6620" , { "pic18f6620" , "p18f6620" , "18f6620" }, 0xA662, 0, 16, 0x0F00, { 0x00, 0x5F }, -1, { -1, -1 }, 0x0FFF, 0xF003FF, 0x010000, { 0x010000, 0xEFFFFF }, { 0x200000, 0x200007 }, { 0x300000, 0x30000D }, { 0xF00000, 0xF003FF }, 0x0000, "p18f6620.inc" , "18f6620_g.lkr" , 0 },
{ PROC_CLASS_PIC16E , "__18F6621" , { "pic18f6621" , "p18f6621" , "18f6621" }, 0xA621, 0, 16, 0x0F00, { 0x00, 0x5F }, -1, { -1, -1 }, 0x0FFF, 0xF003FF, 0x010000, { 0x010000, 0xEFFFFF }, { 0x200000, 0x200007 }, { 0x300000, 0x30000D }, { 0xF00000, 0xF003FF }, 0x0000, "p18f6621.inc" , "18f6621_g.lkr" , 0 },
{ PROC_CLASS_PIC16E , "__18F6622" , { "pic18f6622" , "p18f6622" , "18f6622" }, 0xF622, 0, 16, 0x0F00, { 0x00, 0x5F }, -1, { -1, -1 }, 0x0FFF, 0xF003FF, 0x010000, { 0x010000, 0xEFFFFF }, { 0x200000, 0x200007 }, { 0x300000, 0x30000D }, { 0xF00000, 0xF003FF }, 0x0000, "p18f6622.inc" , "18f6622_g.lkr" , CPU_HAVE_EXTINST },
{ PROC_CLASS_PIC16E , "__18F6627" , { "pic18f6627" , "p18f6627" , "18f6627" }, 0xF625, 0, 16, 0x0F00, { 0x00, 0x5F }, -1, { -1, -1 }, 0x0FFF, 0xF003FF, 0x018000, { 0x018000, 0xEFFFFF }, { 0x200000, 0x200007 }, { 0x300000, 0x30000D }, { 0xF00000, 0xF003FF }, 0x0000, "p18f6627.inc" , "18f6627_g.lkr" , CPU_HAVE_EXTINST },
{ PROC_CLASS_PIC16E , "__18F6628" , { "pic18f6628" , "p18f6628" , "18f6628" }, 0xA628, 0, 16, 0x0F00, { 0x00, 0x5F }, -1, { -1, -1 }, 0x0FFF, 0xF003FF, 0x018000, { 0x018000, 0xEFFFFF }, { 0x200000, 0x200007 }, { 0x300000, 0x30000D }, { 0xF00000, 0xF003FF }, 0x0000, "p18f6628.inc" , "18f6628_g.lkr" , CPU_HAVE_EXTINST },
{ PROC_CLASS_PIC16E , "__18F6680" , { "pic18f6680" , "p18f6680" , "18f6680" }, 0x6680, 0, 16, 0x0F00, { 0x00, 0x5F }, -1, { -1, -1 }, 0x0FFF, 0xF003FF, 0x010000, { 0x010000, 0xEFFFFF }, { 0x200000, 0x200007 }, { 0x300000, 0x30000D }, { 0xF00000, 0xF003FF }, 0x0000, "p18f6680.inc" , "18f6680_g.lkr" , 0 },
{ PROC_CLASS_PIC16E , "__18F6720" , { "pic18f6720" , "p18f6720" , "18f6720" }, 0xA672, 0, 16, 0x0F00, { 0x00, 0x5F }, -1, { -1, -1 }, 0x0FFF, 0xF003FF, 0x020000, { 0x020000, 0xEFFFFF }, { 0x200000, 0x200007 }, { 0x300000, 0x30000D }, { 0xF00000, 0xF003FF }, 0x0000, "p18f6720.inc" , "18f6720_g.lkr" , 0 },
{ PROC_CLASS_PIC16E , "__18F6722" , { "pic18f6722" , "p18f6722" , "18f6722" }, 0x6721, 0, 16, 0x0F00, { 0x00, 0x5F }, -1, { -1, -1 }, 0x0FFF, 0xF003FF, 0x020000, { 0x020000, 0xEFFFFF }, { 0x200000, 0x200007 }, { 0x300000, 0x30000D }, { 0xF00000, 0xF003FF }, 0x0000, "p18f6722.inc" , "18f6722_g.lkr" , CPU_HAVE_EXTINST },
{ PROC_CLASS_PIC16E , "__18F6723" , { "pic18f6723" , "p18f6723" , "18f6723" }, 0x6723, 0, 16, 0x0F00, { 0x00, 0x5F }, -1, { -1, -1 }, 0x0FFF, 0xF003FF, 0x020000, { 0x020000, 0xEFFFFF }, { 0x200000, 0x200007 }, { 0x300000, 0x30000D }, { 0xF00000, 0xF003FF }, 0x0000, "p18f6723.inc" , "18f6723_g.lkr" , CPU_HAVE_EXTINST },
{ PROC_CLASS_PIC16E , "__18F8310" , { "pic18f8310" , "p18f8310" , "18f8310" }, 0x8310, 0, 16, 0x0F00, { 0x00, 0x5F }, -1, { -1, -1 }, 0x0FFF, 0x001FFF, 0x002000, { -1, -1 }, { 0x200000, 0x200007 }, { 0x300000, 0x30000D }, { -1, -1 }, 0x0000, "p18f8310.inc" , "18f8310_g.lkr" , CPU_HAVE_EXTINST },
{ PROC_CLASS_PIC16E , "__18F8390" , { "pic18f8390" , "p18f8390" , "18f8390" }, 0x8390, 0, 16, 0x0F00, { 0x00, 0x5F }, -1, { -1, -1 }, 0x0FFF, 0x001FFF, 0x002000, { -1, -1 }, { 0x200000, 0x200007 }, { 0x300000, 0x30000D }, { -1, -1 }, 0x0000, "p18f8390.inc" , "18f8390_g.lkr" , CPU_HAVE_EXTINST },
{ PROC_CLASS_PIC16E , "__18F8393" , { "pic18f8393" , "p18f8393" , "18f8393" }, 0x8393, 0, 16, 0x0F00, { 0x00, 0x5F }, -1, { -1, -1 }, 0x0FFF, 0x001FFF, 0x002000, { -1, -1 }, { 0x200000, 0x200007 }, { 0x300000, 0x30000D }, { -1, -1 }, 0x0000, "p18f8393.inc" , "18f8393_g.lkr" , CPU_HAVE_EXTINST },
{ PROC_CLASS_PIC16E , "__18F8410" , { "pic18f8410" , "p18f8410" , "18f8410" }, 0x8410, 0, 16, 0x0F00, { 0x00, 0x5F }, -1, { -1, -1 }, 0x0FFF, 0x003FFF, 0x004000, { -1, -1 }, { 0x200000, 0x200007 }, { 0x300000, 0x30000D }, { -1, -1 }, 0x0000, "p18f8410.inc" , "18f8410_g.lkr" , CPU_HAVE_EXTINST },
{ PROC_CLASS_PIC16E , "__18F8490" , { "pic18f8490" , "p18f8490" , "18f8490" }, 0x8490, 0, 16, 0x0F00, { 0x00, 0x5F }, -1, { -1, -1 }, 0x0FFF, 0x003FFF, 0x004000, { -1, -1 }, { 0x200000, 0x200007 }, { 0x300000, 0x30000D }, { -1, -1 }, 0x0000, "p18f8490.inc" , "18f8490_g.lkr" , CPU_HAVE_EXTINST },
{ PROC_CLASS_PIC16E , "__18F8493" , { "pic18f8493" , "p18f8493" , "18f8493" }, 0x8493, 0, 16, 0x0F00, { 0x00, 0x5F }, -1, { -1, -1 }, 0x0FFF, 0x003FFF, 0x004000, { -1, -1 }, { 0x200000, 0x200007 }, { 0x300000, 0x30000D }, { -1, -1 }, 0x0000, "p18f8493.inc" , "18f8493_g.lkr" , CPU_HAVE_EXTINST },
{ PROC_CLASS_PIC16E , "__18F8520" , { "pic18f8520" , "p18f8520" , "18f8520" }, 0xA852, 0, 16, 0x0F00, { 0x00, 0x5F }, -1, { -1, -1 }, 0x0FFF, 0xF003FF, 0x008000, { 0x008000, 0xEFFFFF }, { 0x200000, 0x200007 }, { 0x300000, 0x30000D }, { 0xF00000, 0xF003FF }, 0x0000, "p18f8520.inc" , "18f8520_g.lkr" , 0 },
{ PROC_CLASS_PIC16E , "__18F8525" , { "pic18f8525" , "p18f8525" , "18f8525" }, 0x8525, 0, 16, 0x0F00, { 0x00, 0x5F }, -1, { -1, -1 }, 0x0FFF, 0xF003FF, 0x00C000, { 0x00C000, 0xEFFFFF }, { 0x200000, 0x200007 }, { 0x300000, 0x30000D }, { 0xF00000, 0xF003FF }, 0x0000, "p18f8525.inc" , "18f8525_g.lkr" , 0 },
{ PROC_CLASS_PIC16E , "__18F8527" , { "pic18f8527" , "p18f8527" , "18f8527" }, 0x8527, 0, 16, 0x0F00, { 0x00, 0x5F }, -1, { -1, -1 }, 0x0FFF, 0xF003FF, 0x00C000, { 0x00C000, 0xEFFFFF }, { 0x200000, 0x200007 }, { 0x300000, 0x30000D }, { 0xF00000, 0xF003FF }, 0x0000, "p18f8527.inc" , "18f8527_g.lkr" , CPU_HAVE_EXTINST },
{ PROC_CLASS_PIC16E , "__18F8585" , { "pic18f8585" , "p18f8585" , "18f8585" }, 0x8585, 0, 16, 0x0F00, { 0x00, 0x5F }, -1, { -1, -1 }, 0x0FFF, 0xF003FF, 0x00C000, { 0x00C000, 0xEFFFFF }, { 0x200000, 0x200007 }, { 0x300000, 0x30000D }, { 0xF00000, 0xF003FF }, 0x0000, "p18f8585.inc" , "18f8585_g.lkr" , 0 },
{ PROC_CLASS_PIC16E , "__18F8620" , { "pic18f8620" , "p18f8620" , "18f8620" }, 0xA862, 0, 16, 0x0F00, { 0x00, 0x5F }, -1, { -1, -1 }, 0x0FFF, 0xF003FF, 0x010000, { 0x010000, 0xEFFFFF }, { 0x200000, 0x200007 }, { 0x300000, 0x30000D }, { 0xF00000, 0xF003FF }, 0x0000, "p18f8620.inc" , "18f8620_g.lkr" , 0 },
{ PROC_CLASS_PIC16E , "__18F8621" , { "pic18f8621" , "p18f8621" , "18f8621" }, 0x8621, 0, 16, 0x0F00, { 0x00, 0x5F }, -1, { -1, -1 }, 0x0FFF, 0xF003FF, 0x010000, { 0x010000, 0xEFFFFF }, { 0x200000, 0x200007 }, { 0x300000, 0x30000D }, { 0xF00000, 0xF003FF }, 0x0000, "p18f8621.inc" , "18f8621_g.lkr" , 0 },
{ PROC_CLASS_PIC16E , "__18F8622" , { "pic18f8622" , "p18f8622" , "18f8622" }, 0x8622, 0, 16, 0x0F00, { 0x00, 0x5F }, -1, { -1, -1 }, 0x0FFF, 0xF003FF, 0x010000, { 0x010000, 0xEFFFFF }, { 0x200000, 0x200007 }, { 0x300000, 0x30000D }, { 0xF00000, 0xF003FF }, 0x0000, "p18f8622.inc" , "18f8622_g.lkr" , CPU_HAVE_EXTINST },
{ PROC_CLASS_PIC16E , "__18F8627" , { "pic18f8627" , "p18f8627" , "18f8627" }, 0x8625, 0, 16, 0x0F00, { 0x00, 0x5F }, -1, { -1, -1 }, 0x0FFF, 0xF003FF, 0x018000, { 0x018000, 0xEFFFFF }, { 0x200000, 0x200007 }, { 0x300000, 0x30000D }, { 0xF00000, 0xF003FF }, 0x0000, "p18f8627.inc" , "18f8627_g.lkr" , CPU_HAVE_EXTINST },
{ PROC_CLASS_PIC16E , "__18F8628" , { "pic18f8628" , "p18f8628" , "18f8628" }, 0x8628, 0, 16, 0x0F00, { 0x00, 0x5F }, -1, { -1, -1 }, 0x0FFF, 0xF003FF, 0x018000, { 0x018000, 0xEFFFFF }, { 0x200000, 0x200007 }, { 0x300000, 0x30000D }, { 0xF00000, 0xF003FF }, 0x0000, "p18f8628.inc" , "18f8628_g.lkr" , CPU_HAVE_EXTINST },
{ PROC_CLASS_PIC16E , "__18F8680" , { "pic18f8680" , "p18f8680" , "18f8680" }, 0x8680, 0, 16, 0x0F00, { 0x00, 0x5F }, -1, { -1, -1 }, 0x0FFF, 0xF003FF, 0x010000, { 0x010000, 0xEFFFFF }, { 0x200000, 0x200007 }, { 0x300000, 0x30000D }, { 0xF00000, 0xF003FF }, 0x0000, "p18f8680.inc" , "18f8680_g.lkr" , 0 },
{ PROC_CLASS_PIC16E , "__18F8720" , { "pic18f8720" , "p18f8720" , "18f8720" }, 0xA872, 0, 16, 0x0F00, { 0x00, 0x5F }, -1, { -1, -1 }, 0x0FFF, 0xF003FF, 0x020000, { 0x020000, 0xEFFFFF }, { 0x200000, 0x200007 }, { 0x300000, 0x30000D }, { 0xF00000, 0xF003FF }, 0x0000, "p18f8720.inc" , "18f8720_g.lkr" , 0 },
{ PROC_CLASS_PIC16E , "__18F8722" , { "pic18f8722" , "p18f8722" , "18f8722" }, 0x8721, 0, 16, 0x0F00, { 0x00, 0x5F }, -1, { -1, -1 }, 0x0FFF, 0xF003FF, 0x020000, { 0x020000, 0xEFFFFF }, { 0x200000, 0x200007 }, { 0x300000, 0x30000D }, { 0xF00000, 0xF003FF }, 0x0000, "p18f8722.inc" , "18f8722_g.lkr" , CPU_HAVE_EXTINST },
{ PROC_CLASS_PIC16E , "__18F8723" , { "pic18f8723" , "p18f8723" , "18f8723" }, 0x8723, 0, 16, 0x0F00, { 0x00, 0x5F }, -1, { -1, -1 }, 0x0FFF, 0xF003FF, 0x020000, { 0x020000, 0xEFFFFF }, { 0x200000, 0x200007 }, { 0x300000, 0x30000D }, { 0xF00000, 0xF003FF }, 0x0000, "p18f8723.inc" , "18f8723_g.lkr" , CPU_HAVE_EXTINST },
{ PROC_CLASS_PIC16E , "__18LF13K22" , { "pic18lf13k22" , "p18lf13k22" , "18lf13k22" }, 0xA133, 0, 16, 0x0F00, { 0x00, 0x5F }, -1, { -1, -1 }, 0x0FFF, 0xF000FF, 0x002000, { 0x002000, 0xEFFFFF }, { 0x200000, 0x200007 }, { 0x300000, 0x30000D }, { 0xF00000, 0xF000FF }, 0x0000, "p18lf13k22.inc" , "18lf13k22_g.lkr" , CPU_HAVE_EXTINST },
{ PROC_CLASS_PIC16E , "__18LF13K50" , { "pic18lf13k50" , "p18lf13k50" , "18lf13k50" }, 0xD135, 0, 16, 0x0F00, { 0x00, 0x5F }, -1, { -1, -1 }, 0x0FFF, 0xF000FF, 0x002000, { 0x002000, 0xEFFFFF }, { 0x200000, 0x200007 }, { 0x300000, 0x30000D }, { 0xF00000, 0xF000FF }, 0x0000, "p18lf13k50.inc" , "18lf13k50_g.lkr" , CPU_HAVE_EXTINST },
{ PROC_CLASS_PIC16E , "__18LF14K22" , { "pic18lf14k22" , "p18lf14k22" , "18lf14k22" }, 0xA142, 0, 16, 0x0F00, { 0x00, 0x5F }, -1, { -1, -1 }, 0x0FFF, 0xF000FF, 0x004000, { 0x004000, 0xEFFFFF }, { 0x200000, 0x200007 }, { 0x300000, 0x30000D }, { 0xF00000, 0xF000FF }, 0x0000, "p18lf14k22.inc" , "18lf14k22_g.lkr" , CPU_HAVE_EXTINST },
{ PROC_CLASS_PIC16E , "__18LF14K50" , { "pic18lf14k50" , "p18lf14k50" , "18lf14k50" }, 0xD145, 0, 16, 0x0F00, { 0x00, 0x5F }, -1, { -1, -1 }, 0x0FFF, 0xF000FF, 0x004000, { 0x004000, 0xEFFFFF }, { 0x200000, 0x200007 }, { 0x300000, 0x30000D }, { 0xF00000, 0xF000FF }, 0x0000, "p18lf14k50.inc" , "18lf14k50_g.lkr" , CPU_HAVE_EXTINST },
{ PROC_CLASS_PIC16E , "__18LF23K22" , { "pic18lf23k22" , "p18lf23k22" , "18lf23k22" }, 0xB322, 0, 16, 0x0F00, { 0x00, 0x5F }, -1, { -1, -1 }, 0x0FFF, 0xF000FF, 0x002000, { 0x002000, 0xEFFFFF }, { 0x200000, 0x200007 }, { 0x300000, 0x30000D }, { 0xF00000, 0xF000FF }, 0x0000, "p18lf23k22.inc" , "18lf23k22_g.lkr" , CPU_HAVE_EXTINST },
{ PROC_CLASS_PIC16E , "__18LF24J10" , { "pic18lf24j10" , "p18lf24j10" , "18lf24j10" }, 0xA241, 0, 16, 0x0F00, { 0x00, 0x7F }, -1, { -1, -1 }, 0x0FFF, 0x003FF7, 0x003FF8, { -1, -1 }, { -1, -1 }, { 0x003FF8, 0x003FFD }, { -1, -1 }, 0x0000, "p18lf24j10.inc" , "18lf24j10_g.lkr" , CPU_HAVE_EXTINST | CPU_18FJ_FAMILY },
{ PROC_CLASS_PIC16E , "__18LF24J11" , { "pic18lf24j11" , "p18lf24j11" , "18lf24j11" }, 0xB411, 0, 16, 0x0F00, { 0x00, 0x5F }, -1, { -1, -1 }, 0x0FFF, 0x003FF7, 0x003FF8, { -1, -1 }, { -1, -1 }, { 0x003FF8, 0x003FFF }, { -1, -1 }, 0x0000, "p18lf24j11.inc" , "18lf24j11_g.lkr" , CPU_HAVE_EXTINST | CPU_18FJ_FAMILY },
{ PROC_CLASS_PIC16E , "__18LF24J50" , { "pic18lf24j50" , "p18lf24j50" , "18lf24j50" }, 0xB450, 0, 16, 0x0F00, { 0x00, 0x5F }, -1, { -1, -1 }, 0x0FFF, 0x003FF7, 0x003FF8, { -1, -1 }, { -1, -1 }, { 0x003FF8, 0x003FFF }, { -1, -1 }, 0x0000, "p18lf24j50.inc" , "18lf24j50_g.lkr" , CPU_HAVE_EXTINST | CPU_18FJ_FAMILY },
{ PROC_CLASS_PIC16E , "__18LF24K22" , { "pic18lf24k22" , "p18lf24k22" , "18lf24k22" }, 0xB422, 0, 16, 0x0F00, { 0x00, 0x5F }, -1, { -1, -1 }, 0x0FFF, 0xF000FF, 0x004000, { 0x004000, 0xEFFFFF }, { 0x200000, 0x200007 }, { 0x300000, 0x30000D }, { 0xF00000, 0xF000FF }, 0x0000, "p18lf24k22.inc" , "18lf24k22_g.lkr" , CPU_HAVE_EXTINST },
{ PROC_CLASS_PIC16E , "__18LF24K40" , { "pic18lf24k40" , "p18lf24k40" , "18lf24k40" }, 0xC244, 0, 16, 0x0F00, { 0x00, 0x5F }, -1, { -1, -1 }, 0x0FFF, 0x3100FF, 0x004000, { 0x004000, 0x30FFFF }, { 0x200000, 0x20000F }, { 0x300000, 0x30000B }, { 0x310000, 0x3100FF }, 0x0000, "p18lf24k40.inc" , "18lf24k40_g.lkr" , CPU_HAVE_EXTINST },
{ PROC_CLASS_PIC16E , "__18LF24K50" , { "pic18lf24k50" , "p18lf24k50" , "18lf24k50" }, 0xD452, 0, 16, 0x0F00, { 0x00, 0x5F }, -1, { -1, -1 }, 0x0FFF, 0xF000FF, 0x004000, { 0x004000, 0xEFFFFF }, { 0x200000, 0x200007 }, { 0x300000, 0x30000D }, { 0xF00000, 0xF000FF }, 0x0000, "p18lf24k50.inc" , "18lf24k50_g.lkr" , CPU_HAVE_EXTINST },
{ PROC_CLASS_PIC16E , "__18LF25J10" , { "pic18lf25j10" , "p18lf25j10" , "18lf25j10" }, 0xA251, 0, 16, 0x0F00, { 0x00, 0x7F }, -1, { -1, -1 }, 0x0FFF, 0x007FF7, 0x007FF8, { -1, -1 }, { -1, -1 }, { 0x007FF8, 0x007FFD }, { -1, -1 }, 0x0000, "p18lf25j10.inc" , "18lf25j10_g.lkr" , CPU_HAVE_EXTINST | CPU_18FJ_FAMILY },
{ PROC_CLASS_PIC16E , "__18LF25J11" , { "pic18lf25j11" , "p18lf25j11" , "18lf25j11" }, 0xB511, 0, 16, 0x0F00, { 0x00, 0x5F }, -1, { -1, -1 }, 0x0FFF, 0x007FF7, 0x007FF8, { -1, -1 }, { -1, -1 }, { 0x007FF8, 0x007FFF }, { -1, -1 }, 0x0000, "p18lf25j11.inc" , "18lf25j11_g.lkr" , CPU_HAVE_EXTINST | CPU_18FJ_FAMILY },
{ PROC_CLASS_PIC16E , "__18LF25J50" , { "pic18lf25j50" , "p18lf25j50" , "18lf25j50" }, 0xB551, 0, 16, 0x0F00, { 0x00, 0x5F }, -1, { -1, -1 }, 0x0FFF, 0x007FF7, 0x007FF8, { -1, -1 }, { -1, -1 }, { 0x007FF8, 0x007FFF }, { -1, -1 }, 0x0000, "p18lf25j50.inc" , "18lf25j50_g.lkr" , CPU_HAVE_EXTINST | CPU_18FJ_FAMILY },
{ PROC_CLASS_PIC16E , "__18LF25K22" , { "pic18lf25k22" , "p18lf25k22" , "18lf25k22" }, 0xB522, 0, 16, 0x0F00, { 0x00, 0x5F }, -1, { -1, -1 }, 0x0FFF, 0xF000FF, 0x008000, { 0x008000, 0xEFFFFF }, { 0x200000, 0x200007 }, { 0x300000, 0x30000D }, { 0xF00000, 0xF000FF }, 0x0000, "p18lf25k22.inc" , "18lf25k22_g.lkr" , CPU_HAVE_EXTINST },
{ PROC_CLASS_PIC16E , "__18LF25K40" , { "pic18lf25k40" , "p18lf25k40" , "18lf25k40" }, 0xC254, 0, 16, 0x0F00, { 0x00, 0x5F }, -1, { -1, -1 }, 0x0FFF, 0x3100FF, 0x008000, { 0x008000, 0x30FFFF }, { 0x200000, 0x20000F }, { 0x300000, 0x30000B }, { 0x310000, 0x3100FF }, 0x0000, "p18lf25k40.inc" , "18lf25k40_g.lkr" , CPU_HAVE_EXTINST },
{ PROC_CLASS_PIC16E , "__18LF25K50" , { "pic18lf25k50" , "p18lf25k50" , "18lf25k50" }, 0xD552, 0, 16, 0x0F00, { 0x00, 0x5F }, -1, { -1, -1 }, 0x0FFF, 0xF000FF, 0x008000, { 0x008000, 0xEFFFFF }, { 0x200000, 0x200007 }, { 0x300000, 0x30000D }, { 0xF00000, 0xF000FF }, 0x0000, "p18lf25k50.inc" , "18lf25k50_g.lkr" , CPU_HAVE_EXTINST },
{ PROC_CLASS_PIC16E , "__18LF25K80" , { "pic18lf25k80" , "p18lf25k80" , "18lf25k80" }, 0xD580, 0, 16, 0x0F00, { 0x00, 0x5F }, -1, { -1, -1 }, 0x0FFF, 0xF003FF, 0x008000, { 0x008000, 0xEFFFFF }, { 0x200000, 0x200007 }, { 0x300000, 0x30000D }, { 0xF00000, 0xF003FF }, 0x0000, "p18lf25k80.inc" , "18lf25k80_g.lkr" , CPU_HAVE_EXTINST },
{ PROC_CLASS_PIC16E , "__18LF26J11" , { "pic18lf26j11" , "p18lf26j11" , "18lf26j11" }, 0xB612, 0, 16, 0x0F00, { 0x00, 0x5F }, -1, { -1, -1 }, 0x0FFF, 0x00FFF7, 0x00FFF8, { -1, -1 }, { -1, -1 }, { 0x00FFF8, 0x00FFFF }, { -1, -1 }, 0x0000, "p18lf26j11.inc" , "18lf26j11_g.lkr" , CPU_HAVE_EXTINST | CPU_18FJ_FAMILY },
{ PROC_CLASS_PIC16E , "__18LF26J13" , { "pic18lf26j13" , "p18lf26j13" , "18lf26j13" }, 0xB617, 0, 16, 0x0F00, { 0x00, 0x5F }, -1, { -1, -1 }, 0x0FFF, 0x00FFF7, 0x00FFF8, { -1, -1 }, { -1, -1 }, { 0x00FFF8, 0x00FFFF }, { -1, -1 }, 0x0000, "p18lf26j13.inc" , "18lf26j13_g.lkr" , CPU_HAVE_EXTINST | CPU_18FJ_FAMILY },
{ PROC_CLASS_PIC16E , "__18LF26J50" , { "pic18lf26j50" , "p18lf26j50" , "18lf26j50" }, 0xB651, 0, 16, 0x0F00, { 0x00, 0x5F }, -1, { -1, -1 }, 0x0FFF, 0x00FFF7, 0x00FFF8, { -1, -1 }, { -1, -1 }, { 0x00FFF8, 0x00FFFF }, { -1, -1 }, 0x0000, "p18lf26j50.inc" , "18lf26j50_g.lkr" , CPU_HAVE_EXTINST | CPU_18FJ_FAMILY },
{ PROC_CLASS_PIC16E , "__18LF26J53" , { "pic18lf26j53" , "p18lf26j53" , "18lf26j53" }, 0xB656, 0, 16, 0x0F00, { 0x00, 0x5F }, -1, { -1, -1 }, 0x0FFF, 0x00FFF7, 0x00FFF8, { -1, -1 }, { -1, -1 }, { 0x00FFF8, 0x00FFFF }, { -1, -1 }, 0x0000, "p18lf26j53.inc" , "18lf26j53_g.lkr" , CPU_HAVE_EXTINST | CPU_18FJ_FAMILY },
{ PROC_CLASS_PIC16E , "__18LF26K22" , { "pic18lf26k22" , "p18lf26k22" , "18lf26k22" }, 0xB623, 0, 16, 0x0F00, { 0x00, 0x5F }, -1, { -1, -1 }, 0x0FFF, 0xF003FF, 0x010000, { 0x010000, 0xEFFFFF }, { 0x200000, 0x200007 }, { 0x300000, 0x30000D }, { 0xF00000, 0xF003FF }, 0x0000, "p18lf26k22.inc" , "18lf26k22_g.lkr" , CPU_HAVE_EXTINST },
{ PROC_CLASS_PIC16E , "__18LF26K40" , { "pic18lf26k40" , "p18lf26k40" , "18lf26k40" }, 0xA640, 0, 16, 0x0F00, { 0x00, 0x5F }, -1, { -1, -1 }, 0x0FFF, 0x3103FF, 0x010000, { 0x010000, 0x30FFFF }, { 0x200000, 0x20000F }, { 0x300000, 0x30000B }, { 0x310000, 0x3103FF }, 0x0000, "p18lf26k40.inc" , "18lf26k40_g.lkr" , CPU_HAVE_EXTINST },
{ PROC_CLASS_PIC16E , "__18LF26K80" , { "pic18lf26k80" , "p18lf26k80" , "18lf26k80" }, 0xD680, 0, 16, 0x0F00, { 0x00, 0x5F }, -1, { -1, -1 }, 0x0FFF, 0xF003FF, 0x010000, { 0x010000, 0xEFFFFF }, { 0x200000, 0x200007 }, { 0x300000, 0x30000D }, { 0xF00000, 0xF003FF }, 0x0000, "p18lf26k80.inc" , "18lf26k80_g.lkr" , CPU_HAVE_EXTINST },
{ PROC_CLASS_PIC16E , "__18LF27J13" , { "pic18lf27j13" , "p18lf27j13" , "18lf27j13" }, 0xB712, 0, 16, 0x0F00, { 0x00, 0x5F }, -1, { -1, -1 }, 0x0FFF, 0x01FFF7, 0x01FFF8, { -1, -1 }, { -1, -1 }, { 0x01FFF8, 0x01FFFF }, { -1, -1 }, 0x0000, "p18lf27j13.inc" , "18lf27j13_g.lkr" , CPU_HAVE_EXTINST | CPU_18FJ_FAMILY },
{ PROC_CLASS_PIC16E , "__18LF27J53" , { "pic18lf27j53" , "p18lf27j53" , "18lf27j53" }, 0xC753, 0, 16, 0x0F00, { 0x00, 0x5F }, -1, { -1, -1 }, 0x0FFF, 0x01FFF7, 0x01FFF8, { -1, -1 }, { -1, -1 }, { 0x01FFF8, 0x01FFFF }, { -1, -1 }, 0x0000, "p18lf27j53.inc" , "18lf27j53_g.lkr" , CPU_HAVE_EXTINST | CPU_18FJ_FAMILY },
{ PROC_CLASS_PIC16E , "__18LF27K40" , { "pic18lf27k40" , "p18lf27k40" , "18lf27k40" }, 0xA277, 0, 16, 0x0F00, { 0x00, 0x5F }, -1, { -1, -1 }, 0x0FFF, 0x3103FF, 0x020000, { 0x020000, 0x30FFFF }, { 0x200000, 0x20000F }, { 0x300000, 0x30000B }, { 0x310000, 0x3103FF }, 0x0000, "p18lf27k40.inc" , "18lf27k40_g.lkr" , CPU_HAVE_EXTINST },
{ PROC_CLASS_PIC16E , "__18LF43K22" , { "pic18lf43k22" , "p18lf43k22" , "18lf43k22" }, 0xC322, 0, 16, 0x0F00, { 0x00, 0x5F }, -1, { -1, -1 }, 0x0FFF, 0xF000FF, 0x002000, { 0x002000, 0xEFFFFF }, { 0x200000, 0x200007 }, { 0x300000, 0x30000D }, { 0xF00000, 0xF000FF }, 0x0000, "p18lf43k22.inc" , "18lf43k22_g.lkr" , CPU_HAVE_EXTINST },
{ PROC_CLASS_PIC16E , "__18LF44J10" , { "pic18lf44j10" , "p18lf44j10" , "18lf44j10" }, 0xA441, 0, 16, 0x0F00, { 0x00, 0x7F }, -1, { -1, -1 }, 0x0FFF, 0x003FF7, 0x003FF8, { -1, -1 }, { -1, -1 }, { 0x003FF8, 0x003FFD }, { -1, -1 }, 0x0000, "p18lf44j10.inc" , "18lf44j10_g.lkr" , CPU_HAVE_EXTINST | CPU_18FJ_FAMILY },
{ PROC_CLASS_PIC16E , "__18LF44J11" , { "pic18lf44j11" , "p18lf44j11" , "18lf44j11" }, 0xC411, 0, 16, 0x0F00, { 0x00, 0x5F }, -1, { -1, -1 }, 0x0FFF, 0x003FF7, 0x003FF8, { -1, -1 }, { -1, -1 }, { 0x003FF8, 0x003FFF }, { -1, -1 }, 0x0000, "p18lf44j11.inc" , "18lf44j11_g.lkr" , CPU_HAVE_EXTINST | CPU_18FJ_FAMILY },
{ PROC_CLASS_PIC16E , "__18LF44J50" , { "pic18lf44j50" , "p18lf44j50" , "18lf44j50" }, 0xC450, 0, 16, 0x0F00, { 0x00, 0x5F }, -1, { -1, -1 }, 0x0FFF, 0x003FF7, 0x003FF8, { -1, -1 }, { -1, -1 }, { 0x003FF8, 0x003FFF }, { -1, -1 }, 0x0000, "p18lf44j50.inc" , "18lf44j50_g.lkr" , CPU_HAVE_EXTINST | CPU_18FJ_FAMILY },
{ PROC_CLASS_PIC16E , "__18LF44K22" , { "pic18lf44k22" , "p18lf44k22" , "18lf44k22" }, 0xC422, 0, 16, 0x0F00, { 0x00, 0x5F }, -1, { -1, -1 }, 0x0FFF, 0xF000FF, 0x004000, { 0x004000, 0xEFFFFF }, { 0x200000, 0x200007 }, { 0x300000, 0x30000D }, { 0xF00000, 0xF000FF }, 0x0000, "p18lf44k22.inc" , "18lf44k22_g.lkr" , CPU_HAVE_EXTINST },
{ PROC_CLASS_PIC16E , "__18LF45J10" , { "pic18lf45j10" , "p18lf45j10" , "18lf45j10" }, 0xA451, 0, 16, 0x0F00, { 0x00, 0x7F }, -1, { -1, -1 }, 0x0FFF, 0x007FF7, 0x007FF8, { -1, -1 }, { -1, -1 }, { 0x007FF8, 0x007FFD }, { -1, -1 }, 0x0000, "p18lf45j10.inc" , "18lf45j10_g.lkr" , CPU_HAVE_EXTINST | CPU_18FJ_FAMILY },
{ PROC_CLASS_PIC16E , "__18LF45J11" , { "pic18lf45j11" , "p18lf45j11" , "18lf45j11" }, 0xC511, 0, 16, 0x0F00, { 0x00, 0x5F }, -1, { -1, -1 }, 0x0FFF, 0x007FF7, 0x007FF8, { -1, -1 }, { -1, -1 }, { 0x007FF8, 0x007FFF }, { -1, -1 }, 0x0000, "p18lf45j11.inc" , "18lf45j11_g.lkr" , CPU_HAVE_EXTINST | CPU_18FJ_FAMILY },
{ PROC_CLASS_PIC16E , "__18LF45J50" , { "pic18lf45j50" , "p18lf45j50" , "18lf45j50" }, 0xC551, 0, 16, 0x0F00, { 0x00, 0x5F }, -1, { -1, -1 }, 0x0FFF, 0x007FF7, 0x007FF8, { -1, -1 }, { -1, -1 }, { 0x007FF8, 0x007FFF }, { -1, -1 }, 0x0000, "p18lf45j50.inc" , "18lf45j50_g.lkr" , CPU_HAVE_EXTINST | CPU_18FJ_FAMILY },
{ PROC_CLASS_PIC16E , "__18LF45K22" , { "pic18lf45k22" , "p18lf45k22" , "18lf45k22" }, 0xC522, 0, 16, 0x0F00, { 0x00, 0x5F }, -1, { -1, -1 }, 0x0FFF, 0xF000FF, 0x008000, { 0x008000, 0xEFFFFF }, { 0x200000, 0x200007 }, { 0x300000, 0x30000D }, { 0xF00000, 0xF000FF }, 0x0000, "p18lf45k22.inc" , "18lf45k22_g.lkr" , CPU_HAVE_EXTINST },
{ PROC_CLASS_PIC16E , "__18LF45K40" , { "pic18lf45k40" , "p18lf45k40" , "18lf45k40" }, 0xC454, 0, 16, 0x0F00, { 0x00, 0x5F }, -1, { -1, -1 }, 0x0FFF, 0x3100FF, 0x008000, { 0x008000, 0x30FFFF }, { 0x200000, 0x20000F }, { 0x300000, 0x30000B }, { 0x310000, 0x3100FF }, 0x0000, "p18lf45k40.inc" , "18lf45k40_g.lkr" , CPU_HAVE_EXTINST },
{ PROC_CLASS_PIC16E , "__18LF45K50" , { "pic18lf45k50" , "p18lf45k50" , "18lf45k50" }, 0xE552, 0, 16, 0x0F00, { 0x00, 0x5F }, -1, { -1, -1 }, 0x0FFF, 0xF000FF, 0x008000, { 0x008000, 0xEFFFFF }, { 0x200000, 0x200007 }, { 0x300000, 0x30000D }, { 0xF00000, 0xF000FF }, 0x0000, "p18lf45k50.inc" , "18lf45k50_g.lkr" , CPU_HAVE_EXTINST },
{ PROC_CLASS_PIC16E , "__18LF45K80" , { "pic18lf45k80" , "p18lf45k80" , "18lf45k80" }, 0xE580, 0, 16, 0x0F00, { 0x00, 0x5F }, -1, { -1, -1 }, 0x0FFF, 0xF003FF, 0x008000, { 0x008000, 0xEFFFFF }, { 0x200000, 0x200007 }, { 0x300000, 0x30000D }, { 0xF00000, 0xF003FF }, 0x0000, "p18lf45k80.inc" , "18lf45k80_g.lkr" , CPU_HAVE_EXTINST },
{ PROC_CLASS_PIC16E , "__18LF46J11" , { "pic18lf46j11" , "p18lf46j11" , "18lf46j11" }, 0xC612, 0, 16, 0x0F00, { 0x00, 0x5F }, -1, { -1, -1 }, 0x0FFF, 0x00FFF7, 0x00FFF8, { -1, -1 }, { -1, -1 }, { 0x00FFF8, 0x00FFFF }, { -1, -1 }, 0x0000, "p18lf46j11.inc" , "18lf46j11_g.lkr" , CPU_HAVE_EXTINST | CPU_18FJ_FAMILY },
{ PROC_CLASS_PIC16E , "__18LF46J13" , { "pic18lf46j13" , "p18lf46j13" , "18lf46j13" }, 0xC617, 0, 16, 0x0F00, { 0x00, 0x5F }, -1, { -1, -1 }, 0x0FFF, 0x00FFF7, 0x00FFF8, { -1, -1 }, { -1, -1 }, { 0x00FFF8, 0x00FFFF }, { -1, -1 }, 0x0000, "p18lf46j13.inc" , "18lf46j13_g.lkr" , CPU_HAVE_EXTINST | CPU_18FJ_FAMILY },
{ PROC_CLASS_PIC16E , "__18LF46J50" , { "pic18lf46j50" , "p18lf46j50" , "18lf46j50" }, 0xC651, 0, 16, 0x0F00, { 0x00, 0x5F }, -1, { -1, -1 }, 0x0FFF, 0x00FFF7, 0x00FFF8, { -1, -1 }, { -1, -1 }, { 0x00FFF8, 0x00FFFF }, { -1, -1 }, 0x0000, "p18lf46j50.inc" , "18lf46j50_g.lkr" , CPU_HAVE_EXTINST | CPU_18FJ_FAMILY },
{ PROC_CLASS_PIC16E , "__18LF46J53" , { "pic18lf46j53" , "p18lf46j53" , "18lf46j53" }, 0xC656, 0, 16, 0x0F00, { 0x00, 0x5F }, -1, { -1, -1 }, 0x0FFF, 0x00FFF7, 0x00FFF8, { -1, -1 }, { -1, -1 }, { 0x00FFF8, 0x00FFFF }, { -1, -1 }, 0x0000, "p18lf46j53.inc" , "18lf46j53_g.lkr" , CPU_HAVE_EXTINST | CPU_18FJ_FAMILY },
{ PROC_CLASS_PIC16E , "__18LF46K22" , { "pic18lf46k22" , "p18lf46k22" , "18lf46k22" }, 0xC623, 0, 16, 0x0F00, { 0x00, 0x5F }, -1, { -1, -1 }, 0x0FFF, 0xF003FF, 0x010000, { 0x010000, 0xEFFFFF }, { 0x200000, 0x200007 }, { 0x300000, 0x30000D }, { 0xF00000, 0xF003FF }, 0x0000, "p18lf46k22.inc" , "18lf46k22_g.lkr" , CPU_HAVE_EXTINST },
{ PROC_CLASS_PIC16E , "__18LF46K40" , { "pic18lf46k40" , "p18lf46k40" , "18lf46k40" }, 0xA26E, 0, 16, 0x0F00, { 0x00, 0x5F }, -1, { -1, -1 }, 0x0FFF, 0x3103FF, 0x010000, { 0x010000, 0x30FFFF }, { 0x200000, 0x20000F }, { 0x300000, 0x30000B }, { 0x310000, 0x3103FF }, 0x0000, "p18lf46k40.inc" , "18lf46k40_g.lkr" , CPU_HAVE_EXTINST },
{ PROC_CLASS_PIC16E , "__18LF46K80" , { "pic18lf46k80" , "p18lf46k80" , "18lf46k80" }, 0xE680, 0, 16, 0x0F00, { 0x00, 0x5F }, -1, { -1, -1 }, 0x0FFF, 0xF003FF, 0x010000, { 0x010000, 0xEFFFFF }, { 0x200000, 0x200007 }, { 0x300000, 0x30000D }, { 0xF00000, 0xF003FF }, 0x0000, "p18lf46k80.inc" , "18lf46k80_g.lkr" , CPU_HAVE_EXTINST },
{ PROC_CLASS_PIC16E , "__18LF47J13" , { "pic18lf47j13" , "p18lf47j13" , "18lf47j13" }, 0xC712, 0, 16, 0x0F00, { 0x00, 0x5F }, -1, { -1, -1 }, 0x0FFF, 0x01FFF7, 0x01FFF8, { -1, -1 }, { -1, -1 }, { 0x01FFF8, 0x01FFFF }, { -1, -1 }, 0x0000, "p18lf47j13.inc" , "18lf47j13_g.lkr" , CPU_HAVE_EXTINST | CPU_18FJ_FAMILY },
{ PROC_CLASS_PIC16E , "__18LF47J53" , { "pic18lf47j53" , "p18lf47j53" , "18lf47j53" }, 0xC751, 0, 16, 0x0F00, { 0x00, 0x5F }, -1, { -1, -1 }, 0x0FFF, 0x01FFF7, 0x01FFF8, { -1, -1 }, { -1, -1 }, { 0x01FFF8, 0x01FFFF }, { -1, -1 }, 0x0000, "p18lf47j53.inc" , "18lf47j53_g.lkr" , CPU_HAVE_EXTINST | CPU_18FJ_FAMILY },
{ PROC_CLASS_PIC16E , "__18LF47K40" , { "pic18lf47k40" , "p18lf47k40" , "18lf47k40" }, 0xA276, 0, 16, 0x0F00, { 0x00, 0x5F }, -1, { -1, -1 }, 0x0FFF, 0x3103FF, 0x020000, { 0x020000, 0x30FFFF }, { 0x200000, 0x20000F }, { 0x300000, 0x30000B }, { 0x310000, 0x3103FF }, 0x0000, "p18lf47k40.inc" , "18lf47k40_g.lkr" , CPU_HAVE_EXTINST },
{ PROC_CLASS_PIC16E , "__18LF65K40" , { "pic18lf65k40" , "p18lf65k40" , "18lf65k40" }, 0xA270, 0, 16, 0x0F00, { 0x00, 0x5F }, -1, { -1, -1 }, 0x0FFF, 0x3103FF, 0x008000, { 0x008000, 0x30FFFF }, { 0x200000, 0x20000F }, { 0x300000, 0x30000B }, { 0x310000, 0x3103FF }, 0x0000, "p18lf65k40.inc" , "18lf65k40_g.lkr" , CPU_HAVE_EXTINST },
{ PROC_CLASS_PIC16E , "__18LF65K80" , { "pic18lf65k80" , "p18lf65k80" , "18lf65k80" }, 0xF580, 0, 16, 0x0F00, { 0x00, 0x5F }, -1, { -1, -1 }, 0x0FFF, 0xF003FF, 0x008000, { 0x008000, 0xEFFFFF }, { 0x200000, 0x200007 }, { 0x300000, 0x30000D }, { 0xF00000, 0xF003FF }, 0x0000, "p18lf65k80.inc" , "18lf65k80_g.lkr" , CPU_HAVE_EXTINST },
{ PROC_CLASS_PIC16E , "__18LF66K40" , { "pic18lf66k40" , "p18lf66k40" , "18lf66k40" }, 0xA271, 0, 16, 0x0F00, { 0x00, 0x5F }, -1, { -1, -1 }, 0x0FFF, 0x3103FF, 0x010000, { 0x010000, 0x30FFFF }, { 0x200000, 0x20000F }, { 0x300000, 0x30000B }, { 0x310000, 0x3103FF }, 0x0000, "p18lf66k40.inc" , "18lf66k40_g.lkr" , CPU_HAVE_EXTINST },
{ PROC_CLASS_PIC16E , "__18LF66K80" , { "pic18lf66k80" , "p18lf66k80" , "18lf66k80" }, 0xF680, 0, 16, 0x0F00, { 0x00, 0x5F }, -1, { -1, -1 }, 0x0FFF, 0xF003FF, 0x010000, { 0x010000, 0xEFFFFF }, { 0x200000, 0x200007 }, { 0x300000, 0x30000D }, { 0xF00000, 0xF003FF }, 0x0000, "p18lf66k80.inc" , "18lf66k80_g.lkr" , CPU_HAVE_EXTINST },
{ PROC_CLASS_PIC16E , "__18LF67K40" , { "pic18lf67k40" , "p18lf67k40" , "18lf67k40" }, 0xA278, 0, 16, 0x0F00, { 0x00, 0x5F }, -1, { -1, -1 }, 0x0FFF, 0x3103FF, 0x020000, { 0x020000, 0x30FFFF }, { 0x200000, 0x20000F }, { 0x300000, 0x30000B }, { 0x310000, 0x3103FF }, 0x0000, "p18lf67k40.inc" , "18lf67k40_g.lkr" , CPU_HAVE_EXTINST },
{ PROC_CLASS_PIC16E , "__18LF242" , { "pic18lf242" , "p18lf242" , "18lf242" }, 0xA208, 0, 16, 0x0F00, { 0x00, 0x7F }, -1, { -1, -1 }, 0x0FFF, 0xF000FF, 0x004000, { 0x004000, 0xEFFFFF }, { 0x200000, 0x200007 }, { 0x300000, 0x30000D }, { 0xF00000, 0xF000FF }, 0x0000, "p18lf242.inc" , "18lf242_g.lkr" , 0 },
{ PROC_CLASS_PIC16E , "__18LF248" , { "pic18lf248" , "p18lf248" , "18lf248" }, 0xA20E, 0, 16, 0x0F00, { 0x00, 0x5F }, -1, { -1, -1 }, 0x0FFF, 0xF000FF, 0x004000, { 0x004000, 0xEFFFFF }, { 0x200000, 0x200007 }, { 0x300000, 0x30000D }, { 0xF00000, 0xF000FF }, 0x0000, "p18lf248.inc" , "18lf248_g.lkr" , 0 },
{ PROC_CLASS_PIC16E , "__18LF252" , { "pic18lf252" , "p18lf252" , "18lf252" }, 0xA215, 0, 16, 0x0F00, { 0x00, 0x7F }, -1, { -1, -1 }, 0x0FFF, 0xF000FF, 0x008000, { 0x008000, 0xEFFFFF }, { 0x200000, 0x200007 }, { 0x300000, 0x30000D }, { 0xF00000, 0xF000FF }, 0x0000, "p18lf252.inc" , "18lf252_g.lkr" , 0 },
{ PROC_CLASS_PIC16E , "__18LF258" , { "pic18lf258" , "p18lf258" , "18lf258" }, 0xA21B, 0, 16, 0x0F00, { 0x00, 0x5F }, -1, { -1, -1 }, 0x0FFF, 0xF000FF, 0x008000, { 0x008000, 0xEFFFFF }, { 0x200000, 0x200007 }, { 0x300000, 0x30000D }, { 0xF00000, 0xF000FF }, 0x0000, "p18lf258.inc" , "18lf258_g.lkr" , 0 },
{ PROC_CLASS_PIC16E , "__18LF442" , { "pic18lf442" , "p18lf442" , "18lf442" }, 0xA22A, 0, 16, 0x0F00, { 0x00, 0x7F }, -1, { -1, -1 }, 0x0FFF, 0xF000FF, 0x004000, { 0x004000, 0xEFFFFF }, { 0x200000, 0x200007 }, { 0x300000, 0x30000D }, { 0xF00000, 0xF000FF }, 0x0000, "p18lf442.inc" , "18lf442_g.lkr" , 0 },
{ PROC_CLASS_PIC16E , "__18LF448" , { "pic18lf448" , "p18lf448" , "18lf448" }, 0xA233, 0, 16, 0x0F00, { 0x00, 0x5F }, -1, { -1, -1 }, 0x0FFF, 0xF000FF, 0x004000, { 0x004000, 0xEFFFFF }, { 0x200000, 0x200007 }, { 0x300000, 0x30000D }, { 0xF00000, 0xF000FF }, 0x0000, "p18lf448.inc" , "18lf448_g.lkr" , 0 },
{ PROC_CLASS_PIC16E , "__18LF452" , { "pic18lf452" , "p18lf452" , "18lf452" }, 0xA236, 0, 16, 0x0F00, { 0x00, 0x7F }, -1, { -1, -1 }, 0x0FFF, 0xF000FF, 0x008000, { 0x008000, 0xEFFFFF }, { 0x200000, 0x200007 }, { 0x300000, 0x30000D }, { 0xF00000, 0xF000FF }, 0x0000, "p18lf452.inc" , "18lf452_g.lkr" , 0 },
{ PROC_CLASS_PIC16E , "__18LF458" , { "pic18lf458" , "p18lf458" , "18lf458" }, 0xA23F, 0, 16, 0x0F00, { 0x00, 0x5F }, -1, { -1, -1 }, 0x0FFF, 0xF000FF, 0x008000, { 0x008000, 0xEFFFFF }, { 0x200000, 0x200007 }, { 0x300000, 0x30000D }, { 0xF00000, 0xF000FF }, 0x0000, "p18lf458.inc" , "18lf458_g.lkr" , 0 },
{ PROC_CLASS_PIC16E , "__18LF1220" , { "pic18lf1220" , "p18lf1220" , "18lf1220" }, 0xA120, 0, 16, 0x0F00, { 0x00, 0x7F }, -1, { -1, -1 }, 0x0FFF, 0xF000FF, 0x001000, { 0x001000, 0xEFFFFF }, { 0x200000, 0x200007 }, { 0x300000, 0x30000D }, { 0xF00000, 0xF000FF }, 0x0000, "p18lf1220.inc" , "18lf1220_g.lkr" , 0 },
{ PROC_CLASS_PIC16E , "__18LF1230" , { "pic18lf1230" , "p18lf1230" , "18lf1230" }, 0xA121, 0, 16, 0x0F00, { 0x00, 0x7F }, -1, { -1, -1 }, 0x0FFF, 0xF0007F, 0x001000, { 0x001000, 0xEFFFFF }, { 0x200000, 0x200007 }, { 0x300000, 0x30000D }, { 0xF00000, 0xF0007F }, 0x0000, "p18lf1230.inc" , "18lf1230_g.lkr" , CPU_HAVE_EXTINST },
{ PROC_CLASS_PIC16E , "__18LF1320" , { "pic18lf1320" , "p18lf1320" , "18lf1320" }, 0xA130, 0, 16, 0x0F00, { 0x00, 0x7F }, -1, { -1, -1 }, 0x0FFF, 0xF000FF, 0x002000, { 0x002000, 0xEFFFFF }, { 0x200000, 0x200007 }, { 0x300000, 0x30000D }, { 0xF00000, 0xF000FF }, 0x0000, "p18lf1320.inc" , "18lf1320_g.lkr" , 0 },
{ PROC_CLASS_PIC16E , "__18LF1330" , { "pic18lf1330" , "p18lf1330" , "18lf1330" }, 0xA131, 0, 16, 0x0F00, { 0x00, 0x7F }, -1, { -1, -1 }, 0x0FFF, 0xF0007F, 0x002000, { 0x002000, 0xEFFFFF }, { 0x200000, 0x200007 }, { 0x300000, 0x30000D }, { 0xF00000, 0xF0007F }, 0x0000, "p18lf1330.inc" , "18lf1330_g.lkr" , CPU_HAVE_EXTINST },
{ PROC_CLASS_PIC16E , "__18LF2220" , { "pic18lf2220" , "p18lf2220" , "18lf2220" }, 0xA200, 0, 16, 0x0F00, { 0x00, 0x7F }, -1, { -1, -1 }, 0x0FFF, 0xF000FF, 0x001000, { 0x001000, 0xEFFFFF }, { 0x200000, 0x200007 }, { 0x300000, 0x30000D }, { 0xF00000, 0xF000FF }, 0x0000, "p18lf2220.inc" , "18lf2220_g.lkr" , 0 },
{ PROC_CLASS_PIC16E , "__18LF2221" , { "pic18lf2221" , "p18lf2221" , "18lf2221" }, 0xA201, 0, 16, 0x0F00, { 0x00, 0x7F }, -1, { -1, -1 }, 0x0FFF, 0xF000FF, 0x001000, { 0x001000, 0xEFFFFF }, { 0x200000, 0x200007 }, { 0x300000, 0x30000D }, { 0xF00000, 0xF000FF }, 0x0000, "p18lf2221.inc" , "18lf2221_g.lkr" , CPU_HAVE_EXTINST },
{ PROC_CLASS_PIC16E , "__18LF2320" , { "pic18lf2320" , "p18lf2320" , "18lf2320" }, 0xA202, 0, 16, 0x0F00, { 0x00, 0x7F }, -1, { -1, -1 }, 0x0FFF, 0xF000FF, 0x002000, { 0x002000, 0xEFFFFF }, { 0x200000, 0x200007 }, { 0x300000, 0x30000D }, { 0xF00000, 0xF000FF }, 0x0000, "p18lf2320.inc" , "18lf2320_g.lkr" , 0 },
{ PROC_CLASS_PIC16E , "__18LF2321" , { "pic18lf2321" , "p18lf2321" , "18lf2321" }, 0xA203, 0, 16, 0x0F00, { 0x00, 0x7F }, -1, { -1, -1 }, 0x0FFF, 0xF000FF, 0x002000, { 0x002000, 0xEFFFFF }, { 0x200000, 0x200007 }, { 0x300000, 0x30000D }, { 0xF00000, 0xF000FF }, 0x0000, "p18lf2321.inc" , "18lf2321_g.lkr" , CPU_HAVE_EXTINST },
{ PROC_CLASS_PIC16E , "__18LF2331" , { "pic18lf2331" , "p18lf2331" , "18lf2331" }, 0xA204, 0, 16, 0x0F00, { 0x00, 0x5F }, -1, { -1, -1 }, 0x0FFF, 0xF000FF, 0x002000, { 0x002000, 0xEFFFFF }, { 0x200000, 0x200007 }, { 0x300000, 0x30000D }, { 0xF00000, 0xF000FF }, 0x0000, "p18lf2331.inc" , "18lf2331_g.lkr" , 0 },
{ PROC_CLASS_PIC16E , "__18LF2410" , { "pic18lf2410" , "p18lf2410" , "18lf2410" }, 0xA205, 0, 16, 0x0F00, { 0x00, 0x7F }, -1, { -1, -1 }, 0x0FFF, 0x003FFF, 0x004000, { -1, -1 }, { 0x200000, 0x200007 }, { 0x300000, 0x30000D }, { -1, -1 }, 0x0000, "p18lf2410.inc" , "18lf2410_g.lkr" , CPU_HAVE_EXTINST },
{ PROC_CLASS_PIC16E , "__18LF2420" , { "pic18lf2420" , "p18lf2420" , "18lf2420" }, 0xA206, 0, 16, 0x0F00, { 0x00, 0x7F }, -1, { -1, -1 }, 0x0FFF, 0xF000FF, 0x004000, { 0x004000, 0xEFFFFF }, { 0x200000, 0x200007 }, { 0x300000, 0x30000D }, { 0xF00000, 0xF000FF }, 0x0000, "p18lf2420.inc" , "18lf2420_g.lkr" , CPU_HAVE_EXTINST },
{ PROC_CLASS_PIC16E , "__18LF2423" , { "pic18lf2423" , "p18lf2423" , "18lf2423" }, 0xA207, 0, 16, 0x0F00, { 0x00, 0x7F }, -1, { -1, -1 }, 0x0FFF, 0xF000FF, 0x004000, { 0x004000, 0xEFFFFF }, { 0x200000, 0x200007 }, { 0x300000, 0x30000D }, { 0xF00000, 0xF000FF }, 0x0000, "p18lf2423.inc" , "18lf2423_g.lkr" , CPU_HAVE_EXTINST },
{ PROC_CLASS_PIC16E , "__18LF2431" , { "pic18lf2431" , "p18lf2431" , "18lf2431" }, 0xA209, 0, 16, 0x0F00, { 0x00, 0x5F }, -1, { -1, -1 }, 0x0FFF, 0xF000FF, 0x004000, { 0x004000, 0xEFFFFF }, { 0x200000, 0x200007 }, { 0x300000, 0x30000D }, { 0xF00000, 0xF000FF }, 0x0000, "p18lf2431.inc" , "18lf2431_g.lkr" , 0 },
{ PROC_CLASS_PIC16E , "__18LF2439" , { "pic18lf2439" , "p18lf2439" , "18lf2439" }, 0xA210, 0, 16, 0x0F00, { 0x00, 0x7F }, -1, { -1, -1 }, 0x0FFF, 0xF000FF, 0x003000, { 0x003000, 0xEFFFFF }, { 0x200000, 0x200007 }, { 0x300000, 0x30000D }, { 0xF00000, 0xF000FF }, 0x0000, "p18lf2439.inc" , "18lf2439_g.lkr" , 0 },
{ PROC_CLASS_PIC16E , "__18LF2450" , { "pic18lf2450" , "p18lf2450" , "18lf2450" }, 0xA20A, 0, 16, 0x0F00, { 0x00, 0x5F }, -1, { -1, -1 }, 0x0FFF, 0x003FFF, 0x004000, { -1, -1 }, { 0x200000, 0x200007 }, { 0x300000, 0x30000D }, { -1, -1 }, 0x0000, "p18lf2450.inc" , "18lf2450_g.lkr" , CPU_HAVE_EXTINST },
{ PROC_CLASS_PIC16E , "__18LF2455" , { "pic18lf2455" , "p18lf2455" , "18lf2455" }, 0xA20B, 0, 16, 0x0F00, { 0x00, 0x5F }, -1, { -1, -1 }, 0x0FFF, 0xF000FF, 0x006000, { 0x006000, 0xEFFFFF }, { 0x200000, 0x200007 }, { 0x300000, 0x30000D }, { 0xF00000, 0xF000FF }, 0x0000, "p18lf2455.inc" , "18lf2455_g.lkr" , CPU_HAVE_EXTINST },
{ PROC_CLASS_PIC16E , "__18LF2458" , { "pic18lf2458" , "p18lf2458" , "18lf2458" }, 0xA20C, 0, 16, 0x0F00, { 0x00, 0x5F }, -1, { -1, -1 }, 0x0FFF, 0xF000FF, 0x006000, { 0x006000, 0xEFFFFF }, { 0x200000, 0x200007 }, { 0x300000, 0x30000D }, { 0xF00000, 0xF000FF }, 0x0000, "p18lf2458.inc" , "18lf2458_g.lkr" , CPU_HAVE_EXTINST },
{ PROC_CLASS_PIC16E , "__18LF2480" , { "pic18lf2480" , "p18lf2480" , "18lf2480" }, 0xA20D, 0, 16, 0x0F00, { 0x00, 0x5F }, -1, { -1, -1 }, 0x0FFF, 0xF000FF, 0x004000, { 0x004000, 0xEFFFFF }, { 0x200000, 0x200007 }, { 0x300000, 0x30000D }, { 0xF00000, 0xF000FF }, 0x0000, "p18lf2480.inc" , "18lf2480_g.lkr" , CPU_HAVE_EXTINST },
{ PROC_CLASS_PIC16E , "__18LF2510" , { "pic18lf2510" , "p18lf2510" , "18lf2510" }, 0xA20F, 0, 16, 0x0F00, { 0x00, 0x7F }, -1, { -1, -1 }, 0x0FFF, 0x007FFF, 0x008000, { -1, -1 }, { 0x200000, 0x200007 }, { 0x300000, 0x30000D }, { -1, -1 }, 0x0000, "p18lf2510.inc" , "18lf2510_g.lkr" , CPU_HAVE_EXTINST },
{ PROC_CLASS_PIC16E , "__18LF2515" , { "pic18lf2515" , "p18lf2515" , "18lf2515" }, 0xA211, 0, 16, 0x0F00, { 0x00, 0x7F }, -1, { -1, -1 }, 0x0FFF, 0x00BFFF, 0x00C000, { -1, -1 }, { 0x200000, 0x200007 }, { 0x300000, 0x30000D }, { -1, -1 }, 0x0000, "p18lf2515.inc" , "18lf2515_g.lkr" , CPU_HAVE_EXTINST },
{ PROC_CLASS_PIC16E , "__18LF2520" , { "pic18lf2520" , "p18lf2520" , "18lf2520" }, 0xA212, 0, 16, 0x0F00, { 0x00, 0x7F }, -1, { -1, -1 }, 0x0FFF, 0xF000FF, 0x008000, { 0x008000, 0xEFFFFF }, { 0x200000, 0x200007 }, { 0x300000, 0x30000D }, { 0xF00000, 0xF000FF }, 0x0000, "p18lf2520.inc" , "18lf2520_g.lkr" , CPU_HAVE_EXTINST },
{ PROC_CLASS_PIC16E , "__18LF2523" , { "pic18lf2523" , "p18lf2523" , "18lf2523" }, 0xA213, 0, 16, 0x0F00, { 0x00, 0x7F }, -1, { -1, -1 }, 0x0FFF, 0xF000FF, 0x008000, { 0x008000, 0xEFFFFF }, { 0x200000, 0x200007 }, { 0x300000, 0x30000D }, { 0xF00000, 0xF000FF }, 0x0000, "p18lf2523.inc" , "18lf2523_g.lkr" , CPU_HAVE_EXTINST },
{ PROC_CLASS_PIC16E , "__18LF2525" , { "pic18lf2525" , "p18lf2525" , "18lf2525" }, 0xA214, 0, 16, 0x0F00, { 0x00, 0x7F }, -1, { -1, -1 }, 0x0FFF, 0xF003FF, 0x00C000, { 0x00C000, 0xEFFFFF }, { 0x200000, 0x200007 }, { 0x300000, 0x30000D }, { 0xF00000, 0xF003FF }, 0x0000, "p18lf2525.inc" , "18lf2525_g.lkr" , CPU_HAVE_EXTINST },
{ PROC_CLASS_PIC16E , "__18LF2539" , { "pic18lf2539" , "p18lf2539" , "18lf2539" }, 0xA216, 0, 16, 0x0F00, { 0x00, 0x7F }, -1, { -1, -1 }, 0x0FFF, 0xF000FF, 0x006000, { 0x006000, 0xEFFFFF }, { 0x200000, 0x200007 }, { 0x300000, 0x30000D }, { 0xF00000, 0xF000FF }, 0x0000, "p18lf2539.inc" , "18lf2539_g.lkr" , 0 },
{ PROC_CLASS_PIC16E , "__18LF2550" , { "pic18lf2550" , "p18lf2550" , "18lf2550" }, 0xA217, 0, 16, 0x0F00, { 0x00, 0x5F }, -1, { -1, -1 }, 0x0FFF, 0xF000FF, 0x008000, { 0x008000, 0xEFFFFF }, { 0x200000, 0x200007 }, { 0x300000, 0x30000D }, { 0xF00000, 0xF000FF }, 0x0000, "p18lf2550.inc" , "18lf2550_g.lkr" , CPU_HAVE_EXTINST },
{ PROC_CLASS_PIC16E , "__18LF2553" , { "pic18lf2553" , "p18lf2553" , "18lf2553" }, 0xA218, 0, 16, 0x0F00, { 0x00, 0x5F }, -1, { -1, -1 }, 0x0FFF, 0xF000FF, 0x008000, { 0x008000, 0xEFFFFF }, { 0x200000, 0x200007 }, { 0x300000, 0x30000D }, { 0xF00000, 0xF000FF }, 0x0000, "p18lf2553.inc" , "18lf2553_g.lkr" , CPU_HAVE_EXTINST },
{ PROC_CLASS_PIC16E , "__18LF2580" , { "pic18lf2580" , "p18lf2580" , "18lf2580" }, 0xA219, 0, 16, 0x0F00, { 0x00, 0x5F }, -1, { -1, -1 }, 0x0FFF, 0xF000FF, 0x008000, { 0x008000, 0xEFFFFF }, { 0x200000, 0x200007 }, { 0x300000, 0x30000D }, { 0xF00000, 0xF000FF }, 0x0000, "p18lf2580.inc" , "18lf2580_g.lkr" , CPU_HAVE_EXTINST },
{ PROC_CLASS_PIC16E , "__18LF2585" , { "pic18lf2585" , "p18lf2585" , "18lf2585" }, 0xA21A, 0, 16, 0x0F00, { 0x00, 0x5F }, -1, { -1, -1 }, 0x0FFF, 0xF003FF, 0x00C000, { 0x00C000, 0xEFFFFF }, { 0x200000, 0x200007 }, { 0x300000, 0x30000D }, { 0xF00000, 0xF003FF }, 0x0000, "p18lf2585.inc" , "18lf2585_g.lkr" , CPU_HAVE_EXTINST },
{ PROC_CLASS_PIC16E , "__18LF2610" , { "pic18lf2610" , "p18lf2610" , "18lf2610" }, 0xA21C, 0, 16, 0x0F00, { 0x00, 0x7F }, -1, { -1, -1 }, 0x0FFF, 0x00FFFF, 0x010000, { -1, -1 }, { 0x200000, 0x200007 }, { 0x300000, 0x30000D }, { -1, -1 }, 0x0000, "p18lf2610.inc" , "18lf2610_g.lkr" , CPU_HAVE_EXTINST },
{ PROC_CLASS_PIC16E , "__18LF2620" , { "pic18lf2620" , "p18lf2620" , "18lf2620" }, 0xA21D, 0, 16, 0x0F00, { 0x00, 0x7F }, -1, { -1, -1 }, 0x0FFF, 0xF003FF, 0x010000, { 0x010000, 0xEFFFFF }, { 0x200000, 0x200007 }, { 0x300000, 0x30000D }, { 0xF00000, 0xF003FF }, 0x0000, "p18lf2620.inc" , "18lf2620_g.lkr" , CPU_HAVE_EXTINST },
{ PROC_CLASS_PIC16E , "__18LF2680" , { "pic18lf2680" , "p18lf2680" , "18lf2680" }, 0xA21E, 0, 16, 0x0F00, { 0x00, 0x5F }, -1, { -1, -1 }, 0x0FFF, 0xF003FF, 0x010000, { 0x010000, 0xEFFFFF }, { 0x200000, 0x200007 }, { 0x300000, 0x30000D }, { 0xF00000, 0xF003FF }, 0x0000, "p18lf2680.inc" , "18lf2680_g.lkr" , CPU_HAVE_EXTINST },
{ PROC_CLASS_PIC16E , "__18LF2682" , { "pic18lf2682" , "p18lf2682" , "18lf2682" }, 0xA21F, 0, 16, 0x0F00, { 0x00, 0x5F }, -1, { -1, -1 }, 0x0FFF, 0xF003FF, 0x014000, { 0x014000, 0xEFFFFF }, { 0x200000, 0x200007 }, { 0x300000, 0x30000D }, { 0xF00000, 0xF003FF }, 0x0000, "p18lf2682.inc" , "18lf2682_g.lkr" , CPU_HAVE_EXTINST },
{ PROC_CLASS_PIC16E , "__18LF2685" , { "pic18lf2685" , "p18lf2685" , "18lf2685" }, 0xA220, 0, 16, 0x0F00, { 0x00, 0x5F }, -1, { -1, -1 }, 0x0FFF, 0xF003FF, 0x018000, { 0x018000, 0xEFFFFF }, { 0x200000, 0x200007 }, { 0x300000, 0x30000D }, { 0xF00000, 0xF003FF }, 0x0000, "p18lf2685.inc" , "18lf2685_g.lkr" , CPU_HAVE_EXTINST },
{ PROC_CLASS_PIC16E , "__18LF4220" , { "pic18lf4220" , "p18lf4220" , "18lf4220" }, 0xA223, 0, 16, 0x0F00, { 0x00, 0x7F }, -1, { -1, -1 }, 0x0FFF, 0xF000FF, 0x001000, { 0x001000, 0xEFFFFF }, { 0x200000, 0x200007 }, { 0x300000, 0x30000D }, { 0xF00000, 0xF000FF }, 0x0000, "p18lf4220.inc" , "18lf4220_g.lkr" , 0 },
{ PROC_CLASS_PIC16E , "__18LF4221" , { "pic18lf4221" , "p18lf4221" , "18lf4221" }, 0xA224, 0, 16, 0x0F00, { 0x00, 0x7F }, -1, { -1, -1 }, 0x0FFF, 0xF000FF, 0x001000, { 0x001000, 0xEFFFFF }, { 0x200000, 0x200007 }, { 0x300000, 0x30000D }, { 0xF00000, 0xF000FF }, 0x0000, "p18lf4221.inc" , "18lf4221_g.lkr" , CPU_HAVE_EXTINST },
{ PROC_CLASS_PIC16E , "__18LF4320" , { "pic18lf4320" , "p18lf4320" , "18lf4320" }, 0xA225, 0, 16, 0x0F00, { 0x00, 0x7F }, -1, { -1, -1 }, 0x0FFF, 0xF000FF, 0x002000, { 0x002000, 0xEFFFFF }, { 0x200000, 0x200007 }, { 0x300000, 0x30000D }, { 0xF00000, 0xF000FF }, 0x0000, "p18lf4320.inc" , "18lf4320_g.lkr" , 0 },
{ PROC_CLASS_PIC16E , "__18LF4321" , { "pic18lf4321" , "p18lf4321" , "18lf4321" }, 0xA226, 0, 16, 0x0F00, { 0x00, 0x7F }, -1, { -1, -1 }, 0x0FFF, 0xF000FF, 0x002000, { 0x002000, 0xEFFFFF }, { 0x200000, 0x200007 }, { 0x300000, 0x30000D }, { 0xF00000, 0xF000FF }, 0x0000, "p18lf4321.inc" , "18lf4321_g.lkr" , CPU_HAVE_EXTINST },
{ PROC_CLASS_PIC16E , "__18LF4331" , { "pic18lf4331" , "p18lf4331" , "18lf4331" }, 0xA227, 0, 16, 0x0F00, { 0x00, 0x5F }, -1, { -1, -1 }, 0x0FFF, 0xF000FF, 0x002000, { 0x002000, 0xEFFFFF }, { 0x200000, 0x200007 }, { 0x300000, 0x30000D }, { 0xF00000, 0xF000FF }, 0x0000, "p18lf4331.inc" , "18lf4331_g.lkr" , 0 },
{ PROC_CLASS_PIC16E , "__18LF4410" , { "pic18lf4410" , "p18lf4410" , "18lf4410" }, 0xA228, 0, 16, 0x0F00, { 0x00, 0x7F }, -1, { -1, -1 }, 0x0FFF, 0x003FFF, 0x004000, { -1, -1 }, { 0x200000, 0x200007 }, { 0x300000, 0x30000D }, { -1, -1 }, 0x0000, "p18lf4410.inc" , "18lf4410_g.lkr" , CPU_HAVE_EXTINST },
{ PROC_CLASS_PIC16E , "__18LF4420" , { "pic18lf4420" , "p18lf4420" , "18lf4420" }, 0xA229, 0, 16, 0x0F00, { 0x00, 0x7F }, -1, { -1, -1 }, 0x0FFF, 0xF000FF, 0x004000, { 0x004000, 0xEFFFFF }, { 0x200000, 0x200007 }, { 0x300000, 0x30000D }, { 0xF00000, 0xF000FF }, 0x0000, "p18lf4420.inc" , "18lf4420_g.lkr" , CPU_HAVE_EXTINST },
{ PROC_CLASS_PIC16E , "__18LF4423" , { "pic18lf4423" , "p18lf4423" , "18lf4423" }, 0xA22B, 0, 16, 0x0F00, { 0x00, 0x7F }, -1, { -1, -1 }, 0x0FFF, 0xF000FF, 0x004000, { 0x004000, 0xEFFFFF }, { 0x200000, 0x200007 }, { 0x300000, 0x30000D }, { 0xF00000, 0xF000FF }, 0x0000, "p18lf4423.inc" , "18lf4423_g.lkr" , CPU_HAVE_EXTINST },
{ PROC_CLASS_PIC16E , "__18LF4431" , { "pic18lf4431" , "p18lf4431" , "18lf4431" }, 0xA22C, 0, 16, 0x0F00, { 0x00, 0x5F }, -1, { -1, -1 }, 0x0FFF, 0xF000FF, 0x004000, { 0x004000, 0xEFFFFF }, { 0x200000, 0x200007 }, { 0x300000, 0x30000D }, { 0xF00000, 0xF000FF }, 0x0000, "p18lf4431.inc" , "18lf4431_g.lkr" , 0 },
{ PROC_CLASS_PIC16E , "__18LF4439" , { "pic18lf4439" , "p18lf4439" , "18lf4439" }, 0xA22D, 0, 16, 0x0F00, { 0x00, 0x7F }, -1, { -1, -1 }, 0x0FFF, 0xF000FF, 0x003000, { 0x003000, 0xEFFFFF }, { 0x200000, 0x200007 }, { 0x300000, 0x30000D }, { 0xF00000, 0xF000FF }, 0x0000, "p18lf4439.inc" , "18lf4439_g.lkr" , 0 },
{ PROC_CLASS_PIC16E , "__18LF4450" , { "pic18lf4450" , "p18lf4450" , "18lf4450" }, 0xA22E, 0, 16, 0x0F00, { 0x00, 0x5F }, -1, { -1, -1 }, 0x0FFF, 0x003FFF, 0x004000, { -1, -1 }, { 0x200000, 0x200007 }, { 0x300000, 0x30000D }, { -1, -1 }, 0x0000, "p18lf4450.inc" , "18lf4450_g.lkr" , CPU_HAVE_EXTINST },
{ PROC_CLASS_PIC16E , "__18LF4455" , { "pic18lf4455" , "p18lf4455" , "18lf4455" }, 0xA22F, 0, 16, 0x0F00, { 0x00, 0x5F }, -1, { -1, -1 }, 0x0FFF, 0xF000FF, 0x006000, { 0x006000, 0xEFFFFF }, { 0x200000, 0x200007 }, { 0x300000, 0x30000D }, { 0xF00000, 0xF000FF }, 0x0000, "p18lf4455.inc" , "18lf4455_g.lkr" , CPU_HAVE_EXTINST },
{ PROC_CLASS_PIC16E , "__18LF4458" , { "pic18lf4458" , "p18lf4458" , "18lf4458" }, 0xA230, 0, 16, 0x0F00, { 0x00, 0x5F }, -1, { -1, -1 }, 0x0FFF, 0xF000FF, 0x006000, { 0x006000, 0xEFFFFF }, { 0x200000, 0x200007 }, { 0x300000, 0x30000D }, { 0xF00000, 0xF000FF }, 0x0000, "p18lf4458.inc" , "18lf4458_g.lkr" , CPU_HAVE_EXTINST },
{ PROC_CLASS_PIC16E , "__18LF4480" , { "pic18lf4480" , "p18lf4480" , "18lf4480" }, 0xA231, 0, 16, 0x0F00, { 0x00, 0x5F }, -1, { -1, -1 }, 0x0FFF, 0xF000FF, 0x004000, { 0x004000, 0xEFFFFF }, { 0x200000, 0x200007 }, { 0x300000, 0x30000D }, { 0xF00000, 0xF000FF }, 0x0000, "p18lf4480.inc" , "18lf4480_g.lkr" , CPU_HAVE_EXTINST },
{ PROC_CLASS_PIC16E , "__18LF4510" , { "pic18lf4510" , "p18lf4510" , "18lf4510" }, 0xA234, 0, 16, 0x0F00, { 0x00, 0x7F }, -1, { -1, -1 }, 0x0FFF, 0x007FFF, 0x008000, { -1, -1 }, { 0x200000, 0x200007 }, { 0x300000, 0x30000D }, { -1, -1 }, 0x0000, "p18lf4510.inc" , "18lf4510_g.lkr" , CPU_HAVE_EXTINST },
{ PROC_CLASS_PIC16E , "__18LF4515" , { "pic18lf4515" , "p18lf4515" , "18lf4515" }, 0xA235, 0, 16, 0x0F00, { 0x00, 0x7F }, -1, { -1, -1 }, 0x0FFF, 0x00BFFF, 0x00C000, { -1, -1 }, { 0x200000, 0x200007 }, { 0x300000, 0x30000D }, { -1, -1 }, 0x0000, "p18lf4515.inc" , "18lf4515_g.lkr" , CPU_HAVE_EXTINST },
{ PROC_CLASS_PIC16E , "__18LF4520" , { "pic18lf4520" , "p18lf4520" , "18lf4520" }, 0xA237, 0, 16, 0x0F00, { 0x00, 0x7F }, -1, { -1, -1 }, 0x0FFF, 0xF000FF, 0x008000, { 0x008000, 0xEFFFFF }, { 0x200000, 0x200007 }, { 0x300000, 0x30000D }, { 0xF00000, 0xF000FF }, 0x0000, "p18lf4520.inc" , "18lf4520_g.lkr" , CPU_HAVE_EXTINST },
{ PROC_CLASS_PIC16E , "__18LF4523" , { "pic18lf4523" , "p18lf4523" , "18lf4523" }, 0xA238, 0, 16, 0x0F00, { 0x00, 0x7F }, -1, { -1, -1 }, 0x0FFF, 0xF000FF, 0x008000, { 0x008000, 0xEFFFFF }, { 0x200000, 0x200007 }, { 0x300000, 0x30000D }, { 0xF00000, 0xF000FF }, 0x0000, "p18lf4523.inc" , "18lf4523_g.lkr" , CPU_HAVE_EXTINST },
{ PROC_CLASS_PIC16E , "__18LF4525" , { "pic18lf4525" , "p18lf4525" , "18lf4525" }, 0xA239, 0, 16, 0x0F00, { 0x00, 0x7F }, -1, { -1, -1 }, 0x0FFF, 0xF003FF, 0x00C000, { 0x00C000, 0xEFFFFF }, { 0x200000, 0x200007 }, { 0x300000, 0x30000D }, { 0xF00000, 0xF003FF }, 0x0000, "p18lf4525.inc" , "18lf4525_g.lkr" , CPU_HAVE_EXTINST },
{ PROC_CLASS_PIC16E , "__18LF4539" , { "pic18lf4539" , "p18lf4539" , "18lf4539" }, 0xA23A, 0, 16, 0x0F00, { 0x00, 0x7F }, -1, { -1, -1 }, 0x0FFF, 0xF000FF, 0x006000, { 0x006000, 0xEFFFFF }, { 0x200000, 0x200007 }, { 0x300000, 0x30000D }, { 0xF00000, 0xF000FF }, 0x0000, "p18lf4539.inc" , "18lf4539_g.lkr" , 0 },
{ PROC_CLASS_PIC16E , "__18LF4550" , { "pic18lf4550" , "p18lf4550" , "18lf4550" }, 0xA23B, 0, 16, 0x0F00, { 0x00, 0x5F }, -1, { -1, -1 }, 0x0FFF, 0xF000FF, 0x008000, { 0x008000, 0xEFFFFF }, { 0x200000, 0x200007 }, { 0x300000, 0x30000D }, { 0xF00000, 0xF000FF }, 0x0000, "p18lf4550.inc" , "18lf4550_g.lkr" , CPU_HAVE_EXTINST },
{ PROC_CLASS_PIC16E , "__18LF4553" , { "pic18lf4553" , "p18lf4553" , "18lf4553" }, 0xA23C, 0, 16, 0x0F00, { 0x00, 0x5F }, -1, { -1, -1 }, 0x0FFF, 0xF000FF, 0x008000, { 0x008000, 0xEFFFFF }, { 0x200000, 0x200007 }, { 0x300000, 0x30000D }, { 0xF00000, 0xF000FF }, 0x0000, "p18lf4553.inc" , "18lf4553_g.lkr" , CPU_HAVE_EXTINST },
{ PROC_CLASS_PIC16E , "__18LF4580" , { "pic18lf4580" , "p18lf4580" , "18lf4580" }, 0xA23D, 0, 16, 0x0F00, { 0x00, 0x5F }, -1, { -1, -1 }, 0x0FFF, 0xF000FF, 0x008000, { 0x008000, 0xEFFFFF }, { 0x200000, 0x200007 }, { 0x300000, 0x30000D }, { 0xF00000, 0xF000FF }, 0x0000, "p18lf4580.inc" , "18lf4580_g.lkr" , CPU_HAVE_EXTINST },
{ PROC_CLASS_PIC16E , "__18LF4585" , { "pic18lf4585" , "p18lf4585" , "18lf4585" }, 0xA23E, 0, 16, 0x0F00, { 0x00, 0x5F }, -1, { -1, -1 }, 0x0FFF, 0xF003FF, 0x00C000, { 0x00C000, 0xEFFFFF }, { 0x200000, 0x200007 }, { 0x300000, 0x30000D }, { 0xF00000, 0xF003FF }, 0x0000, "p18lf4585.inc" , "18lf4585_g.lkr" , CPU_HAVE_EXTINST },
{ PROC_CLASS_PIC16E , "__18LF4610" , { "pic18lf4610" , "p18lf4610" , "18lf4610" }, 0xA240, 0, 16, 0x0F00, { 0x00, 0x7F }, -1, { -1, -1 }, 0x0FFF, 0x00FFFF, 0x010000, { -1, -1 }, { 0x200000, 0x200007 }, { 0x300000, 0x30000D }, { -1, -1 }, 0x0000, "p18lf4610.inc" , "18lf4610_g.lkr" , CPU_HAVE_EXTINST },
{ PROC_CLASS_PIC16E , "__18LF4620" , { "pic18lf4620" , "p18lf4620" , "18lf4620" }, 0xA242, 0, 16, 0x0F00, { 0x00, 0x7F }, -1, { -1, -1 }, 0x0FFF, 0xF003FF, 0x010000, { 0x010000, 0xEFFFFF }, { 0x200000, 0x200007 }, { 0x300000, 0x30000D }, { 0xF00000, 0xF003FF }, 0x0000, "p18lf4620.inc" , "18lf4620_g.lkr" , CPU_HAVE_EXTINST },
{ PROC_CLASS_PIC16E , "__18LF4680" , { "pic18lf4680" , "p18lf4680" , "18lf4680" }, 0xA243, 0, 16, 0x0F00, { 0x00, 0x5F }, -1, { -1, -1 }, 0x0FFF, 0xF003FF, 0x010000, { 0x010000, 0xEFFFFF }, { 0x200000, 0x200007 }, { 0x300000, 0x30000D }, { 0xF00000, 0xF003FF }, 0x0000, "p18lf4680.inc" , "18lf4680_g.lkr" , CPU_HAVE_EXTINST },
{ PROC_CLASS_PIC16E , "__18LF4682" , { "pic18lf4682" , "p18lf4682" , "18lf4682" }, 0xA244, 0, 16, 0x0F00, { 0x00, 0x5F }, -1, { -1, -1 }, 0x0FFF, 0xF003FF, 0x014000, { 0x014000, 0xEFFFFF }, { 0x200000, 0x200007 }, { 0x300000, 0x30000D }, { 0xF00000, 0xF003FF }, 0x0000, "p18lf4682.inc" , "18lf4682_g.lkr" , CPU_HAVE_EXTINST },
{ PROC_CLASS_PIC16E , "__18LF4685" , { "pic18lf4685" , "p18lf4685" , "18lf4685" }, 0xA245, 0, 16, 0x0F00, { 0x00, 0x5F }, -1, { -1, -1 }, 0x0FFF, 0xF003FF, 0x018000, { 0x018000, 0xEFFFFF }, { 0x200000, 0x200007 }, { 0x300000, 0x30000D }, { 0xF00000, 0xF003FF }, 0x0000, "p18lf4685.inc" , "18lf4685_g.lkr" , CPU_HAVE_EXTINST },
{ PROC_CLASS_PIC16E , "__18LF6310" , { "pic18lf6310" , "p18lf6310" , "18lf6310" }, 0xA246, 0, 16, 0x0F00, { 0x00, 0x5F }, -1, { -1, -1 }, 0x0FFF, 0x001FFF, 0x002000, { -1, -1 }, { 0x200000, 0x200007 }, { 0x300000, 0x30000D }, { -1, -1 }, 0x0000, "p18lf6310.inc" , "18lf6310_g.lkr" , CPU_HAVE_EXTINST },
{ PROC_CLASS_PIC16E , "__18LF6390" , { "pic18lf6390" , "p18lf6390" , "18lf6390" }, 0xA247, 0, 16, 0x0F00, { 0x00, 0x5F }, -1, { -1, -1 }, 0x0FFF, 0x001FFF, 0x002000, { -1, -1 }, { 0x200000, 0x200007 }, { 0x300000, 0x30000D }, { -1, -1 }, 0x0000, "p18lf6390.inc" , "18lf6390_g.lkr" , CPU_HAVE_EXTINST },
{ PROC_CLASS_PIC16E , "__18LF6393" , { "pic18lf6393" , "p18lf6393" , "18lf6393" }, 0xA248, 0, 16, 0x0F00, { 0x00, 0x5F }, -1, { -1, -1 }, 0x0FFF, 0x001FFF, 0x002000, { -1, -1 }, { 0x200000, 0x200007 }, { 0x300000, 0x30000D }, { -1, -1 }, 0x0000, "p18lf6393.inc" , "18lf6393_g.lkr" , CPU_HAVE_EXTINST },
{ PROC_CLASS_PIC16E , "__18LF6410" , { "pic18lf6410" , "p18lf6410" , "18lf6410" }, 0xA249, 0, 16, 0x0F00, { 0x00, 0x5F }, -1, { -1, -1 }, 0x0FFF, 0x003FFF, 0x004000, { -1, -1 }, { 0x200000, 0x200007 }, { 0x300000, 0x30000D }, { -1, -1 }, 0x0000, "p18lf6410.inc" , "18lf6410_g.lkr" , CPU_HAVE_EXTINST },
{ PROC_CLASS_PIC16E , "__18LF6490" , { "pic18lf6490" , "p18lf6490" , "18lf6490" }, 0xA24A, 0, 16, 0x0F00, { 0x00, 0x5F }, -1, { -1, -1 }, 0x0FFF, 0x003FFF, 0x004000, { -1, -1 }, { 0x200000, 0x200007 }, { 0x300000, 0x30000D }, { -1, -1 }, 0x0000, "p18lf6490.inc" , "18lf6490_g.lkr" , CPU_HAVE_EXTINST },
{ PROC_CLASS_PIC16E , "__18LF6493" , { "pic18lf6493" , "p18lf6493" , "18lf6493" }, 0xA24B, 0, 16, 0x0F00, { 0x00, 0x5F }, -1, { -1, -1 }, 0x0FFF, 0x003FFF, 0x004000, { -1, -1 }, { 0x200000, 0x200007 }, { 0x300000, 0x30000D }, { -1, -1 }, 0x0000, "p18lf6493.inc" , "18lf6493_g.lkr" , CPU_HAVE_EXTINST },
{ PROC_CLASS_PIC16E , "__18LF6520" , { "pic18lf6520" , "p18lf6520" , "18lf6520" }, 0xA24C, 0, 16, 0x0F00, { 0x00, 0x5F }, -1, { -1, -1 }, 0x0FFF, 0xF003FF, 0x008000, { 0x008000, 0xEFFFFF }, { 0x200000, 0x200007 }, { 0x300000, 0x30000D }, { 0xF00000, 0xF003FF }, 0x0000, "p18lf6520.inc" , "18lf6520_g.lkr" , 0 },
{ PROC_CLASS_PIC16E , "__18LF6525" , { "pic18lf6525" , "p18lf6525" , "18lf6525" }, 0xA24D, 0, 16, 0x0F00, { 0x00, 0x5F }, -1, { -1, -1 }, 0x0FFF, 0xF003FF, 0x00C000, { 0x00C000, 0xEFFFFF }, { 0x200000, 0x200007 }, { 0x300000, 0x30000D }, { 0xF00000, 0xF003FF }, 0x0000, "p18lf6525.inc" , "18lf6525_g.lkr" , 0 },
{ PROC_CLASS_PIC16E , "__18LF6527" , { "pic18lf6527" , "p18lf6527" , "18lf6527" }, 0xA24E, 0, 16, 0x0F00, { 0x00, 0x5F }, -1, { -1, -1 }, 0x0FFF, 0xF003FF, 0x00C000, { 0x00C000, 0xEFFFFF }, { 0x200000, 0x200007 }, { 0x300000, 0x30000D }, { 0xF00000, 0xF003FF }, 0x0000, "p18lf6527.inc" , "18lf6527_g.lkr" , CPU_HAVE_EXTINST },
{ PROC_CLASS_PIC16E , "__18LF6585" , { "pic18lf6585" , "p18lf6585" , "18lf6585" }, 0xA24F, 0, 16, 0x0F00, { 0x00, 0x5F }, -1, { -1, -1 }, 0x0FFF, 0xF003FF, 0x00C000, { 0x00C000, 0xEFFFFF }, { 0x200000, 0x200007 }, { 0x300000, 0x30000D }, { 0xF00000, 0xF003FF }, 0x0000, "p18lf6585.inc" , "18lf6585_g.lkr" , 0 },
{ PROC_CLASS_PIC16E , "__18LF6620" , { "pic18lf6620" , "p18lf6620" , "18lf6620" }, 0xA250, 0, 16, 0x0F00, { 0x00, 0x5F }, -1, { -1, -1 }, 0x0FFF, 0xF003FF, 0x010000, { 0x010000, 0xEFFFFF }, { 0x200000, 0x200007 }, { 0x300000, 0x30000D }, { 0xF00000, 0xF003FF }, 0x0000, "p18lf6620.inc" , "18lf6620_g.lkr" , 0 },
{ PROC_CLASS_PIC16E , "__18LF6621" , { "pic18lf6621" , "p18lf6621" , "18lf6621" }, 0xA252, 0, 16, 0x0F00, { 0x00, 0x5F }, -1, { -1, -1 }, 0x0FFF, 0xF003FF, 0x010000, { 0x010000, 0xEFFFFF }, { 0x200000, 0x200007 }, { 0x300000, 0x30000D }, { 0xF00000, 0xF003FF }, 0x0000, "p18lf6621.inc" , "18lf6621_g.lkr" , 0 },
{ PROC_CLASS_PIC16E , "__18LF6622" , { "pic18lf6622" , "p18lf6622" , "18lf6622" }, 0xA253, 0, 16, 0x0F00, { 0x00, 0x5F }, -1, { -1, -1 }, 0x0FFF, 0xF003FF, 0x010000, { 0x010000, 0xEFFFFF }, { 0x200000, 0x200007 }, { 0x300000, 0x30000D }, { 0xF00000, 0xF003FF }, 0x0000, "p18lf6622.inc" , "18lf6622_g.lkr" , CPU_HAVE_EXTINST },
{ PROC_CLASS_PIC16E , "__18LF6627" , { "pic18lf6627" , "p18lf6627" , "18lf6627" }, 0xA254, 0, 16, 0x0F00, { 0x00, 0x5F }, -1, { -1, -1 }, 0x0FFF, 0xF003FF, 0x018000, { 0x018000, 0xEFFFFF }, { 0x200000, 0x200007 }, { 0x300000, 0x30000D }, { 0xF00000, 0xF003FF }, 0x0000, "p18lf6627.inc" , "18lf6627_g.lkr" , CPU_HAVE_EXTINST },
{ PROC_CLASS_PIC16E , "__18LF6628" , { "pic18lf6628" , "p18lf6628" , "18lf6628" }, 0xA255, 0, 16, 0x0F00, { 0x00, 0x5F }, -1, { -1, -1 }, 0x0FFF, 0xF003FF, 0x018000, { 0x018000, 0xEFFFFF }, { 0x200000, 0x200007 }, { 0x300000, 0x30000D }, { 0xF00000, 0xF003FF }, 0x0000, "p18lf6628.inc" , "18lf6628_g.lkr" , CPU_HAVE_EXTINST },
{ PROC_CLASS_PIC16E , "__18LF6680" , { "pic18lf6680" , "p18lf6680" , "18lf6680" }, 0xA256, 0, 16, 0x0F00, { 0x00, 0x5F }, -1, { -1, -1 }, 0x0FFF, 0xF003FF, 0x010000, { 0x010000, 0xEFFFFF }, { 0x200000, 0x200007 }, { 0x300000, 0x30000D }, { 0xF00000, 0xF003FF }, 0x0000, "p18lf6680.inc" , "18lf6680_g.lkr" , 0 },
{ PROC_CLASS_PIC16E , "__18LF6720" , { "pic18lf6720" , "p18lf6720" , "18lf6720" }, 0xA257, 0, 16, 0x0F00, { 0x00, 0x5F }, -1, { -1, -1 }, 0x0FFF, 0xF003FF, 0x020000, { 0x020000, 0xEFFFFF }, { 0x200000, 0x200007 }, { 0x300000, 0x30000D }, { 0xF00000, 0xF003FF }, 0x0000, "p18lf6720.inc" , "18lf6720_g.lkr" , 0 },
{ PROC_CLASS_PIC16E , "__18LF6722" , { "pic18lf6722" , "p18lf6722" , "18lf6722" }, 0xA258, 0, 16, 0x0F00, { 0x00, 0x5F }, -1, { -1, -1 }, 0x0FFF, 0xF003FF, 0x020000, { 0x020000, 0xEFFFFF }, { 0x200000, 0x200007 }, { 0x300000, 0x30000D }, { 0xF00000, 0xF003FF }, 0x0000, "p18lf6722.inc" , "18lf6722_g.lkr" , CPU_HAVE_EXTINST },
{ PROC_CLASS_PIC16E , "__18LF6723" , { "pic18lf6723" , "p18lf6723" , "18lf6723" }, 0xA259, 0, 16, 0x0F00, { 0x00, 0x5F }, -1, { -1, -1 }, 0x0FFF, 0xF003FF, 0x020000, { 0x020000, 0xEFFFFF }, { 0x200000, 0x200007 }, { 0x300000, 0x30000D }, { 0xF00000, 0xF003FF }, 0x0000, "p18lf6723.inc" , "18lf6723_g.lkr" , CPU_HAVE_EXTINST },
{ PROC_CLASS_PIC16E , "__18LF8310" , { "pic18lf8310" , "p18lf8310" , "18lf8310" }, 0xA25A, 0, 16, 0x0F00, { 0x00, 0x5F }, -1, { -1, -1 }, 0x0FFF, 0x001FFF, 0x002000, { -1, -1 }, { 0x200000, 0x200007 }, { 0x300000, 0x30000D }, { -1, -1 }, 0x0000, "p18lf8310.inc" , "18lf8310_g.lkr" , CPU_HAVE_EXTINST },
{ PROC_CLASS_PIC16E , "__18LF8390" , { "pic18lf8390" , "p18lf8390" , "18lf8390" }, 0xA25B, 0, 16, 0x0F00, { 0x00, 0x5F }, -1, { -1, -1 }, 0x0FFF, 0x001FFF, 0x002000, { -1, -1 }, { 0x200000, 0x200007 }, { 0x300000, 0x30000D }, { -1, -1 }, 0x0000, "p18lf8390.inc" , "18lf8390_g.lkr" , CPU_HAVE_EXTINST },
{ PROC_CLASS_PIC16E , "__18LF8393" , { "pic18lf8393" , "p18lf8393" , "18lf8393" }, 0xA25C, 0, 16, 0x0F00, { 0x00, 0x5F }, -1, { -1, -1 }, 0x0FFF, 0x001FFF, 0x002000, { -1, -1 }, { 0x200000, 0x200007 }, { 0x300000, 0x30000D }, { -1, -1 }, 0x0000, "p18lf8393.inc" , "18lf8393_g.lkr" , CPU_HAVE_EXTINST },
{ PROC_CLASS_PIC16E , "__18LF8410" , { "pic18lf8410" , "p18lf8410" , "18lf8410" }, 0xA25D, 0, 16, 0x0F00, { 0x00, 0x5F }, -1, { -1, -1 }, 0x0FFF, 0x003FFF, 0x004000, { -1, -1 }, { 0x200000, 0x200007 }, { 0x300000, 0x30000D }, { -1, -1 }, 0x0000, "p18lf8410.inc" , "18lf8410_g.lkr" , CPU_HAVE_EXTINST },
{ PROC_CLASS_PIC16E , "__18LF8490" , { "pic18lf8490" , "p18lf8490" , "18lf8490" }, 0xA25E, 0, 16, 0x0F00, { 0x00, 0x5F }, -1, { -1, -1 }, 0x0FFF, 0x003FFF, 0x004000, { -1, -1 }, { 0x200000, 0x200007 }, { 0x300000, 0x30000D }, { -1, -1 }, 0x0000, "p18lf8490.inc" , "18lf8490_g.lkr" , CPU_HAVE_EXTINST },
{ PROC_CLASS_PIC16E , "__18LF8493" , { "pic18lf8493" , "p18lf8493" , "18lf8493" }, 0xA25F, 0, 16, 0x0F00, { 0x00, 0x5F }, -1, { -1, -1 }, 0x0FFF, 0x003FFF, 0x004000, { -1, -1 }, { 0x200000, 0x200007 }, { 0x300000, 0x30000D }, { -1, -1 }, 0x0000, "p18lf8493.inc" , "18lf8493_g.lkr" , CPU_HAVE_EXTINST },
{ PROC_CLASS_PIC16E , "__18LF8520" , { "pic18lf8520" , "p18lf8520" , "18lf8520" }, 0xA260, 0, 16, 0x0F00, { 0x00, 0x5F }, -1, { -1, -1 }, 0x0FFF, 0xF003FF, 0x008000, { 0x008000, 0xEFFFFF }, { 0x200000, 0x200007 }, { 0x300000, 0x30000D }, { 0xF00000, 0xF003FF }, 0x0000, "p18lf8520.inc" , "18lf8520_g.lkr" , 0 },
{ PROC_CLASS_PIC16E , "__18LF8525" , { "pic18lf8525" , "p18lf8525" , "18lf8525" }, 0xA261, 0, 16, 0x0F00, { 0x00, 0x5F }, -1, { -1, -1 }, 0x0FFF, 0xF003FF, 0x00C000, { 0x00C000, 0xEFFFFF }, { 0x200000, 0x200007 }, { 0x300000, 0x30000D }, { 0xF00000, 0xF003FF }, 0x0000, "p18lf8525.inc" , "18lf8525_g.lkr" , 0 },
{ PROC_CLASS_PIC16E , "__18LF8527" , { "pic18lf8527" , "p18lf8527" , "18lf8527" }, 0xA262, 0, 16, 0x0F00, { 0x00, 0x5F }, -1, { -1, -1 }, 0x0FFF, 0xF003FF, 0x00C000, { 0x00C000, 0xEFFFFF }, { 0x200000, 0x200007 }, { 0x300000, 0x30000D }, { 0xF00000, 0xF003FF }, 0x0000, "p18lf8527.inc" , "18lf8527_g.lkr" , CPU_HAVE_EXTINST },
{ PROC_CLASS_PIC16E , "__18LF8585" , { "pic18lf8585" , "p18lf8585" , "18lf8585" }, 0xA263, 0, 16, 0x0F00, { 0x00, 0x5F }, -1, { -1, -1 }, 0x0FFF, 0xF003FF, 0x00C000, { 0x00C000, 0xEFFFFF }, { 0x200000, 0x200007 }, { 0x300000, 0x30000D }, { 0xF00000, 0xF003FF }, 0x0000, "p18lf8585.inc" , "18lf8585_g.lkr" , 0 },
{ PROC_CLASS_PIC16E , "__18LF8620" , { "pic18lf8620" , "p18lf8620" , "18lf8620" }, 0xA264, 0, 16, 0x0F00, { 0x00, 0x5F }, -1, { -1, -1 }, 0x0FFF, 0xF003FF, 0x010000, { 0x010000, 0xEFFFFF }, { 0x200000, 0x200007 }, { 0x300000, 0x30000D }, { 0xF00000, 0xF003FF }, 0x0000, "p18lf8620.inc" , "18lf8620_g.lkr" , 0 },
{ PROC_CLASS_PIC16E , "__18LF8621" , { "pic18lf8621" , "p18lf8621" , "18lf8621" }, 0xA265, 0, 16, 0x0F00, { 0x00, 0x5F }, -1, { -1, -1 }, 0x0FFF, 0xF003FF, 0x010000, { 0x010000, 0xEFFFFF }, { 0x200000, 0x200007 }, { 0x300000, 0x30000D }, { 0xF00000, 0xF003FF }, 0x0000, "p18lf8621.inc" , "18lf8621_g.lkr" , 0 },
{ PROC_CLASS_PIC16E , "__18LF8622" , { "pic18lf8622" , "p18lf8622" , "18lf8622" }, 0xA266, 0, 16, 0x0F00, { 0x00, 0x5F }, -1, { -1, -1 }, 0x0FFF, 0xF003FF, 0x010000, { 0x010000, 0xEFFFFF }, { 0x200000, 0x200007 }, { 0x300000, 0x30000D }, { 0xF00000, 0xF003FF }, 0x0000, "p18lf8622.inc" , "18lf8622_g.lkr" , CPU_HAVE_EXTINST },
{ PROC_CLASS_PIC16E , "__18LF8627" , { "pic18lf8627" , "p18lf8627" , "18lf8627" }, 0xA267, 0, 16, 0x0F00, { 0x00, 0x5F }, -1, { -1, -1 }, 0x0FFF, 0xF003FF, 0x018000, { 0x018000, 0xEFFFFF }, { 0x200000, 0x200007 }, { 0x300000, 0x30000D }, { 0xF00000, 0xF003FF }, 0x0000, "p18lf8627.inc" , "18lf8627_g.lkr" , CPU_HAVE_EXTINST },
{ PROC_CLASS_PIC16E , "__18LF8628" , { "pic18lf8628" , "p18lf8628" , "18lf8628" }, 0xA268, 0, 16, 0x0F00, { 0x00, 0x5F }, -1, { -1, -1 }, 0x0FFF, 0xF003FF, 0x018000, { 0x018000, 0xEFFFFF }, { 0x200000, 0x200007 }, { 0x300000, 0x30000D }, { 0xF00000, 0xF003FF }, 0x0000, "p18lf8628.inc" , "18lf8628_g.lkr" , CPU_HAVE_EXTINST },
{ PROC_CLASS_PIC16E , "__18LF8680" , { "pic18lf8680" , "p18lf8680" , "18lf8680" }, 0xA269, 0, 16, 0x0F00, { 0x00, 0x5F }, -1, { -1, -1 }, 0x0FFF, 0xF003FF, 0x010000, { 0x010000, 0xEFFFFF }, { 0x200000, 0x200007 }, { 0x300000, 0x30000D }, { 0xF00000, 0xF003FF }, 0x0000, "p18lf8680.inc" , "18lf8680_g.lkr" , 0 },
{ PROC_CLASS_PIC16E , "__18LF8720" , { "pic18lf8720" , "p18lf8720" , "18lf8720" }, 0xA26A, 0, 16, 0x0F00, { 0x00, 0x5F }, -1, { -1, -1 }, 0x0FFF, 0xF003FF, 0x020000, { 0x020000, 0xEFFFFF }, { 0x200000, 0x200007 }, { 0x300000, 0x30000D }, { 0xF00000, 0xF003FF }, 0x0000, "p18lf8720.inc" , "18lf8720_g.lkr" , 0 },
{ PROC_CLASS_PIC16E , "__18LF8722" , { "pic18lf8722" , "p18lf8722" , "18lf8722" }, 0xA26B, 0, 16, 0x0F00, { 0x00, 0x5F }, -1, { -1, -1 }, 0x0FFF, 0xF003FF, 0x020000, { 0x020000, 0xEFFFFF }, { 0x200000, 0x200007 }, { 0x300000, 0x30000D }, { 0xF00000, 0xF003FF }, 0x0000, "p18lf8722.inc" , "18lf8722_g.lkr" , CPU_HAVE_EXTINST },
{ PROC_CLASS_PIC16E , "__18LF8723" , { "pic18lf8723" , "p18lf8723" , "18lf8723" }, 0xA26C, 0, 16, 0x0F00, { 0x00, 0x5F }, -1, { -1, -1 }, 0x0FFF, 0xF003FF, 0x020000, { 0x020000, 0xEFFFFF }, { 0x200000, 0x200007 }, { 0x300000, 0x30000D }, { 0xF00000, 0xF003FF }, 0x0000, "p18lf8723.inc" , "18lf8723_g.lkr" , CPU_HAVE_EXTINST },
{ PROC_CLASS_PIC14 , "__14000" , { "pic14000" , "p14000" , "14000" }, 0x4000, 2, 2, 0x0080, { -1, -1 }, -1, { -1, -1 }, 0x00FF, 0x000FBF, 0x000FC0, { -1, -1 }, { 0x002000, 0x002003 }, { 0x002007, 0x002007 }, { -1, -1 }, 0x3F80, "p14000.inc" , "14000_g.lkr" , 0 },
{ PROC_CLASS_EEPROM8 , "__EEPROM8" , { "eeprom8" , "eeprom8" , "eeprom8" }, 0x1FFF, 0, 0, 0x0000, { -1, -1 }, -1, { -1, -1 }, -1, 0x0000FF, -1, { -1, -1 }, { -1, -1 }, { -1, -1 }, { -1, -1 }, 0x0000, NULL , NULL , 0 },
{ PROC_CLASS_EEPROM16 , "__EEPROM16" , { "eeprom16" , "eeprom16" , "eeprom16" }, 0x1FFF, 0, 0, 0x0000, { -1, -1 }, -1, { -1, -1 }, -1, 0x00007F, -1, { -1, -1 }, { -1, -1 }, { -1, -1 }, { -1, -1 }, 0x0000, NULL , NULL , 0 },
{ PROC_CLASS_GENERIC , "__GEN" , { "generic" , "gen" , "unknown" }, 0x0000, 0, 0, 0x0000, { -1, -1 }, -1, { -1, -1 }, -1, -1, -1, { -1, -1 }, { 0x002000, 0x002003 }, { -1, -1 }, { -1, -1 }, 0x3F80, NULL , NULL , 0 },
{ PROC_CLASS_PIC12 , "__HCS1365" , { "hcs1365" , "hcs1365" , "hcs1365" }, 0xF365, 2, 4, 0x0060, { -1, -1 }, -1, { -1, -1 }, 0x007F, 0x0003FF, -1, { -1, -1 }, { 0x000400, 0x000403 }, { 0x0007FF, 0x0007FF }, { -1, -1 }, 0x0FF0, NULL , "hcs1365_g.lkr" , 0 },
{ PROC_CLASS_PIC12 , "__HCS1370" , { "hcs1370" , "hcs1370" , "hcs1370" }, 0xF370, 2, 4, 0x0060, { -1, -1 }, -1, { -1, -1 }, 0x007F, 0x0003FF, -1, { -1, -1 }, { 0x000400, 0x000403 }, { 0x0007FF, 0x0007FF }, { -1, -1 }, 0x0FF0, NULL , "hcs1370_g.lkr" , 0 },
{ PROC_CLASS_PIC12 , "__MCV08A" , { "mcv08a" , "mcv08a" , "mcv08a" }, 0xA510, 2, 2, 0x0020, { 0x0A, 0x0F }, 0x00F, { -1, -1 }, 0x003F, 0x0003FF, 0x000400, { -1, -1 }, { 0x000400, 0x000403 }, { 0x000FFF, 0x000FFF }, { -1, -1 }, 0x0FF0, NULL , "mcv08a_g.lkr" , 0 },
{ PROC_CLASS_PIC12 , "__MCV14A" , { "mcv14a" , "mcv14a" , "mcv14a" }, 0xC526, 2, 4, 0x0060, { 0x0D, 0x0F }, -1, { -1, -1 }, 0x007F, 0x0003FF, 0x000400, { -1, -1 }, { 0x000440, 0x000443 }, { 0x000FFF, 0x000FFF }, { 0x000400, 0x00043F }, 0x0FF0, NULL , "mcv14a_g.lkr" , 0 },
{ PROC_CLASS_PIC12 , "__MCV18A" , { "mcv18a" , "mcv18a" , "mcv18a" }, 0xCF54, 1, 1, 0x0000, { -1, -1 }, -1, { -1, -1 }, 0x001F, 0x0001FF, 0x000200, { -1, -1 }, { 0x000200, 0x000203 }, { 0x000FFF, 0x000FFF }, { -1, -1 }, 0x0FF0, NULL , "mcv18a_g.lkr" , 0 },
{ PROC_CLASS_PIC12 , "__MCV28A" , { "mcv28a" , "mcv28a" , "mcv28a" }, 0xCF57, 4, 4, 0x0060, { 0x08, 0x0F }, 0x00F, { -1, -1 }, 0x007F, 0x0007FF, 0x000800, { -1, -1 }, { 0x000800, 0x000803 }, { 0x000FFF, 0x000FFF }, { -1, -1 }, 0x0FF0, NULL , "mcv28a_g.lkr" , 0 },
{ PROC_CLASS_PIC16E , "__PS500" , { "ps500" , "ps500" , "ps500" }, 0x0500, 0, 16, 0x0F00, { 0x00, 0x7F }, -1, { -1, -1 }, 0x0FFF, 0xF000FF, 0x004000, { 0x004000, 0xEFFFFF }, { 0x200000, 0x200007 }, { 0x300000, 0x30000D }, { 0xF00000, 0xF000FF }, 0x0000, "ps500.inc" , "ps500_g.lkr" , 0 },
{ PROC_CLASS_PIC16E , "__PS810" , { "ps810" , "ps810" , "ps810" }, 0x0810, 0, 16, 0x0F00, { 0x00, 0x7F }, -1, { -1, -1 }, 0x0FFF, 0x001FFF, 0x002000, { -1, -1 }, { 0x200000, 0x200007 }, { 0x300000, 0x30000D }, { -1, -1 }, 0x0000, "ps810.inc" , "ps810_g.lkr" , 0 },
{ PROC_CLASS_PIC12 , "__RF509AF" , { "rf509af" , "rf509af" , "rf509af" }, 0x6509, 2, 2, 0x0020, { 0x07, 0x0F }, 0x00F, { -1, -1 }, 0x003F, 0x0003FF, 0x000400, { -1, -1 }, { 0x000400, 0x000403 }, { 0x000FFF, 0x000FFF }, { -1, -1 }, 0x0FF0, "rf509af.inc" , "rf509af_g.lkr" , 0 },
{ PROC_CLASS_PIC12 , "__RF509AG" , { "rf509ag" , "rf509ag" , "rf509ag" }, 0x7509, 2, 2, 0x0020, { 0x07, 0x0F }, 0x00F, { -1, -1 }, 0x003F, 0x0003FF, 0x000400, { -1, -1 }, { 0x000400, 0x000403 }, { 0x000FFF, 0x000FFF }, { -1, -1 }, 0x0FF0, "rf509ag.inc" , "rf509ag_g.lkr" , 0 },
{ PROC_CLASS_PIC14 , "__RF675F" , { "rf675f" , "rf675f" , "rf675f" }, 0x3675, 1, 2, 0x0080, { 0x20, 0x5F }, -1, { -1, -1 }, 0x00DF, 0x00217F, 0x000400, { 0x0003FF, 0x0020FF }, { 0x002000, 0x002003 }, { 0x002007, 0x002007 }, { 0x002100, 0x00217F }, 0x3F80, "rf675f.inc" , "rf675f_g.lkr" , 0 },
{ PROC_CLASS_PIC14 , "__RF675H" , { "rf675h" , "rf675h" , "rf675h" }, 0x4675, 1, 2, 0x0080, { 0x20, 0x5F }, -1, { -1, -1 }, 0x00DF, 0x00217F, 0x000400, { 0x0003FF, 0x0020FF }, { 0x002000, 0x002003 }, { 0x002007, 0x002007 }, { 0x002100, 0x00217F }, 0x3F80, "rf675h.inc" , "rf675h_g.lkr" , 0 },
{ PROC_CLASS_PIC14 , "__RF675K" , { "rf675k" , "rf675k" , "rf675k" }, 0x5675, 1, 2, 0x0080, { 0x20, 0x5F }, -1, { -1, -1 }, 0x00DF, 0x00217F, 0x000400, { 0x0003FF, 0x0020FF }, { 0x002000, 0x002003 }, { 0x002007, 0x002007 }, { 0x002100, 0x00217F }, 0x3F80, "rf675k.inc" , "rf675k_g.lkr" , 0 },
{ PROC_CLASS_SX , "__SX18" , { "sx18ac" , "sx18" , "sx18" }, 0x0018, 4, 4, 0x0000, { -1, -1 }, -1, { -1, -1 }, -1, 0x0007FF, -1, { -1, -1 }, { -1, -1 }, { -1, -1 }, { -1, -1 }, 0x0000, NULL , NULL , 0 },
{ PROC_CLASS_SX , "__SX20" , { "sx20ac" , "sx20" , "sx20" }, 0x0020, 4, 4, 0x0000, { -1, -1 }, -1, { -1, -1 }, -1, 0x0007FF, -1, { -1, -1 }, { -1, -1 }, { -1, -1 }, { -1, -1 }, 0x0000, NULL , NULL , 0 },
{ PROC_CLASS_SX , "__SX28" , { "sx28ac" , "sx28" , "sx28" }, 0x0028, 4, 4, 0x0000, { -1, -1 }, -1, { -1, -1 }, -1, 0x0007FF, -1, { -1, -1 }, { -1, -1 }, { -1, -1 }, { -1, -1 }, 0x0000, NULL , NULL , 0 },
{ PROC_CLASS_SX , "__SX48" , { "sx48bd" , "sx48" , "sx48" }, 0x0048, 8, 8, 0x0000, { -1, -1 }, -1, { -1, -1 }, -1, 0x000FFF, -1, { -1, -1 }, { 0x001000, 0x00100F }, { -1, -1 }, { -1, -1 }, 0x0000, NULL , NULL , 0 },
{ PROC_CLASS_SX , "__SX52" , { "sx52bd" , "sx52" , "sx52" }, 0x0052, 8, 8, 0x0000, { -1, -1 }, -1, { -1, -1 }, -1, 0x000FFF, -1, { -1, -1 }, { 0x001000, 0x00100F }, { -1, -1 }, { -1, -1 }, 0x0000, NULL , NULL , 0 },
};
#define NUM_PICS ARRAY_SIZE(pics)
/*------------------------------------------------------------------------------------------------*/
/*
* Display a list of the processor names.
*/
FUNC(void) gp_dump_processor_list(bool List_all, proc_class_t Class0, proc_class_t Class1, proc_class_t Class2) {
#define COLUMNS 6
#define SPACE_BETWEEN 2 /* number of chars between columns */
#define FAVORITE 1 /* there are 3 names to choose from */
int i;
int length;
int column_width;
int columns;
int num;
const char *name;
bool newline;
#ifdef TIOCGWINSZ
struct winsize ws;
#endif
column_width = 0;
columns = COLUMNS;
newline = false;
for (i = 0; i < NUM_PICS; i++) {
if (!List_all && (pics[i].pclass != Class0) && (pics[i].pclass != Class1) && (pics[i].pclass != Class2)) {
continue;
}
length = strlen(pics[i].names[FAVORITE]);
if (length > column_width) {
column_width = length;
}
}
column_width += SPACE_BETWEEN;
#ifdef TIOCGWINSZ
/* Adapt to available screen width. */
if ((isatty(STDOUT_FILENO) > 0) && (ioctl(STDOUT_FILENO, TIOCGWINSZ, &ws) == 0)) {
columns = ws.ws_col / column_width;
}
else
#endif
{
/* This will in particular be executed when a pipeline
* is set up by a shell command.
*/
const char *width = getenv("COLUMNS");
int w = (width) ? atoi(width) : 80;
/* Check that the line width is reasonable. */
if ((w <= 0) || (w > 240)) {
w = 80;
}
columns = w / column_width;
}
num = 0;
for (i = 0; i < NUM_PICS; i++) {
if (List_all || (pics[i].pclass == Class0) || (pics[i].pclass == Class1) || (pics[i].pclass == Class2)) {
num++;
name = pics[i].names[FAVORITE];
newline = ((num % columns) == 0) ? true : false;
if (i >= (NUM_PICS - 1)) {
printf("%s", name);
}
else if (newline) {
printf("%s\n", name);
}
else {
printf("%-*s", column_width, name);
}
}
}
if (!newline || (num == NUM_PICS)) {
putchar('\n');
}
}
/*------------------------------------------------------------------------------------------------*/
FUNC(void) gp_processor_invoke_custom_lister(proc_class_t Class0, proc_class_t Class1,
proc_class_t Class2, void (*Custom_lister)(pic_processor_t)) {
int i;
pic_processor_t proc;
for (i = 0; i < NUM_PICS; i++) {
proc = &pics[i];
if ((Class0 != PROC_CLASS_UNKNOWN) || (Class1 != PROC_CLASS_UNKNOWN) || (Class2 != PROC_CLASS_UNKNOWN)) {
if ((proc->pclass == Class0) || (proc->pclass == Class1) || (proc->pclass == Class2)) {
(*Custom_lister)(proc);
}
}
else {
(*Custom_lister)(proc);
}
}
}
/*------------------------------------------------------------------------------------------------*/
FUNC(pic_processor_t) gp_find_processor(const char *Name) {
int i;
int j;
for (i = 0; i < NUM_PICS; i++) {
for (j = 0; (j < MAX_NAMES) && (pics[i].names[j]); j++) {
if (strcasecmp(Name, pics[i].names[j]) == 0) {
return &pics[i];
}
}
}
return NULL;
}
/*------------------------------------------------------------------------------------------------*/
FUNC(proc_class_t) gp_processor_class(pic_processor_t Processor) {
return ((Processor) ? Processor->pclass : PROC_CLASS_UNKNOWN);
}
/*------------------------------------------------------------------------------------------------*/
FUNC(const char*) gp_processor_class_to_str(proc_class_t Class) {
if (Class == PROC_CLASS_EEPROM8) {
return "EEPROM8";
}
else if (Class == PROC_CLASS_EEPROM16) {
return "EEPROM16";
}
else if (Class == PROC_CLASS_GENERIC) {
return "GENERIC";
}
else if (Class == PROC_CLASS_PIC12) {
return "PIC12";
}
else if (Class == PROC_CLASS_PIC12E) {
return "PIC12E";
}
else if (Class == PROC_CLASS_PIC12I) {
return "PIC12I";
}
else if (Class == PROC_CLASS_SX) {
return "SX";
}
else if (Class == PROC_CLASS_PIC14) {
return "PIC14";
}
else if (Class == PROC_CLASS_PIC14E) {
return "PIC14E";
}
else if (Class == PROC_CLASS_PIC14EX) {
return "PIC14EX";
}
else if (Class == PROC_CLASS_PIC16) {
return "PIC16";
}
else if (Class == PROC_CLASS_PIC16E) {
return "PIC16E";
}
else {
return "UNKNOWN";
}
}
/*------------------------------------------------------------------------------------------------*/
/* 18xx bsr boundary location */
FUNC(unsigned) gp_processor_bsr_boundary(pic_processor_t Processor) {
if ((Processor) && (Processor->pclass == PROC_CLASS_PIC16E)) {
return (Processor->common_ram_addrs[1] + 1);
}
return 0;
}
/*------------------------------------------------------------------------------------------------*/
FUNC(uint32_t) gp_processor_coff_type(pic_processor_t Processor) {
return ((Processor) ? Processor->coff_type : 0);
}
/*------------------------------------------------------------------------------------------------*/
FUNC(unsigned) gp_processor_num_pages(pic_processor_t Processor) {
return ((Processor) ? Processor->num_pages : 0);
}
/*------------------------------------------------------------------------------------------------*/
FUNC(unsigned) gp_processor_num_banks(pic_processor_t Processor) {
if (Processor) {
return Processor->num_banks;
}
return 0;
}
/*------------------------------------------------------------------------------------------------*/
FUNC(pic_processor_t) gp_processor_coff_proc(uint32_t Coff_type) {
int i;
for (i = 0; i < NUM_PICS; i++) {
if (pics[i].coff_type == Coff_type) {
return &pics[i];
}
}
return NULL;
}
/*------------------------------------------------------------------------------------------------*/
FUNC(const char*) gp_processor_name(pic_processor_t Processor, unsigned Choice) {
assert(!(Choice > (MAX_NAMES - 1)));
return ((Processor) ? Processor->names[Choice] : NULL);
}
/*------------------------------------------------------------------------------------------------*/
FUNC(const char*) gp_processor_coff_name(uint32_t Coff_type, unsigned Choice) {
unsigned i;
if (Coff_type == 0) {
return NULL;
}
assert(!(Choice > (MAX_NAMES - 1)));
for (i = 0; i < NUM_PICS; i++) {
if (pics[i].coff_type == Coff_type) {
return pics[i].names[Choice];
}
}
return NULL;
}
/*------------------------------------------------------------------------------------------------*/
FUNC(const char*) gp_processor_header(pic_processor_t Processor) {
return ((Processor) ? Processor->header : NULL);
}
/*------------------------------------------------------------------------------------------------*/
FUNC(const char*) gp_processor_script(pic_processor_t Processor) {
return ((Processor) ? Processor->script : NULL);
}
/*------------------------------------------------------------------------------------------------*/
FUNC(unsigned) gp_processor_id_location(pic_processor_t Processor) {
return ((Processor->pclass->id_location) ? Processor->pclass->id_location(Processor) : 0);
}
/*------------------------------------------------------------------------------------------------*/
FUNC(int) gp_byte_from_insn(unsigned Shift, int Insn_address) {
return (Insn_address << Shift);
}
/*------------------------------------------------------------------------------------------------*/
FUNC(int) gp_insn_from_byte(unsigned Shift, int Byte_address) {
return (Byte_address >> Shift);
}
/*------------------------------------------------------------------------------------------------*/
FUNC(int) gp_processor_reg_offs(pic_processor_t Processor, int Address) {
if ((Processor == NULL) || (Address < 0)) {
return -1;
}
return (Address & Processor->pclass->bank_mask);
}
/*------------------------------------------------------------------------------------------------*/
FUNC(int) gp_processor_bank_addr(pic_processor_t Processor, int Address) {
if ((Processor == NULL) || (Address < 0)) {
return -1;
}
return (Address & Processor->bank_bits);
}
/*------------------------------------------------------------------------------------------------*/
FUNC(int) gp_processor_bank_num(pic_processor_t Processor, int Address) {
if ((Processor == NULL) || (Address < 0)) {
return -1;
}
return ((Address & Processor->bank_bits) >> Processor->pclass->bank_bits_shift);
}
/*------------------------------------------------------------------------------------------------*/
FUNC(int) gp_processor_addr_from_bank_num(pic_processor_t Processor, int Number) {
if ((Processor == NULL) || (Number < 0)) {
return -1;
}
return ((Number << Processor->pclass->bank_bits_shift) & Processor->bank_bits);
}
/*------------------------------------------------------------------------------------------------*/
FUNC(const int*) gp_processor_common_ram_exist(pic_processor_t Processor) {
if (Processor == NULL) {
return NULL;
}
if ((Processor->common_ram_addrs[0] >= 0) &&
(Processor->common_ram_addrs[0] <= Processor->common_ram_addrs[1])) {
return Processor->common_ram_addrs;
}
return NULL;
}
/*------------------------------------------------------------------------------------------------*/
FUNC(int) gp_processor_is_common_ram_addr(pic_processor_t Processor, int Address) {
const int *cram_addrs;
proc_class_t pclass;
if ((Processor == NULL) || (Address < 0)) {
return -1;
}
pclass = Processor->pclass;
if ((pclass != PROC_CLASS_GENERIC) &&
(pclass != PROC_CLASS_PIC12) &&
(pclass != PROC_CLASS_PIC12E) &&
(pclass != PROC_CLASS_PIC12I) &&
(pclass != PROC_CLASS_SX) &&
(pclass != PROC_CLASS_PIC14) &&
(pclass != PROC_CLASS_PIC14E) &&
(pclass != PROC_CLASS_PIC14EX) &&
(pclass != PROC_CLASS_PIC16) &&
(pclass != PROC_CLASS_PIC16E)) {
return -1;
}
if ((Processor->common_ram_max > 0) && (Address > Processor->common_ram_max)) {
return -1;
}
if (pclass != PROC_CLASS_PIC16E) {
/* The Common RAM - except the PIC16E family - exists in the all RAM banks. */
Address &= pclass->bank_mask;
}
if ((cram_addrs = gp_processor_common_ram_exist(Processor))) {
if ((Address >= cram_addrs[0]) && (Address <= cram_addrs[1])) {
return (Address - cram_addrs[0]);
}
}
return -1;
}
/*------------------------------------------------------------------------------------------------*/
FUNC(bool) gp_processor_is_p16e_access_low(pic_processor_t Processor, int Address) {
const int *cram_addrs;
if ((Processor->pclass != PROC_CLASS_PIC16E) || (Address < 0)) {
return false;
}
if ((cram_addrs = gp_processor_common_ram_exist(Processor))) {
return (((Address >= cram_addrs[0]) && (Address <= cram_addrs[1])) ? true : false);
}
return false;
}
/*------------------------------------------------------------------------------------------------*/
FUNC(bool) gp_processor_is_p16e_access_high(pic_processor_t Processor, int Address, bool Mpasm_compatible) {
const int *cram_addrs;
if ((Processor->pclass != PROC_CLASS_PIC16E) || ((!Mpasm_compatible) && (Address < 0))) {
return false;
}
if ((cram_addrs = gp_processor_common_ram_exist(Processor))) {
int bank_size = Processor->pclass->bank_size;
bool bo = Address > bank_size * 15 + cram_addrs[1];
if (Mpasm_compatible) return bo; // The mpasmx not investigate the upper limit.
return bo && Address < bank_size * 16;
}
return false;
}
/*------------------------------------------------------------------------------------------------*/
FUNC(bool) gp_processor_is_p16e_access(pic_processor_t Processor, int Address, bool Mpasm_compatible) {
return (gp_processor_is_p16e_access_low(Processor, Address) |
gp_processor_is_p16e_access_high(Processor, Address, Mpasm_compatible));
}
/*------------------------------------------------------------------------------------------------*/
FUNC(const int*) gp_processor_linear_ram_exist(pic_processor_t Processor) {
if (!Processor) return NULL;
if ((Processor->linear_ram_addrs[0] > 0) &&
(Processor->linear_ram_addrs[1] >= Processor->linear_ram_addrs[0])) {
return Processor->linear_ram_addrs;
}
return NULL;
}
/*------------------------------------------------------------------------------------------------*/
FUNC(int) gp_processor_is_linear_ram_addr(pic_processor_t Processor, int Address) {
const int *lram_addrs;
if ((Processor == NULL) ||
((Processor->pclass != PROC_CLASS_PIC14E) && (Processor->pclass != PROC_CLASS_PIC14EX))) {
return -1;
}
if (Address < 0) {
return -1;
}
if ((lram_addrs = gp_processor_linear_ram_exist(Processor))) {
if ((Address >= lram_addrs[0]) && (Address <= lram_addrs[1])) {
return (Address - lram_addrs[0]);
}
}
return -1;
}
/*------------------------------------------------------------------------------------------------*/
FUNC(const int*) gp_processor_idlocs_exist(pic_processor_t Processor) {
if (!Processor) return NULL;
if ((Processor->idlocs_addrs[0] > 0) &&
(Processor->idlocs_addrs[1] >= Processor->idlocs_addrs[0])) {
return Processor->idlocs_addrs;
}
return NULL;
}
/*------------------------------------------------------------------------------------------------*/
FUNC(int) gp_processor_is_idlocs_org(pic_processor_t Processor, int Org) {
const int *id_addrs;
if (!Processor || Org<0) return -1;
if ((id_addrs = gp_processor_idlocs_exist(Processor))) {
if ((Org >= id_addrs[0]) && (Org <= id_addrs[1])) {
return (Org - id_addrs[0]);
}
}
return -1;
}
/*------------------------------------------------------------------------------------------------*/
FUNC(int) gp_processor_is_idlocs_byte_addr(pic_processor_t Processor, int Byte_address) {
const int *idlocs;
int start;
int end;
if (Byte_address < 0) return -1;
if ((idlocs = gp_processor_idlocs_exist(Processor))) {
/* There is a need an address conversion. */
start = gp_byte_from_insn(Processor->pclass->org_to_byte_shift, idlocs[0]);
end = idlocs[1] - idlocs[0] + start;
if ((Byte_address >= start) && (Byte_address <= end)) {
return (Byte_address - start);
}
}
return -1;
}
/*------------------------------------------------------------------------------------------------*/
FUNC(const int*) gp_processor_config_exist(pic_processor_t Processor) {
if (!Processor) return NULL;
if ((Processor->config_addrs[0] > 0) &&
(Processor->config_addrs[1] >= Processor->config_addrs[0])) {
return Processor->config_addrs;
}
return NULL;
}
/*------------------------------------------------------------------------------------------------*/
FUNC(int) gp_processor_is_config_org(pic_processor_t Processor, int Org) {
const int *config;
if (!Processor || Org<0) return -1;
if ((config = gp_processor_config_exist(Processor))) {
if ((Org >= config[0]) && (Org <= config[1])) {
return (Org - config[0]);
}
}
return -1;
}
/*------------------------------------------------------------------------------------------------*/
FUNC(int) gp_processor_is_config_byte_addr(pic_processor_t Processor, int Byte_address) {
const int *config;
int start;
int end;
if (Byte_address < 0) return -1;
if ((config = gp_processor_config_exist(Processor))) {
/* There is a need an address conversion. */
start = gp_byte_from_insn(Processor->pclass->org_to_byte_shift, config[0]);
end = config[1] - config[0] + start;
if ((Byte_address >= start) && (Byte_address <= end)) {
return (Byte_address - start);
}
}
return -1;
}
/*------------------------------------------------------------------------------------------------*/
FUNC(const int*) gp_processor_eeprom_exist(pic_processor_t Processor) {
if (!Processor) return NULL;
if ((Processor->eeprom_addrs[0] > 0) &&
(Processor->eeprom_addrs[1] >= Processor->eeprom_addrs[0])) {
return Processor->eeprom_addrs;
}
return NULL;
}
/*------------------------------------------------------------------------------------------------*/
FUNC(int) gp_processor_is_eeprom_org(pic_processor_t Processor, int Org) {
const int *eeprom;
if (!Processor || Org<0) return -1;
if ((eeprom = gp_processor_eeprom_exist(Processor))) {
if ((Org >= eeprom[0]) && (Org <= eeprom[1])) {
return (Org - eeprom[0]);
}
}
return -1;
}
/*------------------------------------------------------------------------------------------------*/
FUNC(int) gp_processor_is_eeprom_byte_addr(pic_processor_t Processor, int Byte_address) {
const int *eeprom;
int start;
int end;
if (Byte_address < 0) {
return -1;
}
if ((eeprom = gp_processor_eeprom_exist(Processor))) {
/* There is a need an address conversion. */
start = gp_byte_from_insn(Processor->pclass->org_to_byte_shift, eeprom[0]);
end = eeprom[1] - eeprom[0] + start;
if ((Byte_address >= start) && (Byte_address <= end)) {
return (Byte_address - start);
}
}
return -1;
}
/*------------------------------------------------------------------------------------------------*/
FUNC(unsigned) gp_processor_rom_width(proc_class_t Class) {
assert(Class->rom_width > 0);
return Class->rom_width;
}
/*------------------------------------------------------------------------------------------------*/
/* Set the page bits, return the number of instructions required. */
FUNC(unsigned) gp_processor_set_page(proc_class_t Class, unsigned Num_pages, unsigned Page, MemBlock_t *M,
unsigned Byte_address, bool Use_wreg) {
return Class->set_page(Num_pages, Page, M, Byte_address, Use_wreg);
}
/*------------------------------------------------------------------------------------------------*/
/* Mask the page bits, if exists. */
FUNC(unsigned) gp_processor_page_addr(proc_class_t Class, unsigned Address) {
return Class->page_addr(Address);
}
/*------------------------------------------------------------------------------------------------*/
FUNC(unsigned) gp_processor_addr_from_page_bits(proc_class_t Class, unsigned Bits) {
return Class->addr_from_page_bits(Bits);
}
/*------------------------------------------------------------------------------------------------*/
/* Set the bank bits, return the number of instructions required. */
FUNC(unsigned) gp_processor_set_bank(proc_class_t Class, unsigned Num_banks, unsigned Bank, MemBlock_t *M,
unsigned Byte_address, bool Mpasm_compatible) {
return Class->set_bank(Num_banks, Bank, M, Byte_address, Mpasm_compatible);
}
/*------------------------------------------------------------------------------------------------*/
FUNC(unsigned) gp_processor_set_ibank(proc_class_t Class, unsigned Num_banks, unsigned Bank, MemBlock_t *M,
unsigned Byte_address) {
return Class->set_ibank(Num_banks, Bank, M, Byte_address);
}
/*------------------------------------------------------------------------------------------------*/
/* determine the value for retlw */
FUNC(unsigned) gp_processor_retlw(proc_class_t Class) {
assert(Class->retlw > 0);
return Class->retlw;
}
/*------------------------------------------------------------------------------------------------*/
FUNC(int) gp_processor_byte_from_insn_c(proc_class_t Class, int Insn_address) {
/* FIXME: In some places we use this value before we know what the
Processor is. Rather than fix those now, I'll just return some
value. */
if (!Class) return Insn_address;
return gp_byte_from_insn(Class->org_to_byte_shift, Insn_address);
}
/*------------------------------------------------------------------------------------------------*/
FUNC(int) gp_processor_byte_from_insn_p(pic_processor_t Processor, int Insn_address) {
if (!Processor) return Insn_address;
return gp_processor_byte_from_insn_c(Processor->pclass, Insn_address);
}
/*------------------------------------------------------------------------------------------------*/
FUNC(int) gp_processor_insn_from_byte_c(proc_class_t Class, int Byte_address) {
/* FIXME: In some places we use this value before we know what the
Processor is. Rather than fix those now, I'll just return some
value. */
if (!Class) return Byte_address;
return gp_insn_from_byte(Class->org_to_byte_shift, Byte_address);
}
/*------------------------------------------------------------------------------------------------*/
FUNC(int) gp_processor_insn_from_byte_p(pic_processor_t Processor, int Byte_address) {
if (!Processor) return Byte_address;
return gp_processor_insn_from_byte_c(Processor->pclass, Byte_address);
}
/*------------------------------------------------------------------------------------------------*/
/* determine which page of program memory the byte address is located */
FUNC(unsigned) gp_processor_check_page(proc_class_t Class, unsigned Insn_address) {
return Class->check_page(Insn_address);
}
/*------------------------------------------------------------------------------------------------*/
/* determine which bank of data memory the address is located */
FUNC(int) gp_processor_bank_from_addr(proc_class_t Class, int Address) {
return Class->bank_from_addr(Address);
}
/*------------------------------------------------------------------------------------------------*/
/* determine which bank of data memory the address is located */
FUNC(int) gp_processor_check_ibank(proc_class_t Class, int Address) {
return Class->check_ibank(Address);
}
/*------------------------------------------------------------------------------------------------*/
/* When unsupported on the pclass. */
static int _xbank_from_addr_unsupported(int Address) {
(void)Address;
assert(0);
return 0;
}
/*------------------------------------------------------------------------------------------------*/
static unsigned _set_bank_unsupported(unsigned Num_banks, unsigned Bank, MemBlock_t *M, unsigned Address,
bool Mpasm_compatible) {
(void)Num_banks;
(void)Bank;
(void)M;
(void)Address;
(void)Mpasm_compatible;
assert(0);
return 0;
}
/*------------------------------------------------------------------------------------------------*/
static unsigned _set_ibank_unsupported(unsigned Num_banks, unsigned Bank, MemBlock_t *M, unsigned Address) {
(void)Num_banks;
(void)Bank;
(void)M;
(void)Address;
assert(0);
return 0;
}
/*------------------------------------------------------------------------------------------------*/
static unsigned _banksel_byte_length_unsupported(unsigned Num_banks, bool Mpasm_compatible) {
(void)Num_banks;
(void)Mpasm_compatible;
assert(0);
return 0;
}
/*------------------------------------------------------------------------------------------------*/
static unsigned
_check_page_unsupported(unsigned Insn_address)
{
(void)Insn_address;
assert(0);
return 0;
}
/*------------------------------------------------------------------------------------------------*/
static unsigned _set_page_unsupported(unsigned Num_pages, unsigned Page, MemBlock_t *M, unsigned Byte_address,
bool Use_wreg) {
(void)Num_pages;
(void)Page;
(void)M;
(void)Byte_address;
(void)Use_wreg;
assert(0);
return 0;
}
/*------------------------------------------------------------------------------------------------*/
static unsigned
_pagesel_byte_length_unsupported(unsigned Num_pages, bool Use_wreg)
{
(void)Num_pages;
(void)Use_wreg;
assert(0);
return 0;
}
/*------------------------------------------------------------------------------------------------*/
static unsigned _page_addr_unsupported(unsigned Address) {
(void)Address;
assert(0);
return 0;
}
/*------------------------------------------------------------------------------------------------*/
static unsigned _addr_from_page_bits_unsupported(unsigned Bits) {
(void)Bits;
assert(0);
return 0;
}
/*------------------------------------------------------------------------------------------------*/
static unsigned
_reloc_unsupported(unsigned Address)
{
(void)Address;
assert(0);
return 0;
}
/*------------------------------------------------------------------------------------------------*/
static unsigned
_reloc_bra_unsupported(const gp_section_t *Section, unsigned Value, unsigned Byte_address)
{
(void)Section;
(void)Value;
(void)Byte_address;
assert(0);
return 0;
}
/*------------------------------------------------------------------------------------------------*/
static unsigned
_reloc_high_unsupported(bool Is_code, unsigned Value)
{
(void)Is_code;
(void)Value;
assert(0);
return 0;
}
/*------------------------------------------------------------------------------------------------*/
/* Common to most */
static const insn_t *
_find_insn_generic(proc_class_t Class, unsigned Opcode)
{
const insn_t *base;
int count;
int i;
base = Class->instructions;
if (base == NULL) {
return NULL;
}
count = *(Class->num_instructions);
for (i = 0; i < count; i++) {
if ((base[i].mask & Opcode) == base[i].opcode) {
return &base[i];
}
}
return NULL;
}
/*------------------------------------------------------------------------------------------------*/
static unsigned
_reloc_high_generic(bool Is_code, unsigned Value)
{
(void)Is_code;
return ((Value >> 8) & 0xff);
}
/*------------------------------------------------------------------------------------------------*/
/* Common to PIC12 and PIC14 */
static unsigned
_set_page_pic12_14(unsigned Num_pages, unsigned Page, MemBlock_t *M, unsigned Byte_address,
bool Use_wreg, unsigned Bcf_insn, unsigned Bsf_insn, unsigned Movlw_insn,
unsigned Movwf_insn, unsigned Location, unsigned Page0, unsigned Page1)
{
uint16_t data;
unsigned insn_byte_len;
char buf[BUFSIZ];
assert(Num_pages <= 4);
if (Num_pages == 1) {
return 0;
}
snprintf(buf, sizeof(buf), "page_%u", Page);
if (Use_wreg) {
data = Movlw_insn | Page;
gp_mem_i_put_le(M, Byte_address, data, buf, NULL);
insn_byte_len = 2;
data = Movwf_insn | Location;
gp_mem_i_put_le(M, Byte_address + insn_byte_len, data, buf, NULL);
insn_byte_len += 2;
}
else {
/* page low bit */
data = ((Page & 1) ? Bsf_insn : Bcf_insn) | Page0 | Location;
gp_mem_i_put_le(M, Byte_address, data, buf, NULL);
insn_byte_len = 2;
if (Num_pages > 2) {
/* page high bit */
data = ((Page & 2) ? Bsf_insn : Bcf_insn) | Page1 | Location;
gp_mem_i_put_le(M, Byte_address + insn_byte_len, data, buf, NULL);
insn_byte_len += 2;
}
}
return insn_byte_len;
}
/*------------------------------------------------------------------------------------------------*/
static unsigned
_pagesel_byte_length_pic12_14(unsigned Num_pages, bool Use_wreg)
{
if (Num_pages == 1) {
return 0;
}
if (Use_wreg) {
return 4;
}
else {
return ((Num_pages > 2) ? 4 : 2);
}
}
/*------------------------------------------------------------------------------------------------*/
static unsigned
_set_bank_pic12_14(unsigned Num_banks, unsigned Bank, MemBlock_t *M, unsigned Byte_address,
unsigned Bcf_insn, unsigned Bsf_insn, unsigned Location,
unsigned Bank0, unsigned Bank1, unsigned Bank2, bool Mpasm_compatible)
{
uint16_t data;
unsigned insn_byte_len;
char buf[BUFSIZ];
/* 16F59 */
assert(Num_banks <= 8);
if (Num_banks == 1) {
return 0;
}
snprintf(buf, sizeof(buf), "bank_%u", Bank);
/* bank low bit */
data = ((Bank & 1) ? Bsf_insn : Bcf_insn) | Bank0 | Location;
gp_mem_i_put_le(M, Byte_address, data, buf, NULL);
insn_byte_len = 2;
if ((Num_banks > 2) || Mpasm_compatible) {
/* bank high bit */
data = ((Bank & 2) ? Bsf_insn : Bcf_insn) | Bank1 | Location;
gp_mem_i_put_le(M, Byte_address + insn_byte_len, data, buf, NULL);
insn_byte_len += 2;
}
if (Num_banks > 4) {
/* bank upper bit */
data = ((Bank & 4) ? Bsf_insn : Bcf_insn) | Bank2 | Location;
gp_mem_i_put_le(M, Byte_address + insn_byte_len, data, buf, NULL);
insn_byte_len += 2;
}
return insn_byte_len;
}
/*------------------------------------------------------------------------------------------------*/
static unsigned
_banksel_byte_length_pic12_14(unsigned Num_banks, bool Mpasm_compatible)
{
int insn_byte_len;
if (Num_banks == 1) {
return 0;
}
insn_byte_len = 2;
if ((Num_banks > 2) || (Mpasm_compatible)) {
insn_byte_len += 2;
}
if (Num_banks > 4) {
insn_byte_len += 2;
}
return insn_byte_len;
}
/*------------------------------------------------------------------------------------------------*/
/* PIC12 */
static unsigned
_id_location_pic12(pic_processor_t Processor)
{
if ((Processor->idlocs_addrs[0] > 0) && (Processor->idlocs_addrs[1] > 0)) {
/* We carry org in the struct px, but return byte address. */
return gp_byte_from_insn(Processor->pclass->org_to_byte_shift, Processor->idlocs_addrs[0]);
}
return 0;
}
/*------------------------------------------------------------------------------------------------*/
static int
_bank_from_addr_pic12(int Address)
{
if (Address < 0) {
return -1;
}
return ((Address >> PIC12_BANK_SHIFT) & PIC12_BMSK_BANK);
}
/*------------------------------------------------------------------------------------------------*/
static unsigned
_set_bank_pic12(unsigned Num_banks, unsigned Bank, MemBlock_t *M, unsigned Byte_address,
bool Mpasm_compatible)
{
return _set_bank_pic12_14(Num_banks, Bank, M, Byte_address,
PIC12_INSN_BCF, PIC12_INSN_BSF,
PIC12_REG_FSR,
PIC12_BIT_FSR_RP0 << PIC12_INSN_BxF_BITSHIFT,
PIC12_BIT_FSR_RP1 << PIC12_INSN_BxF_BITSHIFT,
PIC12_BIT_FSR_RP2 << PIC12_INSN_BxF_BITSHIFT,
Mpasm_compatible);
}
/*------------------------------------------------------------------------------------------------*/
static unsigned
_check_page_pic12(unsigned Insn_address)
{
return ((Insn_address & PIC12_PAGE_BITS) >> PIC12_PAGE_SHIFT);
}
/*------------------------------------------------------------------------------------------------*/
static unsigned
_page_addr_pic12(unsigned Insn_address)
{
return (Insn_address & PIC12_PAGE_BITS);
}
/*------------------------------------------------------------------------------------------------*/
static unsigned
_addr_from_page_bits_pic12(unsigned Bits)
{
return _page_addr_pic12(Bits << PIC12_PAGE_SHIFT);
}
/*------------------------------------------------------------------------------------------------*/
static unsigned
_set_page_pic12(unsigned Num_pages, unsigned Page, MemBlock_t *M, unsigned Byte_address,
bool Use_wreg)
{
return _set_page_pic12_14(Num_pages, Page, M, Byte_address, Use_wreg,
PIC12_INSN_BCF, PIC12_INSN_BSF,
PIC12_INSN_MOVLW, PIC12_INSN_MOVWF,
PIC12_REG_STATUS,
PIC12_BIT_STATUS_PA0 << PIC12_INSN_BxF_BITSHIFT,
PIC12_BIT_STATUS_PA1 << PIC12_INSN_BxF_BITSHIFT);
}
/*------------------------------------------------------------------------------------------------*/
static unsigned
_reloc_call_pic12(unsigned Insn_address)
{
return (Insn_address & PIC12_BMSK_CALL);
}
/*------------------------------------------------------------------------------------------------*/
static unsigned
_reloc_goto_pic12(unsigned Insn_address)
{
return (Insn_address & PIC12_BMSK_GOTO);
}
/*------------------------------------------------------------------------------------------------*/
static unsigned
_reloc_f_pic12(unsigned Address)
{
return (Address & PIC12_BMSK_FILE);
}
/*------------------------------------------------------------------------------------------------*/
static unsigned
_reloc_tris_pic12(unsigned Address)
{
/* TODO This is not accurate, for example PIC12F510/16F506 only has
three bits and allowed values of 6 and 7. MPASM 5.34 has
Error[126] : Argument out of range (0000 not between 0005 and 0009)
*/
/* Seen in the data sheets that everywhere three bits there are in the PIC12 family. */
return (Address & PIC12_BMSK_TRIS);
}
/*------------------------------------------------------------------------------------------------*/
/* PIC12E */
static int
_bank_from_addr_pic12e(int Address)
{
if (Address < 0) {
return -1;
}
return ((Address >> PIC12_BANK_SHIFT) & PIC12E_BMSK_BANK);
}
/*------------------------------------------------------------------------------------------------*/
static unsigned
_set_bank_pic12e(unsigned Num_banks, unsigned Bank, MemBlock_t *M, unsigned Byte_address,
bool Mpasm_compatible)
{
uint16_t data;
char buf[BUFSIZ];
(void)Mpasm_compatible;
Bank &= PIC12E_BMSK_BANK;
data = PIC12E_INSN_MOVLB | Bank;
snprintf(buf, sizeof(buf), "bank_%u", Bank);
gp_mem_i_put_le(M, Byte_address, data, buf, NULL);
return 2;
}
/*------------------------------------------------------------------------------------------------*/
static unsigned
_banksel_byte_length_pic12e(unsigned Num_banks, bool Mpasm_compatible)
{
(void)Num_banks;
(void)Mpasm_compatible;
return 2;
}
/*------------------------------------------------------------------------------------------------*/
static unsigned
_reloc_tris_pic12e(unsigned address)
{
return (address & PIC12_BMSK_TRIS);
}
/*------------------------------------------------------------------------------------------------*/
static const insn_t *
_find_insn_pic12e(proc_class_t Class, unsigned Opcode)
{
unsigned i;
(void)Class;
/* First explore the enhanced instruction set. */
for (i = 0; i < num_op_16c5xx_enh; i++) {
if ((op_16c5xx_enh[i].mask & Opcode) == op_16c5xx_enh[i].opcode) {
return &op_16c5xx_enh[i];
}
}
for (i = 0; i < num_op_12c5xx; i++) {
if ((op_12c5xx[i].mask & Opcode) == op_12c5xx[i].opcode) {
return &op_12c5xx[i];
}
}
return NULL;
}
/*------------------------------------------------------------------------------------------------*/
/* SX */
static unsigned
_check_page_sx(unsigned Insn_address)
{
return ((Insn_address & PIC12_PAGE_BITS) >> PIC12_PAGE_SHIFT);
}
/*------------------------------------------------------------------------------------------------*/
static unsigned
_page_addr_sx(unsigned Insn_address)
{
return (Insn_address & PIC12_PAGE_BITS);
}
/*------------------------------------------------------------------------------------------------*/
static unsigned
_addr_from_page_bits_sx(unsigned Bits)
{
return _page_addr_sx(Bits << PIC12_PAGE_SHIFT);
}
/*------------------------------------------------------------------------------------------------*/
static unsigned
_set_page_sx(unsigned Num_pages, unsigned Page, MemBlock_t *M, unsigned Byte_address,
bool Use_wreg)
{
uint16_t data;
char buf[BUFSIZ];
if (Num_pages == 1) {
return 0;
}
Page &= MASK_SX_PAGE;
snprintf(buf, sizeof(buf), "page_%u", Page);
data = SX_INSN_PAGE | Page;
gp_mem_i_put_le(M, Byte_address, data, buf, NULL);
return 2;
}
/*------------------------------------------------------------------------------------------------*/
/* PIC14 */
static unsigned
_id_location_pic14(pic_processor_t Processor)
{
if ((Processor->idlocs_addrs[0] > 0) && (Processor->idlocs_addrs[1] > 0)) {
/* We carry org in the struct px, but return byte address. */
return gp_byte_from_insn(Processor->pclass->org_to_byte_shift, Processor->idlocs_addrs[0]);
}
return 0;
}
/*------------------------------------------------------------------------------------------------*/
static int
_bank_from_addr_pic14(int Address)
{
if (Address < 0) {
return -1;
}
return ((Address >> PIC14_BANK_SHIFT) & PIC14_BMSK_BANK);
}
/*------------------------------------------------------------------------------------------------*/
static unsigned
_set_bank_pic14(unsigned Num_banks, unsigned Bank, MemBlock_t *M, unsigned Byte_address,
bool Mpasm_compatible)
{
return _set_bank_pic12_14(Num_banks, Bank, M, Byte_address,
PIC14_INSN_BCF, PIC14_INSN_BSF,
PIC14_REG_STATUS,
PIC14_BIT_STATUS_RP0 << PIC14_INSN_BxF_BITSHIFT,
PIC14_BIT_STATUS_RP1 << PIC14_INSN_BxF_BITSHIFT,
-1,
Mpasm_compatible);
}
/*------------------------------------------------------------------------------------------------*/
static int
_check_ibank_pic14(int Address)
{
if (Address < 0) {
return -1;
}
return ((Address >> 8) & 0x0f);
}
/*------------------------------------------------------------------------------------------------*/
static unsigned _set_ibank_pic14(unsigned Num_banks, unsigned Bank, MemBlock_t *M, unsigned Byte_address) {
/* bcf STATUS,7 or bsf STATUS,7 (STATUS: 3) */
/* bcf: 01 00bb bfff ffff
* bsf: 01 01bb bfff ffff */
gp_mem_i_put_le(M, Byte_address, (Bank == 0) ? 0x1383 : 0x1783, (Bank == 0) ? "ibank0" : "ibank1", NULL);
return 2;
}
/*------------------------------------------------------------------------------------------------*/
static unsigned _check_page_pic14(unsigned insn_address) {
return ((insn_address & PIC14_PAGE_BITS) >> PIC14_PAGE_SHIFT);
}
/*------------------------------------------------------------------------------------------------*/
static unsigned
_page_addr_pic14(unsigned Insn_address)
{
return (Insn_address & PIC14_PAGE_BITS);
}
/*------------------------------------------------------------------------------------------------*/
static unsigned
_addr_from_page_bits_pic14(unsigned Bits)
{
return _page_addr_pic14(Bits << PIC14_PAGE_SHIFT);
}
/*------------------------------------------------------------------------------------------------*/
static unsigned
_set_page_pic14(unsigned Num_pages, unsigned Page, MemBlock_t *M, unsigned Byte_address,
bool Use_wreg)
{
return _set_page_pic12_14(Num_pages, Page, M, Byte_address, Use_wreg,
PIC14_INSN_BCF, PIC14_INSN_BSF,
PIC14_INSN_MOVLW, PIC14_INSN_MOVWF,
PIC14_REG_PCLATH,
PIC14_BIT_PCLATH_3 << PIC14_INSN_BxF_BITSHIFT,
PIC14_BIT_PCLATH_4 << PIC14_INSN_BxF_BITSHIFT);
}
/*------------------------------------------------------------------------------------------------*/
static unsigned
_reloc_call_pic14(unsigned Insn_address)
{
return (Insn_address & PIC14_BMSK_BRANCH);
}
/*------------------------------------------------------------------------------------------------*/
static unsigned
_reloc_goto_pic14(unsigned Insn_address)
{
return (Insn_address & PIC14_BMSK_BRANCH);
}
/*------------------------------------------------------------------------------------------------*/
static unsigned
_reloc_f_pic14(unsigned Address)
{
return (Address & PIC14_BMSK_FILE);
}
/*------------------------------------------------------------------------------------------------*/
static unsigned
_reloc_tris_pic14(unsigned Address)
{
/* According to the data sheets, the TRIS instruction does not exist in the PIC14 family. */
return (Address & PIC14_BMSK_TRIS);
}
/*------------------------------------------------------------------------------------------------*/
static void
_patch_strict_pic14(void)
{
unsigned i;
unsigned j;
for (i = 0, j = 0; (i < num_op_16cxx) && (j < num_op_16cxx_strict_mask); ++i) {
if (strcasecmp(op_16cxx[i].name, op_16cxx_strict_mask[j].name) == 0) {
op_16cxx[i].mask = op_16cxx_strict_mask[j].mask;
++j;
}
}
}
/*------------------------------------------------------------------------------------------------*/
/* PIC14E */
static int
_bank_from_addr_pic14e(int Address)
{
if (Address < 0) {
return -1;
}
return ((Address >> PIC14_BANK_SHIFT) & PIC14E_BMSK_BANK);
}
/*------------------------------------------------------------------------------------------------*/
static unsigned
_set_bank_pic14e(unsigned Num_banks, unsigned Bank, MemBlock_t *M, unsigned Byte_address,
bool Mpasm_compatible)
{
uint16_t data;
char buf[BUFSIZ];
(void)Mpasm_compatible;
Bank &= PIC14E_BMSK_BANK;
data = PIC14E_INSN_MOVLB | Bank;
snprintf(buf, sizeof(buf), "bank_%u", Bank);
gp_mem_i_put_le(M, Byte_address, data, buf, NULL);
return 2;
}
/*------------------------------------------------------------------------------------------------*/
static unsigned
_banksel_byte_length_pic14e(unsigned Num_banks, bool Mpasm_compatible)
{
(void)Num_banks;
(void)Mpasm_compatible;
return 2;
}
/*------------------------------------------------------------------------------------------------*/
static int
_check_ibank_pic14e(int Address)
{
if (Address < 0) {
return -1;
}
return ((Address >> 8) & 0x0f);
}
/*------------------------------------------------------------------------------------------------*/
static unsigned
_set_ibank_pic14e(unsigned Num_banks, unsigned Bank, MemBlock_t *M, unsigned Byte_address)
{
/* bcf: 01 00bb bfff ffff
* bsf: 01 01bb bfff ffff
* PIC14E
* FSR0H: 0000bbbb
* FSR0L: blllllll
* PIC14EX
* FSR0H: 000bbbbb
* FSR0L: blllllll
*/
unsigned mask;
unsigned bit;
char buf[BUFSIZ];
snprintf(buf, sizeof(buf), "bank_%u", Bank);
Num_banks >>= 1; /* FSR0L bit 7. */
for (bit = 0, mask = 0x01; mask < Num_banks; ++bit, mask <<= 1, Byte_address += 2)
gp_mem_i_put_le(M,
Byte_address,
((Bank & mask) ? PIC14_INSN_BSF : PIC14_INSN_BCF) |
(bit << PIC14_INSN_BxF_BITSHIFT) |
PIC14E_REG_FSR0H,
buf, NULL);
return (bit * 2);
}
/*------------------------------------------------------------------------------------------------*/
static unsigned
_check_page_pic14e(unsigned Insn_address)
{
return ((Insn_address >> 8) & PIC14E_BMSK_PAGE512);
}
/*------------------------------------------------------------------------------------------------*/
static unsigned
_page_addr_pic14e(unsigned Insn_address)
{
return (Insn_address & PIC14E_PAGE_BITS);
}
/*------------------------------------------------------------------------------------------------*/
static unsigned
_addr_from_page_bits_pic14e(unsigned Bits)
{
return _page_addr_pic14e(Bits << 8);
}
/*------------------------------------------------------------------------------------------------*/
static unsigned
_set_page_pic14e(unsigned Num_pages, unsigned Page, MemBlock_t *M, unsigned Byte_address,
bool Use_wreg)
{
uint16_t data;
unsigned insn_byte_len;
char buf[BUFSIZ];
if (Num_pages == 1) {
return 0;
}
/* Page is in bits 6:0 of PCLATH. */
Page &= PIC14E_BMSK_PAGE512;
snprintf(buf, sizeof(buf), "page_%u", Page);
if (Use_wreg) {
data = PIC14_INSN_MOVLW | Page;
gp_mem_i_put_le(M, Byte_address, data, buf, NULL);
insn_byte_len = 2;
data = PIC14_INSN_MOVWF | PIC14_REG_PCLATH;
gp_mem_i_put_le(M, Byte_address + insn_byte_len, data, buf, NULL);
insn_byte_len += 2;
}
else {
data = PIC14E_INSN_MOVLP | Page;
gp_mem_i_put_le(M, Byte_address, data, buf, NULL);
insn_byte_len = 2;
}
return insn_byte_len;
}
/*------------------------------------------------------------------------------------------------*/
static unsigned
_pagesel_byte_length_pic14e(unsigned Num_pages, bool Use_wreg)
{
if (Num_pages == 1) {
return 0;
}
return ((Use_wreg) ? 4 : 2);
}
/*------------------------------------------------------------------------------------------------*/
static unsigned
_reloc_movlb_pic14e(unsigned Address)
{
return ((Address >> PIC14_BANK_SHIFT) & 0xff);
}
/*------------------------------------------------------------------------------------------------*/
static unsigned
_reloc_bra_pic14e(const gp_section_t *Section, unsigned Value, unsigned Byte_address)
{
int offset;
offset = Value - (Byte_address / 2) - 1;
if ((offset > 0xff) || (offset < -0x100)) {
gp_warning("Relative branch out of range in at %#x of section \"%s\".", Byte_address << 1, Section->name);
}
return (offset & PIC14E_BMSK_RBRA9);
}
/*------------------------------------------------------------------------------------------------*/
static unsigned
_reloc_high_pic14e(bool Is_code, unsigned Value)
{
/* set 7th bit if in is_code */
return (((Value >> 8) & 0xff) | (Is_code ? PIC14E_FSRxH_FLASH_SEL : 0));
}
/*------------------------------------------------------------------------------------------------*/
static const insn_t *
_find_insn_pic14e(proc_class_t Class, unsigned Opcode)
{
unsigned i;
(void)Class;
/* might be from the enhanced instruction set */
for (i = 0; i < num_op_16cxx_enh; i++) {
if ((op_16cxx_enh[i].mask & Opcode) == op_16cxx_enh[i].opcode) {
return &op_16cxx_enh[i];
}
}
for (i = 0; i < num_op_16cxx; i++) {
if ((op_16cxx[i].mask & Opcode) == op_16cxx[i].opcode) {
return &op_16cxx[i];
}
}
return NULL;
}
/*------------------------------------------------------------------------------------------------*/
/* PIC14EX */
static int
_bank_from_addr_pic14ex(int Address)
{
if (Address < 0) {
return -1;
}
return ((Address >> PIC14_BANK_SHIFT) & PIC14EX_BMSK_BANK);
}
/*------------------------------------------------------------------------------------------------*/
static unsigned
_set_bank_pic14ex(unsigned Num_banks, unsigned Bank, MemBlock_t *M, unsigned Byte_address,
bool Mpasm_compatible)
{
uint16_t data;
char buf[BUFSIZ];
(void)Mpasm_compatible;
Bank &= PIC14EX_BMSK_BANK;
data = PIC14EX_INSN_MOVLB | Bank;
snprintf(buf, sizeof(buf), "bank_%u", Bank);
gp_mem_i_put_le(M, Byte_address, data, buf, NULL);
return 2;
}
/*------------------------------------------------------------------------------------------------*/
static const insn_t *
_find_insn_pic14ex(proc_class_t Class, unsigned Opcode)
{
unsigned i;
(void)Class;
/* might be from the enhanced instruction set */
for (i = 0; i < num_op_16cxx_enhx; i++) {
if ((op_16cxx_enhx[i].mask & Opcode) == op_16cxx_enhx[i].opcode) {
return &op_16cxx_enhx[i];
}
}
for (i = 0; i < num_op_16cxx; i++) {
if ((op_16cxx[i].mask & Opcode) == op_16cxx[i].opcode) {
return &op_16cxx[i];
}
}
return NULL;
}
/*------------------------------------------------------------------------------------------------*/
/* PIC16 */
static int
_bank_from_addr_pic16(int Address)
{
if (Address < 0) {
return -1;
}
if ((Address & 0xff) < 0x20) {
return (Address >> PIC16_BANK_SHIFT) & PIC16_BMSK_BANK;
}
else {
/* 0x200 turns MOVLB to MOVLR for setting GPR RAM bank in set_bank. */
return (0x200 + ((Address >> PIC16_BANK_SHIFT) & PIC16_BMSK_BANK));
}
}
/*------------------------------------------------------------------------------------------------*/
static unsigned
_set_bank_pic16(unsigned Num_banks, unsigned Bank, MemBlock_t *M, unsigned Byte_address,
bool Mpasm_compatible)
{
char buf[BUFSIZ];
(void)Mpasm_compatible;
Bank &= 0x200 | PIC16_BMSK_BANK;
snprintf(buf, sizeof(buf), "bank_%u", Bank & PIC16_BMSK_BANK);
gp_mem_i_put_le(M, Byte_address, PIC16_INSN_MOVLB | Bank, buf, NULL);
return 2;
}
/*------------------------------------------------------------------------------------------------*/
static unsigned
_set_ibank_pic16(unsigned Num_banks, unsigned Bank, MemBlock_t *M, unsigned Byte_address)
{
return _set_bank_pic16(Num_banks, Bank, M, Byte_address, false);
}
/*------------------------------------------------------------------------------------------------*/
static unsigned
_banksel_byte_length_pic16(unsigned Num_banks, bool Mpasm_compatible)
{
(void)Num_banks;
(void)Mpasm_compatible;
return 2;
}
/*------------------------------------------------------------------------------------------------*/
static unsigned
_check_page_pic16(unsigned Insn_address)
{
return ((Insn_address >> 8) & PIC16_BMSK_PAGE);
}
/*------------------------------------------------------------------------------------------------*/
static unsigned
_page_addr_pic16(unsigned Insn_address)
{
return (Insn_address & (PIC16_BMSK_PAGE << 8));
}
/*------------------------------------------------------------------------------------------------*/
static unsigned
_addr_from_page_bits_pic16(unsigned Bits)
{
return _page_addr_pic16(Bits << 8);
}
/*------------------------------------------------------------------------------------------------*/
static unsigned
_set_page_pic16(unsigned Num_pages, unsigned Page, MemBlock_t *M, unsigned Byte_address,
bool Use_wreg)
{
uint16_t data;
char buf[BUFSIZ];
Page &= PIC16_BMSK_PAGE;
snprintf(buf, sizeof(buf), "page_%u", Page);
data = PIC16_INSN_MOVLW | Page;
gp_mem_i_put_le(M, Byte_address, data, buf, NULL);
data = PIC16_INSN_MOVWF | PIC16_REG_PCLATH;
gp_mem_i_put_le(M, Byte_address + 2, data, buf, NULL);
return 4;
}
/*------------------------------------------------------------------------------------------------*/
static unsigned
_pagesel_byte_length_pic16(unsigned Num_pages, bool Use_wreg)
{
(void)Num_pages;
(void)Use_wreg;
return 4;
}
/*------------------------------------------------------------------------------------------------*/
static unsigned
_reloc_call_pic16(unsigned Insn_address)
{
return (Insn_address & PIC16_BMSK_BRANCH);
}
/*------------------------------------------------------------------------------------------------*/
static unsigned
_reloc_goto_pic16(unsigned Insn_address)
{
return (Insn_address & PIC16_BMSK_BRANCH);
}
/*------------------------------------------------------------------------------------------------*/
static unsigned
_reloc_f_pic16(unsigned Address)
{
return (Address & PIC16_BMSK_FILE);
}
/*------------------------------------------------------------------------------------------------*/
/* PIC16E */
static unsigned
_id_location_pic16e(pic_processor_t Processor)
{
if ((Processor->idlocs_addrs[0] > 0) && (Processor->idlocs_addrs[1] > 0)) {
return Processor->idlocs_addrs[0];
}
return 0;
}
/*------------------------------------------------------------------------------------------------*/
static unsigned
_set_bank_pic16e(unsigned Num_banks, unsigned Bank, MemBlock_t *M, unsigned Byte_address,
bool Mpasm_compatible)
{
char buf[BUFSIZ];
(void)Mpasm_compatible;
Bank &= ~PIC16E_MASK_MOVLB;
snprintf(buf, sizeof(buf), "bank_%u", Bank);
gp_mem_i_put_le(M, Byte_address, PIC16E_INSN_MOVLB | Bank, buf, NULL);
return 2;
}
/*------------------------------------------------------------------------------------------------*/
static unsigned
_reloc_call_pic16e(unsigned Insn_address)
{
return ((Insn_address >> 1) & PIC16E_BMSK_BRANCH_LOWER);
}
/*------------------------------------------------------------------------------------------------*/
static unsigned
_reloc_goto_pic16e(unsigned insn_address)
{
return ((insn_address >> 1) & PIC16E_BMSK_BRANCH_LOWER);
}
/*------------------------------------------------------------------------------------------------*/
static unsigned
_reloc_movlb_pic16e(unsigned Address)
{
/* The upper byte of the symbol is used for the BSR. This is inconsistent
with the datasheet and the assembler, but is done to maintain
compatibility with mplink. */
/* return ((Address >> PIC16_BANK_SHIFT) & 0xff); */
return ((Address >> PIC16_BANK_SHIFT) & PIC16E_BMSK_MOVLB);
}
/*------------------------------------------------------------------------------------------------*/
static unsigned
_reloc_bra_pic16e(const gp_section_t *Section, unsigned Value, unsigned Byte_address)
{
int offset;
if (Value & 1) {
gp_warning("Destination address must be word aligned at %#x of section \"%s\".",
Byte_address, Section->name);
}
offset = ((int)(Value - Byte_address - 2)) >> 1;
if ((offset > 0x3ff) || (offset < -0x400)) {
gp_warning("Relative branch out of range in at %#x of section \"%s\".",
Byte_address, Section->name);
}
return (offset & PIC16E_BMSK_RBRA11);
}
/*------------------------------------------------------------------------------------------------*/
static const insn_t *
_find_insn_pic16e(proc_class_t Class, unsigned Opcode)
{
unsigned i;
(void)Class;
if (gp_decode_mnemonics) {
for (i = 0; i < num_op_18cxx_sp; i++) {
if ((op_18cxx_sp[i].mask & Opcode) == op_18cxx_sp[i].opcode) {
return &op_18cxx_sp[i];
}
}
}
for (i = 0; i < num_op_18cxx; i++) {
if ((op_18cxx[i].mask & Opcode) == op_18cxx[i].opcode) {
return &op_18cxx[i];
}
}
if (gp_decode_extended) {
/* might be from the extended instruction set */
for (i = 0; i < num_op_18cxx_ext; i++) {
if ((op_18cxx_ext[i].mask & Opcode) == op_18cxx_ext[i].opcode) {
return &op_18cxx_ext[i];
}
}
}
return NULL;
}
/*------------------------------------------------------------------------------------------------*/
static int _cdecl _core_sfr_cmp(const void *P0, const void *P1)
{
const core_sfr_t *sfr0 = (const core_sfr_t *)P0;
const core_sfr_t *sfr1 = (const core_sfr_t *)P1;
unsigned address0 = sfr0->address;
unsigned address1 = sfr1->address;
if (address0 < address1) {
return -1;
}
if (address0 > address1) {
return 1;
}
return 0;
}
/*------------------------------------------------------------------------------------------------*/
FUNC(const core_sfr_t*) gp_processor_find_sfr(proc_class_t Class, unsigned Address) {
core_sfr_t sfr;
if ((Class == NULL) || (Class->core_sfr_table == NULL) || (Class->core_sfr_number == 0)) {
return NULL;
}
sfr.address = Address;
return (core_sfr_t *)bsearch(&sfr, Class->core_sfr_table, Class->core_sfr_number,
sizeof(core_sfr_t), _core_sfr_cmp);
}
/*------------------------------------------------------------------------------------------------*/
FUNC(const char*)
gp_processor_find_sfr_name(proc_class_t Class, unsigned Address)
{
const core_sfr_t *ret;
ret = gp_processor_find_sfr(Class, Address);
return ((ret) ? ret->name : NULL);
}
/*------------------------------------------------------------------------------------------------*/
static int _cdecl _vector_cmp(const void *P0, const void *P1)
{
const vector_t *v0 = (const vector_t *)P0;
const vector_t *v1 = (const vector_t *)P1;
unsigned address0 = v0->address;
unsigned address1 = v1->address;
if (address0 < address1) {
return -1;
}
else if (address0 > address1) {
return 1;
}
else {
return 0;
}
}
/*------------------------------------------------------------------------------------------------*/
FUNC(const vector_t*) gp_processor_find_vector(proc_class_t Class, unsigned Address) {
vector_t vec;
if ((Class == NULL) || (Class->vector_table == NULL) || (Class->vector_number == 0)) {
return NULL;
}
vec.address = Address;
return (vector_t *)bsearch(&vec, Class->vector_table, Class->vector_number,
sizeof(vector_t), _vector_cmp);
}
/*------------------------------------------------------------------------------------------------*/
static const core_sfr_t _core_sfr_table_pic12[] = {
{ 0x000, "INDF" },
{ 0x002, "PCL" },
{ 0x003, "STATUS" },
{ 0x004, "FSR" }
};
static const vector_t _vector_table_pic12[] = {
{ 0x000, "vector_reset" }
};
static const core_sfr_t _core_sfr_table_sx[] = {
{ 0x000, "INDF" },
{ 0x001, "RTCC" },
{ 0x002, "PC" },
{ 0x003, "STATUS" },
{ 0x004, "FSR" },
{ 0x005, "RA" },
{ 0x006, "RB" },
{ 0x007, "RC" }
};
static const vector_t _vector_table_sx[] = {
{ 0x000, "vector_int" }
};
static const vector_t _vector_table_pic12i[] = {
{ 0x000, "vector_reset" },
{ 0x004, "vector_int" }
};
static const core_sfr_t _core_sfr_table_pic14[] = {
{ 0x000, "INDF" },
{ 0x002, "PCL" },
{ 0x003, "STATUS" },
{ 0x004, "FSR" },
{ 0x00A, "PCLATH" },
{ 0x00B, "INTCON" }
};
static const vector_t _vector_table_pic14[] = {
{ 0x000, "vector_reset" },
{ 0x004, "vector_int" }
};
static const core_sfr_t _core_sfr_table_pic14e[] = {
{ 0x000, "INDF0" },
{ 0x001, "INDF1" },
{ 0x002, "PCL" },
{ 0x003, "STATUS" },
{ 0x004, "FSR0L" },
{ 0x005, "FSR0H" },
{ 0x006, "FSR1L" },
{ 0x007, "FSR1H" },
{ 0x008, "BSR" },
{ 0x009, "WREG" },
{ 0x00A, "PCLATH" },
{ 0x00B, "INTCON" }
};
static const core_sfr_t _core_sfr_table_pic16[] = {
{ 0x000, "INDF0" },
{ 0x001, "FSR0" },
{ 0x002, "PCL" },
{ 0x003, "PCLATH" },
{ 0x004, "ALUSTA" },
{ 0x005, "T0STA" },
{ 0x006, "CPUSTA" },
{ 0x007, "INTSTA" },
{ 0x008, "INDF1" },
{ 0x009, "FSR1" },
{ 0x00A, "WREG" },
{ 0x00B, "TMR0L" },
{ 0x00C, "TMR0H" },
{ 0x00D, "TBLPTRL" },
{ 0x00E, "TBLPTRH" },
{ 0x00F, "BSR" }
};
static const vector_t _vector_table_pic16[] = {
{ 0x0000, "vector_reset" },
{ 0x0008, "vector_int_ext" },
{ 0x0010, "vector_int_tmr0" },
{ 0x0018, "vector_int_t0cki" },
{ 0x0020, "vector_int_peri" }
};
static const core_sfr_t _core_sfr_table_pic16e[] = {
{ 0xF80, "PORTA" },
{ 0xF81, "PORTB" },
{ 0xF89, "LATA" },
{ 0xF8A, "LATB" },
{ 0xF92, "TRISA" },
{ 0xF93, "TRISB" },
{ 0xF9D, "PIE1" },
{ 0xF9E, "PIR1" },
{ 0xF9F, "IPR1" },
{ 0xFA0, "PIE2" },
{ 0xFA1, "PIR2" },
{ 0xFA2, "IPR2" },
{ 0xFCD, "T1CON" },
{ 0xFCE, "TMR1" },
{ 0xFCF, "TMR1H" },
{ 0xFD0, "RCON" },
{ 0xFD3, "OSCCON" },
{ 0xFD5, "T0CON" },
{ 0xFD6, "TMR0L" },
{ 0xFD7, "TMR0H" },
{ 0xFD8, "STATUS" },
{ 0xFD9, "FSR2L" },
{ 0xFDA, "FSR2H" },
{ 0xFDB, "PLUSW2" },
{ 0xFDC, "PREINC2" },
{ 0xFDD, "POSTDEC2" },
{ 0xFDE, "POSTINC2" },
{ 0xFDF, "INDF2" },
{ 0xFE0, "BSR" },
{ 0xFE1, "FSR1L" },
{ 0xFE2, "FSR1H" },
{ 0xFE3, "PLUSW1" },
{ 0xFE4, "PREINC1" },
{ 0xFE5, "POSTDEC1" },
{ 0xFE6, "POSTINC1" },
{ 0xFE7, "INDF1" },
{ 0xFE8, "WREG" },
{ 0xFE9, "FSR0L" },
{ 0xFEA, "FSR0H" },
{ 0xFEB, "PLUSW0" },
{ 0xFEC, "PREINC0" },
{ 0xFED, "POSTDEC0" },
{ 0xFEE, "POSTINC0" },
{ 0xFEF, "INDF0" },
{ 0xFF0, "INTCON3" },
{ 0xFF1, "INTCON2" },
{ 0xFF2, "INTCON" },
{ 0xFF3, "PRODL" },
{ 0xFF4, "PRODH" },
{ 0xFF5, "TABLAT" },
{ 0xFF6, "TBLPTRL" },
{ 0xFF7, "TBLPTRH" },
{ 0xFF8, "TBLPTRU" },
{ 0xFF9, "PC" },
{ 0xFFA, "PCLATH" },
{ 0xFFB, "PCLATU" },
{ 0xFFC, "STKPTR" },
{ 0xFFD, "TOS" },
{ 0xFFE, "TOSH" },
{ 0xFFF, "TOSU" }
};
static const vector_t _vector_table_pic16e[] = {
{ 0x0000, "vector_reset" },
{ 0x0008, "vector_int_high" },
{ 0x0018, "vector_int_low" }
};
/*------------------------------------------------------------------------------------------------*/
const struct proc_class proc_class_eeprom8 = {
unsigned(-1), /* retlw */
8, /* rom_width */
0, /* page_size */
0, /* bank_size */
0, /* bank_bits_shift */
0, /* addr_bits_in_bank */
0, /* org_to_byte_shift */
0, /* pc_mask */
0, /* page_mask */
0, /* bank_mask */
(1 << 8) - 1, /* core_mask */
0, /* config_mask */
6, /* addr_digits */
2, /* word_digits */
0, /* config_digits */
NULL, /* core_sfr_table */
0, /* core_sfr_number */
NULL, /* vector_table */
0, /* vector_number */
0, /* id_location */
_xbank_from_addr_unsupported, /* bank_from_addr */
_set_bank_unsupported, /* set_bank */
_banksel_byte_length_unsupported, /* banksel_byte_length */
_xbank_from_addr_unsupported, /* check_ibank */
_set_ibank_unsupported, /* set_ibank */
_check_page_unsupported, /* check_page */
_set_page_unsupported, /* set_page */
_pagesel_byte_length_unsupported, /* pagesel_byte_length */
_page_addr_unsupported, /* page_addr */
_addr_from_page_bits_unsupported, /* addr_from_page_bits */
_reloc_unsupported, /* reloc_call */
_reloc_unsupported, /* reloc_goto */
_reloc_unsupported, /* reloc_f */
_reloc_unsupported, /* reloc_tris */
_reloc_unsupported, /* reloc_movlb */
_reloc_bra_unsupported, /* reloc_bra */
_reloc_high_unsupported, /* reloc_high */
NULL, /* instructions */
NULL, /* num_instructions */
NULL, /* find_insn */
gp_mem_i_get_le, /* i_memory_get */
gp_mem_i_put_le, /* i_memory_put */
NULL, /* patch_strict */
};
const struct proc_class proc_class_eeprom16 = {
unsigned(-1), /* retlw */
16, /* rom_width */
0, /* page_size */
0, /* bank_size */
0, /* bank_bits_shift */
0, /* addr_bits_in_bank */
0, /* org_to_byte_shift */
0, /* pc_mask */
0, /* page_mask */
0, /* bank_mask */
(1 << 16) - 1, /* core_mask */
0, /* config_mask */
6, /* addr_digits */
4, /* word_digits */
0, /* config_digits */
NULL, /* core_sfr_table */
0, /* core_sfr_number */
NULL, /* vector_table */
0, /* vector_number */
0, /* id_location */
_xbank_from_addr_unsupported, /* bank_from_addr */
_set_bank_unsupported, /* set_bank */
_banksel_byte_length_unsupported, /* banksel_byte_length */
_xbank_from_addr_unsupported, /* check_ibank */
_set_ibank_unsupported, /* set_ibank */
_check_page_unsupported, /* check_page */
_set_page_unsupported, /* set_page */
_pagesel_byte_length_unsupported, /* pagesel_byte_length */
_page_addr_unsupported, /* page_addr */
_addr_from_page_bits_unsupported, /* addr_from_page_bits */
_reloc_unsupported, /* reloc_call */
_reloc_unsupported, /* reloc_goto */
_reloc_unsupported, /* reloc_f */
_reloc_unsupported, /* reloc_tris */
_reloc_unsupported, /* reloc_movlb */
_reloc_bra_unsupported, /* reloc_bra */
_reloc_high_unsupported, /* reloc_high */
NULL, /* instructions */
NULL, /* num_instructions */
NULL, /* find_insn */
gp_mem_i_get_be, /* i_memory_get */
gp_mem_i_put_be, /* i_memory_put */
NULL, /* patch_strict */
};
const struct proc_class proc_class_generic = {
unsigned(-1), /* retlw */
12, /* rom_width */
PIC12_PAGE_SIZE, /* page_size */
PIC12_BANK_SIZE, /* bank_size */
PIC12_BANK_SHIFT, /* bank_bits_shift */
PIC12_RAM_ADDR_BITS, /* addr_bits_in_bank */
1, /* org_to_byte_shift */
PIC12_PC_MASK, /* pc_mask */
PIC12_PAGE_MASK, /* page_mask */
PIC12_BANK_MASK, /* bank_mask */
PIC12_CORE_MASK, /* core_mask */
(1 << 12) - 1, /* config_mask */
3, /* addr_digits */
3, /* word_digits */
0, /* config_digits */
_core_sfr_table_pic12, /* core_sfr_table */
TABLE_SIZE(_core_sfr_table_pic12), /* core_sfr_number */
_vector_table_pic12, /* vector_table */
TABLE_SIZE(_vector_table_pic12), /* vector_number */
_id_location_pic12, /* id_location */
_bank_from_addr_pic12, /* bank_from_addr */
_set_bank_pic12, /* set_bank */
_banksel_byte_length_pic12_14, /* banksel_byte_length */
_xbank_from_addr_unsupported, /* check_ibank */
_set_ibank_unsupported, /* set_ibank */
_check_page_pic12, /* check_page */
_set_page_pic12, /* set_page */
_pagesel_byte_length_pic12_14, /* pagesel_byte_length */
_page_addr_pic12, /* page_addr */
_addr_from_page_bits_pic12, /* addr_from_page_bits */
_reloc_unsupported, /* reloc_call */
_reloc_unsupported, /* reloc_goto */
_reloc_unsupported, /* reloc_f */
_reloc_unsupported, /* reloc_tris */
_reloc_unsupported, /* reloc_movlb */
_reloc_bra_unsupported, /* reloc_bra */
_reloc_high_unsupported, /* reloc_high */
NULL, /* instructions */
NULL, /* num_instructions */
NULL, /* find_insn */
gp_mem_i_get_le, /* i_memory_get */
gp_mem_i_put_le, /* i_memory_put */
NULL, /* patch_strict */
};
const struct proc_class proc_class_pic12 = {
PIC12_INSN_RETLW, /* retlw */
12, /* rom_width */
PIC12_PAGE_SIZE, /* page_size */
PIC12_BANK_SIZE, /* bank_size */
PIC12_BANK_SHIFT, /* bank_bits_shift */
PIC12_RAM_ADDR_BITS, /* addr_bits_in_bank */
1, /* org_to_byte_shift */
PIC12_PC_MASK, /* pc_mask */
PIC12_PAGE_MASK, /* page_mask */
PIC12_BANK_MASK, /* bank_mask */
PIC12_CORE_MASK, /* core_mask */
(1 << 12) - 1, /* config_mask */
3, /* addr_digits */
3, /* word_digits */
3, /* config_digits */
_core_sfr_table_pic12, /* core_sfr_table */
TABLE_SIZE(_core_sfr_table_pic12), /* core_sfr_number */
_vector_table_pic12, /* vector_table */
TABLE_SIZE(_vector_table_pic12), /* vector_number */
_id_location_pic12, /* id_location */
_bank_from_addr_pic12, /* bank_from_addr */
_set_bank_pic12, /* set_bank */
_banksel_byte_length_pic12_14, /* banksel_byte_length */
_xbank_from_addr_unsupported, /* check_ibank */
_set_ibank_unsupported, /* set_ibank */
_check_page_pic12, /* check_page */
_set_page_pic12, /* set_page */
_pagesel_byte_length_pic12_14, /* pagesel_byte_length */
_page_addr_pic12, /* page_addr */
_addr_from_page_bits_pic12, /* addr_from_page_bits */
_reloc_call_pic12, /* reloc_call */
_reloc_goto_pic12, /* reloc_goto */
_reloc_f_pic12, /* reloc_f */
_reloc_tris_pic12, /* reloc_tris */
_reloc_unsupported, /* reloc_movlb */
_reloc_bra_unsupported, /* reloc_bra */
_reloc_high_generic, /* reloc_high */
op_12c5xx, /* instructions */
&num_op_12c5xx, /* num_instructions */
_find_insn_generic, /* find_insn */
gp_mem_i_get_le, /* i_memory_get */
gp_mem_i_put_le, /* i_memory_put */
NULL, /* patch_strict */
};
const struct proc_class proc_class_pic12e = {
PIC12_INSN_RETLW, /* retlw */
12, /* rom_width */
PIC12_PAGE_SIZE, /* page_size */
PIC12_BANK_SIZE, /* bank_size */
PIC12_BANK_SHIFT, /* bank_bits_shift */
PIC12_RAM_ADDR_BITS, /* addr_bits_in_bank */
1, /* org_to_byte_shift */
PIC12_PC_MASK, /* pc_mask */
PIC12_PAGE_MASK, /* page_mask */
PIC12_BANK_MASK, /* bank_mask */
PIC12_CORE_MASK, /* core_mask */
(1 << 12) - 1, /* config_mask */
3, /* addr_digits */
3, /* word_digits */
3, /* config_digits */
_core_sfr_table_pic12, /* core_sfr_table */
TABLE_SIZE(_core_sfr_table_pic12), /* core_sfr_number */
_vector_table_pic12, /* vector_table */
TABLE_SIZE(_vector_table_pic12), /* vector_number */
_id_location_pic12, /* id_location */
_bank_from_addr_pic12e, /* bank_from_addr */
_set_bank_pic12e, /* set_bank */
_banksel_byte_length_pic12e, /* banksel_byte_length */
_xbank_from_addr_unsupported, /* check_ibank */
_set_ibank_unsupported, /* set_ibank */
_check_page_pic12, /* check_page */
_set_page_pic12, /* set_page */
_pagesel_byte_length_pic12_14, /* pagesel_byte_length */
_page_addr_pic12, /* page_addr */
_addr_from_page_bits_pic12, /* addr_from_page_bits */
_reloc_call_pic12, /* reloc_call */
_reloc_goto_pic12, /* reloc_goto */
_reloc_f_pic12, /* reloc_f */
_reloc_tris_pic12e, /* reloc_tris */
_reloc_unsupported, /* reloc_movlb */
_reloc_bra_unsupported, /* reloc_bra */
_reloc_high_generic, /* reloc_high */
op_12c5xx, /* instructions */
&num_op_12c5xx, /* num_instructions */
_find_insn_pic12e, /* find_insn */
gp_mem_i_get_le, /* i_memory_get */
gp_mem_i_put_le, /* i_memory_put */
NULL, /* patch_strict */
};
const struct proc_class proc_class_pic12i = {
PIC12_INSN_RETLW, /* retlw */
12, /* rom_width */
PIC12_PAGE_SIZE, /* page_size */
PIC12_BANK_SIZE, /* bank_size */
PIC12_BANK_SHIFT, /* bank_bits_shift */
PIC12_RAM_ADDR_BITS, /* addr_bits_in_bank */
1, /* org_to_byte_shift */
PIC12_PC_MASK, /* pc_mask */
PIC12_PAGE_MASK, /* page_mask */
PIC12_BANK_MASK, /* bank_mask */
PIC12_CORE_MASK, /* core_mask */
(1 << 12) - 1, /* config_mask */
3, /* addr_digits */
3, /* word_digits */
3, /* config_digits */
_core_sfr_table_pic12, /* core_sfr_table */
TABLE_SIZE(_core_sfr_table_pic12), /* core_sfr_number */
_vector_table_pic12i, /* vector_table */
TABLE_SIZE(_vector_table_pic12i), /* vector_number */
_id_location_pic12, /* id_location */
_bank_from_addr_pic12e, /* bank_from_addr */
_set_bank_pic12e, /* set_bank */
_banksel_byte_length_pic12e, /* banksel_byte_length */
_xbank_from_addr_unsupported, /* check_ibank */
_set_ibank_unsupported, /* set_ibank */
_check_page_pic12, /* check_page */
_set_page_pic12, /* set_page */
_pagesel_byte_length_pic12_14, /* pagesel_byte_length */
_page_addr_pic12, /* page_addr */
_addr_from_page_bits_pic12, /* addr_from_page_bits */
_reloc_call_pic12, /* reloc_call */
_reloc_goto_pic12, /* reloc_goto */
_reloc_f_pic12, /* reloc_f */
_reloc_tris_pic12e, /* reloc_tris */
_reloc_unsupported, /* reloc_movlb */
_reloc_bra_unsupported, /* reloc_bra */
_reloc_high_generic, /* reloc_high */
op_12c5xx, /* instructions */
&num_op_12c5xx, /* num_instructions */
_find_insn_pic12e, /* find_insn */
gp_mem_i_get_le, /* i_memory_get */
gp_mem_i_put_le, /* i_memory_put */
NULL, /* patch_strict */
};
const struct proc_class proc_class_sx = {
PIC12_INSN_RETLW, /* retlw */
12, /* rom_width */
PIC12_PAGE_SIZE, /* page_size */
PIC12_BANK_SIZE, /* bank_size */
PIC12_BANK_SHIFT, /* bank_bits_shift */
PIC12_RAM_ADDR_BITS, /* addr_bits_in_bank */
1, /* org_to_byte_shift */
SX_PC_MASK, /* pc_mask */
PIC12_PAGE_MASK, /* page_mask */
PIC12_BANK_MASK, /* bank_mask */
PIC12_CORE_MASK, /* core_mask */
(1 << 12) - 1, /* config_mask */
3, /* addr_digits */
3, /* word_digits */
3, /* config_digits */
_core_sfr_table_sx, /* core_sfr_table */
TABLE_SIZE(_core_sfr_table_sx), /* core_sfr_number */
_vector_table_sx, /* vector_table */
TABLE_SIZE(_vector_table_sx), /* vector_number */
_id_location_pic12, /* id_location */
_bank_from_addr_pic12, /* bank_from_addr */
_set_bank_pic12, /* set_bank */
_banksel_byte_length_pic12_14, /* banksel_byte_length */
_xbank_from_addr_unsupported, /* check_ibank */
_set_ibank_unsupported, /* set_ibank */
_check_page_sx, /* check_page */
_set_page_sx, /* set_page */
_pagesel_byte_length_pic12_14, /* pagesel_byte_length */
_page_addr_sx, /* page_addr */
_addr_from_page_bits_sx, /* addr_from_page_bits */
_reloc_call_pic12, /* reloc_call */
_reloc_goto_pic12, /* reloc_goto */
_reloc_f_pic12, /* reloc_f */
_reloc_tris_pic12, /* reloc_tris */
_reloc_unsupported, /* reloc_movlb */
_reloc_bra_unsupported, /* reloc_bra */
_reloc_high_generic, /* reloc_high */
op_sx, /* instructions */
&num_op_sx, /* num_instructions */
_find_insn_generic, /* find_insn */
gp_mem_i_get_le, /* i_memory_get */
gp_mem_i_put_le, /* i_memory_put */
NULL, /* patch_strict */
};
const struct proc_class proc_class_pic14 = {
PIC14_INSN_RETLW, /* retlw */
14, /* rom_width */
PIC14_PAGE_SIZE, /* page_size */
PIC14_BANK_SIZE, /* bank_size */
PIC14_BANK_SHIFT, /* bank_bits_shift */
PIC14_RAM_ADDR_BITS, /* addr_bits_in_bank */
1, /* org_to_byte_shift */
PIC14_PC_MASK, /* pc_mask */
PIC14_PAGE_MASK, /* page_mask */
PIC14_BANK_MASK, /* bank_mask */
PIC14_CORE_MASK, /* core_mask */
(1 << 14) - 1, /* config_mask */
4, /* addr_digits */
4, /* word_digits */
4, /* config_digits */
_core_sfr_table_pic14, /* core_sfr_table */
TABLE_SIZE(_core_sfr_table_pic14), /* core_sfr_number */
_vector_table_pic14, /* vector_table */
TABLE_SIZE(_vector_table_pic14), /* vector_number */
_id_location_pic14, /* id_location */
_bank_from_addr_pic14, /* bank_from_addr */
_set_bank_pic14, /* set_bank */
_banksel_byte_length_pic12_14, /* banksel_byte_length */
_check_ibank_pic14, /* check_ibank */
_set_ibank_pic14, /* set_ibank */
_check_page_pic14, /* check_page */
_set_page_pic14, /* set_page */
_pagesel_byte_length_pic12_14, /* pagesel_byte_length */
_page_addr_pic14, /* page_addr */
_addr_from_page_bits_pic14, /* addr_from_page_bits */
_reloc_call_pic14, /* reloc_call */
_reloc_goto_pic14, /* reloc_goto */
_reloc_f_pic14, /* reloc_f */
_reloc_tris_pic14, /* reloc_tris */
_reloc_unsupported, /* reloc_movlb */
_reloc_bra_unsupported, /* reloc_bra */
_reloc_high_generic, /* reloc_high */
op_16cxx, /* instructions */
&num_op_16cxx, /* num_instructions */
_find_insn_generic, /* find_insn */
gp_mem_i_get_le, /* i_memory_get */
gp_mem_i_put_le, /* i_memory_put */
_patch_strict_pic14, /* patch_strict */
};
const struct proc_class proc_class_pic14e = {
PIC14_INSN_RETLW, /* retlw */
14, /* rom_width */
PIC14_PAGE_SIZE, /* page_size */
PIC14_BANK_SIZE, /* bank_size */
PIC14_BANK_SHIFT, /* bank_bits_shift */
PIC14_RAM_ADDR_BITS, /* addr_bits_in_bank */
1, /* org_to_byte_shift */
PIC14E_PC_MASK, /* pc_mask */
PIC14_PAGE_MASK, /* page_mask */
PIC14_BANK_MASK, /* bank_mask */
PIC14_CORE_MASK, /* core_mask */
(1 << 16) - 1, /* config_mask */
4, /* addr_digits */
4, /* word_digits */
4, /* config_digits */
_core_sfr_table_pic14e, /* core_sfr_table */
TABLE_SIZE(_core_sfr_table_pic14e), /* core_sfr_number */
_vector_table_pic14, /* vector_table */
TABLE_SIZE(_vector_table_pic14), /* vector_number */
_id_location_pic14, /* id_location */
_bank_from_addr_pic14e, /* bank_from_addr */
_set_bank_pic14e, /* set_bank */
_banksel_byte_length_pic14e, /* banksel_byte_length */
_check_ibank_pic14e, /* check_ibank */
_set_ibank_pic14e, /* set_ibank */
_check_page_pic14e, /* check_page */
_set_page_pic14e, /* set_page */
_pagesel_byte_length_pic14e, /* pagesel_byte_length */
_page_addr_pic14e, /* page_addr */
_addr_from_page_bits_pic14e, /* addr_from_page_bits */
_reloc_call_pic14, /* reloc_call */
_reloc_goto_pic14, /* reloc_goto */
_reloc_f_pic14, /* reloc_f */
_reloc_tris_pic14, /* reloc_tris */
_reloc_movlb_pic14e, /* reloc_movlb */
_reloc_bra_pic14e, /* reloc_bra */
_reloc_high_pic14e, /* reloc_high */
op_16cxx, /* instructions */
&num_op_16cxx, /* num_instructions */
_find_insn_pic14e, /* find_insn */
gp_mem_i_get_le, /* i_memory_get */
gp_mem_i_put_le, /* i_memory_put */
_patch_strict_pic14, /* patch_strict */
};
const struct proc_class proc_class_pic14ex = {
PIC14_INSN_RETLW, /* retlw */
14, /* rom_width */
PIC14_PAGE_SIZE, /* page_size */
PIC14_BANK_SIZE, /* bank_size */
PIC14_BANK_SHIFT, /* bank_bits_shift */
PIC14_RAM_ADDR_BITS, /* addr_bits_in_bank */
1, /* org_to_byte_shift */
PIC14E_PC_MASK, /* pc_mask */
PIC14_PAGE_MASK, /* page_mask */
PIC14_BANK_MASK, /* bank_mask */
PIC14_CORE_MASK, /* core_mask */
(1 << 16) - 1, /* config_mask */
4, /* addr_digits */
4, /* word_digits */
4, /* config_digits */
_core_sfr_table_pic14e, /* core_sfr_table */
TABLE_SIZE(_core_sfr_table_pic14e), /* core_sfr_number */
_vector_table_pic14, /* vector_table */
TABLE_SIZE(_vector_table_pic14), /* vector_number */
_id_location_pic14, /* id_location */
_bank_from_addr_pic14ex, /* bank_from_addr */
_set_bank_pic14ex, /* set_bank */
_banksel_byte_length_pic14e, /* banksel_byte_length */
_check_ibank_pic14e, /* check_ibank */
_set_ibank_pic14e, /* set_ibank */
_check_page_pic14e, /* check_page */
_set_page_pic14e, /* set_page */
_pagesel_byte_length_pic14e, /* pagesel_byte_length */
_page_addr_pic14e, /* page_addr */
_addr_from_page_bits_pic14e, /* addr_from_page_bits */
_reloc_call_pic14, /* reloc_call */
_reloc_goto_pic14, /* reloc_goto */
_reloc_f_pic14, /* reloc_f */
_reloc_tris_pic14, /* reloc_tris */
_reloc_movlb_pic14e, /* reloc_movlb */
_reloc_bra_pic14e, /* reloc_bra */
_reloc_high_pic14e, /* reloc_high */
op_16cxx, /* instructions */
&num_op_16cxx, /* num_instructions */
_find_insn_pic14ex, /* find_insn */
gp_mem_i_get_le, /* i_memory_get */
gp_mem_i_put_le, /* i_memory_put */
_patch_strict_pic14, /* patch_strict */
};
const struct proc_class proc_class_pic16 = {
PIC16_INSN_RETLW, /* retlw */
16, /* rom_width */
0, /* page_size */
PIC16_BANK_SIZE, /* bank_size */
PIC16_BANK_SHIFT, /* bank_bits_shift */
PIC16_RAM_ADDR_BITS, /* addr_bits_in_bank */
1, /* org_to_byte_shift */
0, /* pc_mask */
PIC16_PAGE_MASK, /* page_mask */
PIC16_BANK_MASK, /* bank_mask */
PIC16_CORE_MASK, /* core_mask */
(1 << 8) - 1, /* config_mask */
6, /* addr_digits */
4, /* word_digits */
2, /* config_digits */
_core_sfr_table_pic16, /* core_sfr_table */
TABLE_SIZE(_core_sfr_table_pic16), /* core_sfr_number */
_vector_table_pic16, /* vector_table */
TABLE_SIZE(_vector_table_pic16), /* vector_number */
NULL, /* id_location */
_bank_from_addr_pic16, /* bank_from_addr */
_set_bank_pic16, /* set_bank */
_banksel_byte_length_pic16, /* banksel_byte_length */
_bank_from_addr_pic16, /* check_ibank: same as bank_from_addr */
_set_ibank_pic16, /* set_ibank */
_check_page_pic16, /* check_page */
_set_page_pic16, /* set_page */
_pagesel_byte_length_pic16, /* pagesel_byte_length */
_page_addr_pic16, /* page_addr */
_addr_from_page_bits_pic16, /* addr_from_page_bits */
_reloc_call_pic16, /* reloc_call */
_reloc_goto_pic16, /* reloc_goto */
_reloc_f_pic16, /* reloc_f */
_reloc_unsupported, /* reloc_tris */
_reloc_unsupported, /* reloc_movlb */
_reloc_bra_unsupported, /* reloc_bra */
_reloc_high_generic, /* reloc_high */
op_17cxx, /* instructions */
&num_op_17cxx, /* num_instructions */
_find_insn_generic, /* find_insn */
gp_mem_i_get_le, /* i_memory_get */
gp_mem_i_put_le, /* i_memory_put */
NULL, /* patch_strict */
};
const struct proc_class proc_class_pic16e = {
PIC16E_INSN_RETLW, /* retlw */
8, /* rom_width */
0, /* page_size */
PIC16_BANK_SIZE, /* bank_size */
PIC16_BANK_SHIFT, /* bank_bits_shift */
PIC16_RAM_ADDR_BITS, /* addr_bits_in_bank */
0, /* org_to_byte_shift */
0, /* pc_mask */
0, /* page_mask */
PIC16_BANK_MASK, /* bank_mask */
PIC16_CORE_MASK, /* core_mask */
(1 << 8) - 1, /* config_mask */
6, /* addr_digits */
4, /* word_digits */
2, /* config_digits */
_core_sfr_table_pic16e, /* core_sfr_table */
TABLE_SIZE(_core_sfr_table_pic16e), /* core_sfr_number */
_vector_table_pic16e, /* vector_table */
TABLE_SIZE(_vector_table_pic16e), /* vector_number */
_id_location_pic16e, /* id_location */
_bank_from_addr_pic16, /* bank_from_addr: Same as for pic16 */
_set_bank_pic16e, /* set_bank */
_banksel_byte_length_pic16, /* banksel_byte_length */
_xbank_from_addr_unsupported, /* check_ibank */
_set_ibank_unsupported, /* set_ibank */
_check_page_unsupported, /* check_page */
_set_page_unsupported, /* set_page */
_pagesel_byte_length_unsupported, /* pagesel_byte_length */
_page_addr_unsupported, /* page_addr */
_addr_from_page_bits_unsupported, /* addr_from_page_bits */
_reloc_call_pic16e, /* reloc_call */
_reloc_goto_pic16e, /* reloc_goto */
_reloc_f_pic16, /* reloc_f: same as for pic16 */
_reloc_unsupported, /* reloc_tris */
_reloc_movlb_pic16e, /* reloc_movlb */
_reloc_bra_pic16e, /* reloc_bra */
_reloc_high_generic, /* reloc_high */
op_18cxx, /* instructions */
&num_op_18cxx, /* num_instructions */
_find_insn_pic16e, /* find_insn */
gp_mem_i_get_le, /* i_memory_get */
gp_mem_i_put_le, /* i_memory_put */
NULL, /* patch_strict */
};
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