Source file: /~heha/hs/avrpp.zip/src/avrpp.h

#pragma once

#include <stdio.h>	// FILE
#ifdef _WIN32
#include <windows.h>
typedef BYTE byte;
typedef WORD word;
typedef DWORD dword;
typedef long int32;
typedef __int64 int64;
#define strcasecmp _stricmp
#ifdef _WIN64
# define isatty(x) _isatty(x)
# define fileno(x) _fileno(x)
#endif
#else
#include <stdint.h>
typedef uint8_t byte;
typedef uint16_t word;
typedef uint32_t dword;
typedef int32_t int32;
typedef int64_t int64;
#define LOBYTE(x) (byte)(x)
#define HIBYTE(x) (byte)((x)>>8)
#define _cdecl
#endif

#define MESS(str)	fputs(str, stderr)
#define INIFILE "avrpp.ini"

#define elemof(x) (sizeof(x)/sizeof(*(x)))
#define nobreak

enum PGMTYPE{
 Par	=0x01,	// High Voltage Parallel, ~20 wire
 HVS	=0x02,	// High Voltage Serial, 4 wire + RESET
 H15	=0x04,	// HVS for ATtiny15
 TPI	=0x08,	// High or Low Voltage Serial, 2 wire + RESET
 ISP	=0x10,	// Low Voltage In-System Serial, 3 wire + RESET
 JT	=0x20,	// JTAG
 dW	=0x40,	// debugWire
 USB	=0x80,	// FLIP boot loader: While ALL controllers may be programmable via USB (somehow),
};		// the built-in boot loader uses flash memory and cannot be overwritten.

extern const struct FUSEPROP{	// sizeof = 32
 byte	PgmType;	// Programming interface bitmask <PGMTYPE>
 byte	EraseWait;	// Wait time for chip erase, in ms (0 is polling)
 byte	FuseWait;	// Wait time for fuse write, in ms (0 is poiling)
 byte	LockDefault;	// Default lock byte (program LB1 and LB2)
 byte	Cals;		// Number of calibration bytes
 byte	FuseDefault[3];	// Fuse default value [low,high,ext]
 byte	ids[3*8];	// Each ID defines one fuse bit. If zero, this fuse is unused.
}FuseProps[];		// Multiple equal IDs form a multi-bit fuse setting

extern const char*const FuseNames[];

extern const struct DEVPROP{	// sizeof = 20
 char	Name[14];	// Device name
 byte	Sign[2];	// Device signature bytes after 0x1E = Atmel
 byte	FlashPageSHL;	// Flash memory size, in 1<<SHL pages when SHL<16, else direct
 byte	FlashPageS;	// Flash page size shift (0 is byte-by-byte)
 byte	EepromSizeS:4; 	// EEPROM size shift, in bytes; 0 = no EEPROM
 byte	EepromPageS:4;	// EEPROM page size shift (0 is byte-by-byte)
 byte	fusepropidx;
}DevLst[];

enum adsp{	// Byte read/write identifier (address space)
 FLASH		=0,
 EEPROM		=0x81,
 FUSE		=0x82,
 LOCK		=0x83,
 SIGNATURE	=0x84,
 CALIBS		=0x85,
};

enum{
// Device programming commands
 C_NOP		=0x00,
 C_ERASE	=0x80,
 C_WR_PRG	=0x10,
 C_RD_PRG	=0x02,
 C_WR_EEP	=0x11,
 C_RD_EEP	=0x03,
 C_WR_FB	=0x40,
 C_RD_FB	=0x04,
 C_WR_LB	=0x20,
 C_RD_SIG	=0x08,

 I_LDCMD	=0x4C,
 I_LDAL		=0x0C,
 I_LDAH		=0x1C,
 I_LDDL		=0x2C,
 I_LDDH		=0x3C,
 I_PSTL1	=0x6D,
 I_PSTL2	=0x6C,
 I_PSTH1	=0x7D,
 I_PSTH2	=0x7C,
 I_RDLL1	=0x68,
 I_RDLL2	=0x6C,
 I_RDLH1	=0x78,
 I_RDLH2	=0x7C,
 I_RDHL1	=0x6A,
 I_RDHL2	=0x6E,
 I_RDHH1	=0x7A,
 I_RDHH2	=0x7E,
 I_WRLL1	=0x64,
 I_WRLL2	=0x6C,
 I_WRLH1	=0x74,
 I_WRLH2	=0x7C,
 I_WRHL1	=0x66,
 I_WRHL2	=0x6E,

// Program return codes
 RC_FAIL	=1,
 RC_FILE	=2,
 RC_INIT	=3,
 RC_DEV		=4,
 RC_SYNTAX	=5,

// XA/BS identifier for read/write commands
 XA_0		=0x01,
 XA_1		=0x02,
 BS_1		=0x04,
 BS_2		=0x08,

// Buffer size for flash/eeprom/fuse/lock/signature
 BASE_FLASH	=0,		// Flash base offset in hex file
 MAX_FLASH	=256*1024,	// Flash buffer size (256K)
 BASE_EEPROM	=0x810000,	// EEPROM base offset in hex file
 MAX_EEPROM	=4*1024,	// EEPROM buffer size (4K)
 BASE_FUSE	=0x820000,	// Fuse base offset in hex file
 MAX_FUSE	=3,		// Fuse buffer size (3)
 BASE_LOCK	=0x830000,	// Lock base offset in hex file
 MAX_LOCK	=1,		// Lock buffer size (1)
 BASE_SIGNATURE	=0x840000,	// Signature base offset in hex file
 MAX_SIGNATURE	=3,		// Signature buffer size (3)
// BASE is according to avr-gcc default linker scripts.
};

// Physical port properties
extern struct PORTPROP{
 word	PortAddr;		// Port base address
 char	Mode;			// Device mode 0:Parallel, 1:8pin, 2:tn15, 3:tpi
 bool	Quick;			// Quick power-on
 bool	inpout32;
 char	Stat;			// Control status codes
 unsigned iodelay;		// I/O by I/O delay in ┬Ás, 0 = no delay
 static void delay();
}CtrlPort;


enum _ctrlstat{		// port control status
 RES_OPENED,
 RES_NOADAPTER,
 RES_NOPORT,
 RES_DRVFAIL,
 RES_BADENV
};

// Prototypes for hardware controls
char open_ifport();
void close_ifport();
void power_on();
void power_off();
void set_byte(byte,byte);
byte rcv_byte(byte);
byte xfer8(byte,byte);
void stb_pagel();
void stb_wr(byte,byte);
int wait_ready();
//void delay_us(int);	// using QueryPerformanceCounter
void delay_ms(int);	// using Sleep() above 10 ms
FILE *open_cfgfile(const char*);

bool loadelf(const byte*,dword);
struct Deviceinfo{	// alternative way to type-check correct AVR besides #include <avr/signature.h> since avr-gcc 5
 dword flash_start,flash_size;
 dword sram_start,sram_size;
 dword eeprom_start,eeprom_size;
 char device_name[16];
 bool load(const byte*,dword);	// inside loadelf.cpp
 bool check();		// check discrepancies, inside avrpp.cpp
 bool check2();		// TODO: check matching memory sizes
};
int32 loadhex(const char*,dword,dword=BASE_FLASH);
void store_buffer(const byte*,dword,dword);
void store_buffer(byte,dword);

bool tpiSend(byte,byte);
int tpiRecv(byte);
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