MEMORY
{
PAGE 0 :
/* BEGIN is used for the "boot to SARAM" bootloader mode */
BEGIN : origin = 0x080000, length = 0x000002
RAMLS0LS1 : origin = 0x008000, length = 0x001000
RAMLS2 : origin = 0x009000, length = 0x000800
RESET : origin = 0x3FFFC0, length = 0x000002
IQTABLES : origin = 0x3FE000, length = 0x000B50 /* IQ Math Tables in Boot ROM */
IQTABLES2 : origin = 0x3FEB50, length = 0x00008C /* IQ Math Tables in Boot ROM */
IQTABLES3 : origin = 0x3FEBDC, length = 0x0000AA /* IQ Math Tables in Boot ROM */
FLASHN : origin = 0x80002, length = 0x001FFD /* on-chip FLASH */
FLASHML : origin = 0x82000, length = 0x004000 /* on-chip FLASH */
/*FLASHL : origin = 0x84000, length = 0x002000*/ /* on-chip FLASH */
FLASHK : origin = 0x86000, length = 0x002000 /* on-chip FLASH */
FLASHJ : origin = 0x88000, length = 0x008000 /* on-chip FLASH */
FLASHI : origin = 0x90000, length = 0x008000 /* on-chip FLASH */
FLASHH : origin = 0x98000, length = 0x008000 /* on-chip FLASH */
FLASHG : origin = 0xA0000, length = 0x008000 /* on-chip FLASH */
FLASHF : origin = 0xA8000, length = 0x008000 /* on-chip FLASH */
FLASHE : origin = 0xB0000, length = 0x008000 /* on-chip FLASH */
FLASHD : origin = 0xB8000, length = 0x002000 /* on-chip FLASH */
FLASHC : origin = 0xBA000, length = 0x002000 /* on-chip FLASH */
FLASHB : origin = 0xBC000, length = 0x002000 /* on-chip FLASH */
FLASHN1 : origin = 0xC0000, length = 0x002000 /* on-chip FLASH */
FLASHM1 : origin = 0xC2000, length = 0x002000 /* on-chip FLASH */
FLASHL1 : origin = 0xC4000, length = 0x002000 /* on-chip FLASH */
FLASHK1 : origin = 0xC6000, length = 0x002000 /* on-chip FLASH */
FLASHJ1 : origin = 0xC8000, length = 0x008000 /* on-chip FLASH */
FLASHI1 : origin = 0xD0000, length = 0x008000 /* on-chip FLASH */
FLASHH1 : origin = 0xD8000, length = 0x008000 /* on-chip FLASH */
FLASHG1 : origin = 0xE0000, length = 0x008000 /* on-chip FLASH */
FLASHF1 : origin = 0xE8000, length = 0x008000 /* on-chip FLASH */
FLASHE1 : origin = 0xF0000, length = 0x008000 /* on-chip FLASH */
FLASHD1 : origin = 0xF8000, length = 0x002000 /* on-chip FLASH */
FLASHC1 : origin = 0xFA000, length = 0x002000 /* on-chip FLASH */
FLASHB1 : origin = 0xFC000, length = 0x002000 /* on-chip FLASH */
FLASHA1 : origin = 0xFE000, length = 0x002000 /* on-chip FLASH */
BOOTROM : origin = 0x3FF27C, length = 0x000D44
PAGE 1 :
RAMM0 : origin = 0x000004, length = 0x000250
RAMM1 : origin = 0x000400, length = 0x000250 /* on-chip RAM block M1 */
RAMD0 : origin = 0x00B000, length = 0x000250
RAMD1 : origin = 0x00B800, length = 0x000250
RAMLS3 : origin = 0x009800, length = 0x000800
RAMLS4LS5 : origin = 0x00A000, length = 0x001000
RAMGS0GS1 : origin = 0x00C000, length = 0x002000
RAMGS3 : origin = 0x00F000, length = 0x000500
RAMGS4 : origin = 0x010000, length = 0x000500
RAMGS5 : origin = 0x011000, length = 0x000500
RAMGS6 : origin = 0x012000, length = 0x000500
RAMGS7 : origin = 0x013000, length = 0x000500
RAMGS8 : origin = 0x014000, length = 0x000500
RAMGS9 : origin = 0x015000, length = 0x000500
RAMGS10 : origin = 0x016000, length = 0x000500
RAMGS11 : origin = 0x017000, length = 0x000500
RAMGS12 : origin = 0x018000, length = 0x000500
RAMGS13 : origin = 0x019000, length = 0x000500
RAMGS14 : origin = 0x01A000, length = 0x000500
RAMGS15 : origin = 0x01B000, length = 0x000500
FLASHA : origin = 0xBE000, length = 0x002000 /* on-chip FLASH */
}
SECTIONS
{
/* Setup for "boot to SARAM" mode:
The codestart section (found in DSP28_CodeStartBranch.asm)
re-directs execution to the start of user code. */
codestart : > BEGIN, PAGE = 0
ramfuncs : { * (ramfuncs) * (.TI.ramfunc) }
LOAD = FLASHML,
RUN = RAMLS0LS1,
LOAD_START(_RamfuncsLoadStart),
LOAD_SIZE(_RamfuncsLoadSize),
LOAD_END(_RamfuncsLoadEnd),
RUN_START(_RamfuncsRunStart),
PAGE = 0
.text : > FLASHML, PAGE = 0
.cinit : > FLASHN|FLASHML, PAGE = 0
.pinit : > FLASHN, PAGE = 0
.switch : > FLASHML, PAGE = 0
.reset : > RESET, PAGE = 0, TYPE = DSECT /* not used, */
.stack : > RAMLS3, PAGE = 1
.ebss : > RAMGS0GS1, PAGE = 1
.econst : > FLASHML, PAGE = 0
.esysmem : > RAMGS0GS1, PAGE = 1
}
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