1 MEMORY
2 {
3 PAGE 0 :
4 /* BEGIN is used for the "boot to SARAM" bootloader mode */
5
6 BEGIN : origin = 0x080000, length = 0x000002
7 RAMLS0LS1 : origin = 0x008000, length = 0x001000
8 RAMLS2 : origin = 0x009000, length = 0x000800
9 RESET : origin = 0x3FFFC0, length = 0x000002
10 IQTABLES : origin = 0x3FE000, length = 0x000B50 /* IQ Math Tables in Boot ROM */
11 IQTABLES2 : origin = 0x3FEB50, length = 0x00008C /* IQ Math Tables in Boot ROM */
12 IQTABLES3 : origin = 0x3FEBDC, length = 0x0000AA /* IQ Math Tables in Boot ROM */
13
14 FLASHN : origin = 0x80002, length = 0x001FFD /* on-chip FLASH */
15 FLASHML : origin = 0x82000, length = 0x004000 /* on-chip FLASH */
16 /*FLASHL : origin = 0x84000, length = 0x002000*/ /* on-chip FLASH */
17 FLASHK : origin = 0x86000, length = 0x002000 /* on-chip FLASH */
18 FLASHJ : origin = 0x88000, length = 0x008000 /* on-chip FLASH */
19 FLASHI : origin = 0x90000, length = 0x008000 /* on-chip FLASH */
20 FLASHH : origin = 0x98000, length = 0x008000 /* on-chip FLASH */
21 FLASHG : origin = 0xA0000, length = 0x008000 /* on-chip FLASH */
22 FLASHF : origin = 0xA8000, length = 0x008000 /* on-chip FLASH */
23 FLASHE : origin = 0xB0000, length = 0x008000 /* on-chip FLASH */
24 FLASHD : origin = 0xB8000, length = 0x002000 /* on-chip FLASH */
25 FLASHC : origin = 0xBA000, length = 0x002000 /* on-chip FLASH */
26 FLASHB : origin = 0xBC000, length = 0x002000 /* on-chip FLASH */
27
28 FLASHN1 : origin = 0xC0000, length = 0x002000 /* on-chip FLASH */
29 FLASHM1 : origin = 0xC2000, length = 0x002000 /* on-chip FLASH */
30 FLASHL1 : origin = 0xC4000, length = 0x002000 /* on-chip FLASH */
31 FLASHK1 : origin = 0xC6000, length = 0x002000 /* on-chip FLASH */
32 FLASHJ1 : origin = 0xC8000, length = 0x008000 /* on-chip FLASH */
33 FLASHI1 : origin = 0xD0000, length = 0x008000 /* on-chip FLASH */
34 FLASHH1 : origin = 0xD8000, length = 0x008000 /* on-chip FLASH */
35 FLASHG1 : origin = 0xE0000, length = 0x008000 /* on-chip FLASH */
36 FLASHF1 : origin = 0xE8000, length = 0x008000 /* on-chip FLASH */
37 FLASHE1 : origin = 0xF0000, length = 0x008000 /* on-chip FLASH */
38 FLASHD1 : origin = 0xF8000, length = 0x002000 /* on-chip FLASH */
39 FLASHC1 : origin = 0xFA000, length = 0x002000 /* on-chip FLASH */
40 FLASHB1 : origin = 0xFC000, length = 0x002000 /* on-chip FLASH */
41 FLASHA1 : origin = 0xFE000, length = 0x002000 /* on-chip FLASH */
42
43 BOOTROM : origin = 0x3FF27C, length = 0x000D44
44
45 PAGE 1 :
46
47 RAMM0 : origin = 0x000004, length = 0x000250
48 RAMM1 : origin = 0x000400, length = 0x000250 /* on-chip RAM block M1 */
49 RAMD0 : origin = 0x00B000, length = 0x000250
50 RAMD1 : origin = 0x00B800, length = 0x000250
51
52 RAMLS3 : origin = 0x009800, length = 0x000800
53 RAMLS4LS5 : origin = 0x00A000, length = 0x001000
54
55
56 RAMGS0GS1 : origin = 0x00C000, length = 0x002000
57 RAMGS3 : origin = 0x00F000, length = 0x000500
58 RAMGS4 : origin = 0x010000, length = 0x000500
59 RAMGS5 : origin = 0x011000, length = 0x000500
60 RAMGS6 : origin = 0x012000, length = 0x000500
61 RAMGS7 : origin = 0x013000, length = 0x000500
62 RAMGS8 : origin = 0x014000, length = 0x000500
63 RAMGS9 : origin = 0x015000, length = 0x000500
64 RAMGS10 : origin = 0x016000, length = 0x000500
65 RAMGS11 : origin = 0x017000, length = 0x000500
66 RAMGS12 : origin = 0x018000, length = 0x000500
67 RAMGS13 : origin = 0x019000, length = 0x000500
68 RAMGS14 : origin = 0x01A000, length = 0x000500
69 RAMGS15 : origin = 0x01B000, length = 0x000500
70
71 FLASHA : origin = 0xBE000, length = 0x002000 /* on-chip FLASH */
72 }
73
74
75 SECTIONS
76 {
77 /* Setup for "boot to SARAM" mode:
78 The codestart section (found in DSP28_CodeStartBranch.asm)
79 re-directs execution to the start of user code. */
80 codestart : > BEGIN, PAGE = 0
81 ramfuncs : { * (ramfuncs) * (.TI.ramfunc) }
82 LOAD = FLASHML,
83 RUN = RAMLS0LS1,
84 LOAD_START(_RamfuncsLoadStart),
85 LOAD_SIZE(_RamfuncsLoadSize),
86 LOAD_END(_RamfuncsLoadEnd),
87 RUN_START(_RamfuncsRunStart),
88 PAGE = 0
89 .text : > FLASHML, PAGE = 0
90 .cinit : > FLASHN|FLASHML, PAGE = 0
91 .pinit : > FLASHN, PAGE = 0
92 .switch : > FLASHML, PAGE = 0
93 .reset : > RESET, PAGE = 0, TYPE = DSECT /* not used, */
94 .stack : > RAMLS3, PAGE = 1
95 .ebss : > RAMGS0GS1, PAGE = 1
96 .econst : > FLASHML, PAGE = 0
97 .esysmem : > RAMGS0GS1, PAGE = 1
98 }
99
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