$+USB2LPT
This is the help file for h#s USB to Parallel converter.
The USB2LPT device and its driver enables redirecting of port access by random application software to a USB-attached parallel port, i.e. emulating a parallel port via USB. This unique solution works on all USB supporting Windows operating systems; the support for AMD64 platforms is currently in progress.
haftmann#software, November 15. 2009
This file merely contains context help for three property sheet pages of Device Manager and is not intended to read sequencially.
For more information, documents and updates see http://www.tu-chemnitz.de/~heha/bastelecke/Rund um den PC/USB2LPT/index.html.en
Hint:	While using Device Manager, use the context help function, or press F1 on focused dialog control!

$+#Emulation: The magic of USB2LPT, merely, its driver, is redirecting I/O instructions contained in random application software to USB.
Some details can be changed on this property sheet.
Hint:	While using Device Manager, use the context help function, or press F1 on focused dialog control!

#+Port address: Choose the address to be emulated. You may hide a real address too, this will deactivate the present port.
Advise:	one of LPTx (x = 1 to 3)
You can alse enter an arbitrary address (decimal or hexadecimal).
M Attention! You should know the conequence of your doing! You may hide (and redirect) port addresses of your network card, video card, or hard disk, this will probably crash your computer or worse.
An arbitrary address is the only solution to have more than 3 parallel ports on your computer. Moreover, your application software must have a possibility to use an arbitrary port address.
Hint:	The LPT port name shown is usual but completely irrelevant. A couple of application software uses the same assignment between LPT port name and its address; some other software detect a valid name and guesses its address by some weird magic. For the latter case, you should refer to the LPT port name shown in the “Port settings” tab.

#+LPT extension: Besides well-known functionality of a parallel port consisting of 12 (digital) outputs and 5 inputs, a modern port can more, especially streaming 8-bit parallel data in both directions with hardware support. The two new (incompatible but co-existing) protocols are called ECP and EPP extension and need some additional port addresses. The traditional port (occupying only 3 contiguous addresses) is called SPP. This converter and this driver emulates all of these extensions if needed. However, most programs don't need extensions.
Advise:	SPP (extended modes only if your application software explicitely requires)
The EPP addresses are at base address +3..+7, the ECP addresses at base address +400h..403h. For more information, see other sources, like www.beyondlogic.org or msdn.microsoft.com.

###+Trapping method: The reason for problems having a parallel port onto USB is the missing Windows API for handling a parallel port at high level. Therefore, programmers had to program some non-standardized sort of low-level port access in their application software. This converter (more specifically, the driver) grabs them all and redirects them to the USB.
Trapping of a set of kernel library functions like READ_PORT_UCHAR/WRITE_PORT_UCHAR is by far the obvious way to achieve this, but will not always work.
The other way is trapping I/O access using debug registers, this will catch all (hard-coded) accesses both in user (either V86 or protected mode) and kernel mode. But debug registers are a limited, Pentium-processor-bound, system-shared resource with problems on multi-core machines.
Advise:	Both schwitches ON, but please leave debug registers OFF on multi-core machines
The “softer” redirection will be preferred automatically by design.
On AMD64 platform, support for READ_PORT_UCHAR alike functions are dropped, therefore, redirecting of kernel library functions is not available.
On Windows 98/Me, an additional trap using Input Output Permission Map (IOPM) will be used in parallel to READ_PORT_UCHAR alike function redirecting and not counted separately.

####+Performance Options: A USB transfer lasts 125 µs (High-Speed). But an I/O access takes about 1 µs. Without some sort of cacheing, application software will notably slows down.
Output instructions can be cached and sent “en bloc” via USB to the USB2LPT converter. You can enter a maximum write delay.
Note: Every input instruction tends to write out the collected output instructions to preserve order.
Advise:	switched ON, 200..500 ms
Exceptions are high-speed output-only devices, like stepper motors or D/A converters; you should try no cache or very short delays.
At input instructions, no cacheing is possible because program logic depends on bits read. Some thumb programs read ouput-only ports back; in this case, USBLPT can present the last data output. However, some peripherals can pull-down intentionally output-only lines.
Advise:	switched ON
Should work for most peripherals. If it doesn't work, or you know your peripheral, do the particular switch OFF.

$#+Statistics: This page shows counts of accesses and redirections. So you can see how USB2LPT works.
On AMD64 platform, support for READ_PORT_UCHAR alike functions are dropped, therefore, these counters will never count.
Moreover, the usage of debug registers is shown.
And you have access to a USB2LPT specific Extra Register and can make a Firmware Update.
Hint:	While using Device Manager, use the context help function, or press F1 on focused dialog control!

####+IN or OUT instructions: These counters count the port accesses made by application software.
While OUT instructions are generally cached and therefore emulated with almost no latency, IN instructions have about 125 µs, at USB Low-Speed even 1 ms (currently, on Vista or Windows 7, even 8 ms) latency!

#+Emulation errors: Counts some complicated and rarely used I/O instructions and kernel functions, like READ_PORT_BUFFER_UCHAR; WRITE_PORT_BUFFER_UCHAR; READ_PORT_BUFFER_USHORT; WRITE_PORT_BUFFER_USHORT; READ_PORT_BUFFER_ULONG; WRITE_PORT_BUFFER_ULONG; (rep) insb; (rep) outsb; (rep) insw; (rep) outsw; (rep) insd; (rep) outsd.
These functions are currently not emulated.

#+Stolen Debug Registers: Debug registers are not managed by a (known) Windows component, therefore, everybody can use it. This counter counts how often debug registers are overwritten by an unknown component (driver or application software like a debugger). While debug registers are temporary overwritten, I/O instructions are not catched and are not redirected, therefore, the peripheral will look temporary failing for application to be faked. This applies especially for programming devices.
The new driver additionally detects stolen debug registers at every userÞkernel mode transition (Int2E and SYSENTER), this reduces the gaps of redirection considerable. These detection counts are currently not shown or accessible.

###+Debug Register Assignment: One debug register (one of four in the system) covers an I/O address space of 4 contiguous addresses for trapping. Therefore, one debug register is needed for SPP, ECP, and EPP register sets each.
Here, the current state is shown whether an address space is covered by a debug register or not.
Reasons for unexpected non-coverings are:
·	Preassigned (non-empty) debug registers at system startup (sometimes seen at Windows 98)
·	Used debug registers at driver start (while debugging other programs)
·	Concurrent (multiple) USB2LPT
·	Concurrent programs with common PORTTRAP.SYS driver component (planned)
You can avoid the upper two points by checking “Enforce allocation” in page “Emulation”.
The default setting “LPT enhancement mode = SPP” saves debug registers; then ECP and EPP is not covered.

#+Oversize: This counter counts I/O instructions with more than 1 Byte data at once, i.e. READ_PORT_USHORT; WRITE_PORT_USHORT; READ_PORT_ULONG; WRITE_PORT_ULONG; in ax,dx; out dx,ax; in eax,dx; out dx,eax, and the similar string functions. A good application does not use such instructions for a parallel port. However, the program LabVIEW is known to make such things.

##+Set to zero: Resets the counters left to the button to zero.

#+USB2LPT Special: Shows up a dialog with USB2LPT specific settings.

#+Firmware Update: You can make a firmware update herewith. You need an image file you can download from USB2LPT web site, or you can make your own firmware image.
For Low-Speed USB2LPT populated with ATmega8, this direct update is not possible, however, a flag can be set here to activate boot loader after next power cycling to USB2LPT device. This requires new boot loaders from July 2009. But for those devices, safest way for firmware upload is using the SPI programming interface.

#+Data Port: If checked, IN instructions return the last-written OUT byte without latency.
Advise:	switched ON
Except you know your application software requiring ECP – that's very rare!

#+Control Port: If checked, IN instructions return the last-written OUT byte without latency.
Advise:	switched ON
But some rare peripheral uses control port pins for data input.

#+Extra-Ports: This setting has currently no effect.

##+Open Collectors: These settings are intended for not fully TTL compatible peripherals.
In general, 5 V TTL inputs are compatible with 3.3 V CMOS outputs without level converters. However, problems arise with some peripheral that uses 5 V CMOS gates (especially the CD4000B series) or requires more than 3.3 V like blue or white LEDs. Therefore, outputs can be simulated as open-collector with external pull-up resistors to 5 V.
This is not applicable Low-Speed USB2LPT equipped with ATmega8 that run with 5 V. However, in this case, you can even use open collectors for wired AND connections.
Advise:	switched OFF
Some older parallel port really had open collectors at control port, and some newer south bridge chip sets emulate this behaviour too.

#+Switch Off Pullups: High-Speed: A single transistor enables externat 5 V pullup resistors. Switching off preserves power, and weak (about 100 kW) internal 3.3 V pullups apply.
In USB standby mode, USB2LPT switches off pullups automatically, and sets all outputs to high-impedance state to achive less than 500 µA current consumption independently of connected peripheral.
Low-Speed: The weak ATmega-builtin pullup resisors (about 40 kW) are switched off. In this case, inputs are at extremely high-impedance, therefore apply caution!
Advise:	switched OFF (i.e. pullups ON)
When connecting 3.3 V peripherals that is not 5 V tolerant, you may switch off pullups.

#+Direct I/O: This checkmark converts USB2LPT to a digital interface with 17–20 digital input/output lines with individual direction selection which is not compatible to a parallel port.
Advise:	switched OFF
If you plan to program USB2LPT with its API, you can set this bit using the API too.

#+Set and Re-Read: Accepts the settings above and saves these to non-volatile memory of USB2LPT device.

#+Scan for short circuits: Executes a self-check of USB2LPT device. Peripherals must be disconnected from USB2LPT device while executing!
After the basic scan, a question message occurs to check HIGH levels at all port pins. This checks connections between microcontroller pins and SubD pins.

#+Serial Number: All “genuine” USB2LPT have serial numbers, mostly, for tracking faulty devices. Self-made devices should not have serial numbers, so “none” is shown for those.
There is a backdoor to set the serial number here – you can read the source code on how to do.

#+Firmware Date: When new enough (since 2005), the flashed firmware has a time stamp for the creation date.

$#+Monitor: Monitoring and controlling of USB2LPT parallel port.
Monitoring is useful to check static levels of port pins.
You can exercise all functions of a parallel port (ECP, EPP etc.) and all USB2LPT-specific extra functions (direction register, Direct I/O features)!
Hint:	While using Device Manager, use the context help function, or press F1 on focused dialog control!

#+Byte read from Data Port: This hexadecimal byte is read in from the data port. Normally continuously updated.

#+Read Data Port: Initiates a read cycle from LPT base address+0.
This button occurs only in LPT port modes ECP and Test (the real data port value is hidden by the FIFO). Otherwise, this button is hidden, and this program reads the data port value continuously.

#+Bits for Data Port: Display and modify single bits of data port.
Colors:		Bit = 0
		Bit = 1
		written 0 but reads 1 (shown only when DirectIO enabled)
		written 1 but reads 0 (shown only when DirectIO enabled)
While hovering a square with mouse, a bubble help with signal name is shown.
7 No keyboard access.

#+Write data port: Enter data byte (8 bit at once) as hexadecimal number or as character with a prepended “-” (minus sign). The write access is triggered 0.5 seconds after last input automatically, so type fast and don't press any extra key. A beep occurs when an error has occured.

#+Level Display for SubD socket: Display and modify TTL levels of SubD pins.
Filling colors:	m	LOW level
	lll	HIGH level
	l	Unknown level (e.g. data port while ECP), the USB2LPT firmware is missing a back door for this!
Frame colors:	m	Data pin (mostly output)
	m	Status pin (normally input)
	m	Control pin (normally output)
	m	Ground (reference level)
While hovering a pin with mouse, a bubble help with signal name and meaning (contextual to the currently selected LPT port mode) is shown. Inversions are shown in respect to the TTL levels.
7 No keyboard access.

#+Byte read from Status Port: This hexadecimal byte is read in from the status port. Continuously updated.

#+Bits for Status Port: Display (and modify) single bits of status port.
Colors:		Bit = 0
		Bit = 1
		written 0 but reads 1 (shown only when DirectIO enabled)
		written 1 but reads 0 (shown only when DirectIO enabled)
		Bit not implemented, reads 0
		Bit not implemented, reads 1
While hovering a square with mouse, a bubble help with signal name and meaning (contextual to the currently selected LPT port mode) is shown. Inversions are shown in respect to the bit values.
Hint:	Setting a bit is only useful when the corresponding direction register bit is set to output.
7 No keyboard access.

#+Write Status Port: Enter data byte (8 bit at once) as hexadecimal number. The write access is triggered 0.5 seconds after last input automatically, so type fast and don't press any extra key. A beep occurs when an error has occured. Normally useless because input port!

#+Byte read from Control Port: This hexadecimal byte is read in from the control port. Continuously updated.

#+Bits for Control Port: Display and modify single bits of control port.
Colors:		Bit = 0
		Bit = 1
		written 0 but reads 1 (shown only when DirectIO enabled)
		written 1 but reads 0 (shown only when DirectIO enabled)
		Bit not implemented, reads 0
		Bit not implemented, reads 1
While hovering a square with mouse, a bubble help with signal name and meaning (contextual to the currently selected LPT port mode) is shown. Inversions are shown in respect to the bit values.
7 No keyboard access.

#+Write Control Port: Enter data byte (8 bit at once) as hexadecimal number. The write access is triggered 0.5 seconds after last input automatically, so type fast and don't press any extra key. A beep occurs when an error has occured.

#+Last Read FIFO Byte: Shows the byte, hexadecimal, read out of the FIFO (its port address depends on mode selected).

#+Read FIFO: This button triggers a FIFO read cycle. The byte shown left to the button is updated, and the FIFO states, FIFO full and FIFO empty, may change.

##+FIFO Addressing: Selects the mode of the next FIFO read or write cycle. (Both modes share one FIFO.)

#+Write FIFO – or Write Data Using Strobe: This button triggers a FIFO write cycle. The byte shown right to the button is taken, and the FIFO states, FIFO full and FIFO empty, may change. Moreover, for ease of tesing, the byte is auto-incremented afterwards for the next cycle – don't confuse!
If the currently selected LPT mode doesn't have a FIFO, this button triggers a printer-alike data output cycle asserting the strobe signal. So you can easily check devices connected to the USB2LPT device that behave like printers – for example, real printers or relay cards.

#+Byte to Output to FIFO – or Using Strobe: Enter data byte (8 bit at once) as hexadecimal number or as character with a prepended “-” (minus sign). The FIFO output – or data write access using strobe when currently selected LPT mode doesn't have a FIFO – is triggered 0.5 seconds after last input automatically, so type fast and don't press any extra key. A beep occurs when an error has occured.

#+Byte read from ECR: This hexadecimal byte is read in from the Extended Control Register (ECR). Continuously updated.

#+ECR: LPT Mode Selection: Show and select the LPT port mode (bits 7:5 of ECR). All 8 Modes are supported, and appearance of this dialog changes accordingly.

##+FIFO states: Shows the two FIFO state bits (bit 1:0) of ECR.

#+Write ECR: Enter data byte (8 bit at once) as hexadecimal number. The write access is triggered 0.5 seconds after last input automatically, so type fast and don't press any extra key. A beep occurs when an error has occured.

#+Direction Bits: Display and modify single bits of direction registers of USB2LPT device.
Colors:		Port pin = input (0)
		Port pin = output (1)
	 	Bit not implemented (read 0 or 1)
While hovering a square with mouse, a bubble help with signal name is shown.
The three lower bits of status port are controllable in Direct I/O mode when 3 extra lines are available. Otherwise, these bits read 1 (output) for emulating ground pins.
7 No keyboard access.

#+Firmware Update: Continue?
Last chance to cancel a crucial EEPROM write process!
Advise:	The firmware for updating should be newer than the one that currently resides on the USB2LPT device.
This message occurs only when a Full-Speed or High-Speed USB2LPT device was detected.

#+HIGH Level?
When this message occurs, the scan for short circuits is already passed.
Now you should check whether all 17 digital port pins have strong TTL HIGH level, e.g. with a multimeter, a logic probe or with an LPT checker.
This is a check for correct solder joints between PCB and SubD socket.
Advise:	When you don't want to check this, press “Yes”.

#+Firmware Update: Set flag?
Last chance to cancel a crucial EEPROM write process!
The Low-Speed USB2LPT with ATmega8 microcontroller doesn't support firmware updates via Device Manager. On the other hand, the boot loader silently contained in the device is not USB2LPT but HID compatible. For doing the real firmware update, you need the bootloadHID.exe flash write program.
Pressing “Yes” you set a flag (42h at EEPROM address 0) for branching to the boot loader when USB2LPT is reconnected next time.
Older boot loaders don't support this flag; you activate such boot loaders by connecting pin 1 and pin 14 of the SubD socket.
Very old Low-Speed USB2LPT of version 1.5 are not shipped with boot loaders. You can safely update firmware 1.6 with boot loader (if device is equipped with ATmega8), or you cannot use bootloaders (if device is equipped with ATmega48). However, a boot loader is not a must-have. Firmware updating is much safer using the SPI interface of the microcontroller. To reach the necessary RESET pin, open the device and short-circuit the SJ2 jumper for programming, either with a temporary solder joint or with a screwdriver.
This message occurs only when a Low-Speed USB2LPT device was detected.